/arch/alpha/lib/ |
D | ev6-copy_user.S | 63 beq $0, $zerolength # U .. .. .. : U L U L 68 subq $3, 8, $3 # E .. .. .. : L U U L : trip counter 75 EXI( ldbu $1,0($7) ) # .. .. .. L : Keep loads separate from stores 78 nop # E .. .. .. : U L U L 84 EXO( stb $1,-1($6) ) # .. .. .. L : 87 bne $3, $aligndest # U .. .. .. : U L U L 96 EXI( ldq_u $3,0($7) ) # .. L .. .. : Forward fetch for fallthrough code 97 beq $1,$quadaligned # U .. .. .. : U L U L 106 EXI( ldq_u $2,8($7) ) # .. .. .. L : 109 extqh $2,$7,$1 # U .. .. .. : U U L L [all …]
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D | ev6-clear_user.S | 66 beq $0, $zerolength # U .. .. .. : U L U L 73 beq $4, $headalign # U .. .. .. : U L U L 79 EX( ldq_u $5, 0($6) ) # .. .. .. L : load dst word to mask back in 82 addq $6, 8, $6 # E .. .. .. : L U U L 84 EX( stq_u $5, -8($6) ) # .. .. .. L : 87 subq $0, 8, $0 # E .. .. .. : U L U L 101 blt $4, $trailquad # U .. .. .. : U L U L 113 beq $3, $bigalign # U .. .. .. : U L U L : Aligned 0mod64 116 EX( stq_u $31, 0($6) ) # .. .. .. L 119 nop # E .. .. .. : U L U L [all …]
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D | ev6-divide.S | 111 7: stq $1, 0($30) # L : 113 stq $2, 8($30) # L : L U L U 116 stq $0,16($30) # L : 118 LONGIFY(divisor) # E : U L L U 120 stq tmp1,24($30) # L : 123 DIV_ONLY(stq tmp2,32($30)) # L : L U U L 145 bne compare,1b # U : U L U L 150 blt divisor, 2f # U : U L U L 155 bne compare,1b # U : U L U L 177 nop # E : L U L U [all …]
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D | ev6-csum_ipv6_magic.S | 62 ldq_u $0,0($16) # L : Latency: 3 64 ldq_u $1,8($16) # L : Latency: 3 65 sll $19,8,$7 # U : U L U L : 0x00000000 00aabb00 68 ldq_u $5,15($16) # L : Latency: 3 70 ldq_u $2,0($17) # L : U L U L : Latency: 3 74 ldq_u $3,8($17) # L : Latency: 3 75 sll $19,24,$19 # U : U U L U : 0x000000aa bb000000 78 ldq_u $23,15($17) # L : Latency: 3 80 addl $19,$7,$19 # E : U L U L : <sign bits>bbaabb00 85 extqh $5,$6,$5 # U : L U L U [all …]
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D | ev6-memchr.S | 48 ldq_u $1, 0($16) # L : load first quadword Latency=3 49 and $17, 0xff, $17 # E : L L U U : 00000000000000ch 54 lda $3, -1($31) # E : U L L U 59 sll $17, 32, $2 # U : U L L U : chchchch00000000 64 ldq_u $6, -1($5) # L : L U U L : eight or less bytes to search Latency=3 69 or $7, $6, $1 # E : L U L U $1 = quadword starting at $16 79 cmpbge $31, $1, $2 # E : L U L U 84 beq $2, $not_found # U : U L U L 95 ret # L0 : L U L U 109 addq $0, 2, $3 # E : U L U L : 2 cycle stall on $0 [all …]
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D | ev6-memcpy.S | 51 ldbu $1, 0($17) # L : grab a byte 54 stb $1, 0($16) # L : 67 ldq $1, 0($17) # L : get 8 bytes 72 stq $1, 0($16) # L : store 90 ldq $4, 8($17) # L : bytes 8..15 91 ldq $5, 16($17) # L : bytes 16..23 95 ldq $3, 24($17) # L : bytes 24..31 101 stq $6, 0($16) # L : bytes 0..7 105 stq $4, 8($16) # L : bytes 8..15 106 stq $5, 16($16) # L : bytes 16..23 [all …]
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D | ev6-memset.S | 80 ldq_u $4,0($16) # L : Fetch first partial 91 stq_u $1,0($5) # L : Store result 135 stq $17, 0($5) # L : 162 stq $17, 0($5) # L : 166 stq $17, 8($5) # L : 167 stq $17, 16($5) # L : 170 stq $17, 24($5) # L : 171 stq $17, 32($5) # L : 175 stq $17, 40($5) # L : 176 stq $17, 48($5) # L : [all …]
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D | ev6-stxcpy.S | 73 stq_u t1, 0(a0) # L : 78 ldq_u t1, 0(a1) # L : Latency=3 97 ldq_u t0, 0(a0) # L : Latency=3 107 1: stq_u t1, 0(a0) # L : 128 ldq_u t1, 0(a1) # L : load first src word 133 ldq_u t0, 0(a0) # L : 154 ldq_u t2, 8(a1) # L : 177 stq_u t1, 0(a0) # L : store first output word 208 ldq_u t2, 0(a1) # L : Latency=3 load high word for next time 209 stq_u t1, -8(a0) # L : save the current word (stall) [all …]
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D | ev67-strncat.S | 36 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned) 49 $loop: ldq $1, 8($16) # L : 79 stq_u $1, 0($16) # L : 83 stb $31, 8($16) # L :
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D | ev6-stxncpy.S | 89 stq_u t0, 0(a0) # L : 94 ldq_u t0, 0(a1) # L : 121 ldq_u t1, 0(a0) # L : 131 1: stq_u t0, 0(a0) # L : 166 ldq_u t1, 0(a1) # L : load first src word 170 ldq_u t0, 0(a0) # L : 196 ldq_u t2, 8(a1) # L : Latency=3 load second src word 213 stq_u t0, 0(a0) # L : store first output word 225 ldq_u t2, 8(a1) # L : read next high-order source word 279 stq_u t0, 0(a0) # L : the null was in the high-order bits [all …]
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/arch/m68k/kernel/ |
D | head.S | 368 #define L(name) .head.S.##name macro 370 #define L(name) .head.S./**/name macro 374 #define L(name) .L##name macro 376 #define L(name) .L/**/name macro 408 L(\name): 425 jbsr L(\name) 544 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab 545 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab 546 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab 547 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab [all …]
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/arch/blackfin/lib/ |
D | smulsi3_highpart.S | 18 R2 = R1.L * R0.L (FU); 19 R3 = R1.H * R0.L (IS,M); 20 R0 = R0.H * R1.H, R1 = R0.H * R1.L (IS,M); 22 R1.L = R2.H + R1.L; 26 R1.L = R1.L + R3.L;
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D | muldi3.S | 51 A0 = R2.H * R1.L, A1 = R2.L * R1.H (FU) || R3 = [SP + 12]; /* E1 */ 52 A0 += R3.H * R0.L, A1 += R3.L * R0.H (FU) || [SP] = R4; /* E1 */ 58 A1 = R2.L * R0.L (FU); /* E4 */ 61 A0 += R2.H * R0.H, A1 += R2.L * R0.H (FU); /* E2, E3c */ 62 A1 += R0.L * R2.H (FU); /* E3c */
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D | umulsi3_highpart.S | 18 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU); 19 R0 = R1.L * R0.L, R1 = R1.H * R0.L (FU);
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D | memset.S | 41 R2.L = R2.L + R1.L(NS); 42 R2.H = R2.L + R1.H(NS);
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/arch/blackfin/mach-common/ |
D | dpmc_modes.S | 20 P0.L = lo(PLL_CTL); 23 W[P0] = R1.L; 39 P0.L = lo(PLL_CTL); 43 w[p0] = R7.L; 69 P3.L = lo(VR_CTL); 79 W[P3] = R4.L; 107 P0.L = lo(PLL_DIV); 109 R0.L = 0xF; 113 P0.L = lo(PLL_CTL); 115 R0.L = (CONFIG_MIN_VCO_HZ/CONFIG_CLKIN_HZ) << 9; [all …]
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/arch/blackfin/mach-bf609/ |
D | dpm.S | 13 P0.L = LO(PM_STACK); 20 P0.L = LO(DPM0_RESTORE4); 22 P1.L = _bf609_pm_data; 26 P0.L = LO(DPM0_CTL); 28 R3.L = LO(0x00000010); 84 P0.L = LO(PM_STACK); 96 P0.L = LO(DPM0_CTL); 98 R3.L = LO(0x00000008); 133 P0.L = _bf609_pm_data; 135 R1.L = 0xBEEF; [all …]
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/arch/arm/mach-pxa/ |
D | pxa27x.c | 87 unsigned int l, L, m, M, n2, N, S; in pxa27x_get_clk_frequency_khz() local 103 L = l * BASE_CLK; in pxa27x_get_clk_frequency_khz() 104 N = (L * n2) / 2; in pxa27x_get_clk_frequency_khz() 105 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); in pxa27x_get_clk_frequency_khz() 106 S = (b) ? L : (L/2); in pxa27x_get_clk_frequency_khz() 110 L / 1000000, (L % 1000000) / 10000, l ); in pxa27x_get_clk_frequency_khz() 120 return (t) ? (N/1000) : (L/1000); in pxa27x_get_clk_frequency_khz() 129 unsigned int l, L, m, M; in clk_pxa27x_mem_getrate() local 142 L = l * BASE_CLK; in clk_pxa27x_mem_getrate() 143 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); in clk_pxa27x_mem_getrate() [all …]
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/arch/parisc/include/asm/ |
D | pdcpat.h | 16 #define PDC_PAT_CELL_GET_NUMBER 0L /* Return Cell number */ 66 #define PDC_PAT_CHASSIS_WRITE_LOG 0L /* Write Log Entry */ 73 #define PDC_PAT_CPU_INFO 0L /* Return CPU config info */ 88 #define PDC_PAT_EVENT_GET_CAPS 0L /* Get Capabilities */ 99 #define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */ 142 #define PDC_PAT_MEM_PD_INFO 0L /* Return PDT info for PD */ 167 #define PDC_PAT_NVOLATILE_READ 0L /* Read Non-Volatile Memory */ 175 #define PDC_PAT_PD_GET_ADDR_MAP 0L /* Get Address Map */
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/arch/sparc/include/asm/ |
D | rwsem.h | 28 if (unlikely(atomic64_inc_return((atomic64_t *)(&sem->count)) <= 0L)) in __down_read() 36 while ((tmp = sem->count) >= 0L) { in __down_read_trylock() 80 if (unlikely(tmp < -1L && (tmp & RWSEM_ACTIVE_MASK) == 0L)) in __up_read() 90 (atomic64_t *)(&sem->count)) < 0L)) in __up_write() 110 if (tmp < 0L) in __downgrade_write()
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/arch/sh/include/asm/ |
D | bitops.h | 36 : "0" (~0L), "1" (word) in ffz() 56 : "0" (~0L), "1" (word) in __ffs() 78 : "0" (0L), "1" (word)); in ffz()
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/arch/blackfin/include/asm/ |
D | trace.h | 62 preg.L = LO(TBUFCTL); \ 68 preg.L = LO(TBUFCTL); \ 74 preg.L = LO(TBUFCTL); \ 82 preg.L = LO(TBUFCTL); \
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/arch/alpha/include/asm/ |
D | switch_to.h | 8 #define switch_to(P,N,L) \ argument 10 (L) = alpha_switch_to(virt_to_phys(&task_thread_info(N)->pcb), (P)); \
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/arch/powerpc/kvm/ |
D | book3s_32_sr.S | 65 mtspr SPRN_IBAT##n##L,reg; \ 67 mtspr SPRN_DBAT##n##L,reg; \ 107 mtspr SPRN_IBAT##n##L,RB; \ 111 mtspr SPRN_DBAT##n##L,RB; \
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/arch/parisc/kernel/ |
D | hpmc.S | 162 ldil L%PA(os_hpmc_2), rp 177 ldil L%PA(os_hpmc_3),rp 207 ldil L%PA(os_hpmc_4),rp 229 ldil L%PA(os_hpmc_5),rp 277 ldil L%PA(os_hpmc_6),rp 292 ldil L%0xfffc0000,%r4 /* IO_BROADCAST */
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