Searched refs:MCR (Results 1 – 14 of 14) sorted by relevance
| /arch/sh/boards/mach-hp6xx/ |
| D | pm.c | 31 #define MCR 0xffffff68 macro
66 mcr = __raw_readw(MCR); in pm_enter()
67 __raw_writew(mcr & ~MCR_RFSH, MCR); in pm_enter()
78 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR); in pm_enter()
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| /arch/frv/kernel/ |
| D | gdb-io.c | 41 #define FLOWCTL_CLEAR(LINE) do { __UART(MCR) &= ~UART_MCR_##LINE; mb(); } while (0)
42 #define FLOWCTL_SET(LINE) do { __UART(MCR) |= UART_MCR_##LINE; mb(); } while (0)
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| D | debug-stub.c | 34 #define FLOWCTL_CLEAR0(LINE) do { __UART0(MCR) &= ~UART_MCR_##LINE; } while (0)
35 #define FLOWCTL_SET0(LINE) do { __UART0(MCR) |= UART_MCR_##LINE; } while (0)
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| /arch/x86/boot/ |
| D | early_serial_console.c | 15 #define MCR 4 /* Modem control */ macro
31 outb(0x3, port + MCR); /* DTR + RTS */ in early_serial_init()
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| /arch/x86/kernel/ |
| D | early_printk.c | 91 #define MCR 4 /* Modem control */ macro
151 outb(0x3, early_serial_base + MCR); /* DTR + RTS */ in early_serial_init()
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| /arch/arm/mach-orion5x/ |
| D | tsx09-common.c | 42 writel(0x00, UART1_REG(MCR)); in qnap_tsx09_power_off()
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| D | terastation_pro2-setup.c | 285 writel(0x00, UART1_REG(MCR)); in tsp2_power_off()
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| D | kurobox_pro-setup.c | 306 writel(0x00, UART1_REG(MCR)); in kurobox_pro_power_off()
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| /arch/m68k/68360/ |
| D | head-ram.S | 43 #define MCR (_dprbase + REGB + 0x0000) macro
125 move.l #MCU_SIM_MCR, MCR
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| D | head-rom.S | 55 #define MCR (_dprbase + REGB + 0x0000) macro
137 move.l #MCU_SIM_MCR, MCR
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| /arch/arm/include/asm/ |
| D | vfpmacros.h | 16 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd in toolkits()
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| /arch/arm/mach-shmobile/include/mach/ |
| D | head-kzm9g.txt | 410 MCR p15, 0, r0, c1, c0, 0
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| /arch/blackfin/kernel/ |
| D | debug-mmrs.c | 551 __UART(MCR, mcr); in bfin_debug_mmrs_uart()
567 __UART(MCR, mcr); in bfin_debug_mmrs_uart()
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| /arch/x86/ |
| D | Kconfig | 535 Select this option to expose the IOSF sideband access registers (MCR,
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