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Searched refs:R7 (Results 1 – 25 of 40) sorted by relevance

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/arch/blackfin/lib/
Dmodsi3.S39 [--SP] = (R7:6); /* Push R7 and R6 */
41 R7 = R0; /* Copy of R0 */ define
47 R0 = R7 - R0; /* Dividend - (quotient * divisor) */
49 (R7:6) = [SP++]; /* Pop registers R7 and R4 */
Dumodsi3.S32 [--SP] = (R7:6); /* Push registers and */
34 R7 = R0; /* Copy of R0 */ define
40 R0 = R7 - R0; /* Dividend - (quotient * divisor) */
42 ( R7:6) = [SP++]; /* And registers */
Dudivsi3.S116 [--SP] = (R7:5); /* Push registers R5-R7 */
146 R7 = 0; /* Initialise quotient bit */ define
154 CC = R7 < 0; /* Check quotient(AQ) */
158 R7 = R3 ^ R1; /* Generate next quotient bit */ define
160 R5 = R7 >> 31; /* Get AQ */
179 (R7:5) = [SP++]; /* Pop registers R5-R7 */
Ddivsi3.S111 [--SP] = (R7:5); /* Push registers R5-R7 */
123 .Llst: R7 = R2 >> 31; /* record copy of carry from R2 */
126 R0 = R0 | R7; /* and add carry */
144 (R7:5)= [SP++]; /* Pop registers R6-R7 */
/arch/blackfin/include/asm/
Dentry.h61 [--sp] = (R7:0,P5:0); \
70 [--sp] = (R7:0,P5:0); \
86 [--sp] = (R7:0,P5:0); \
112 [--sp] = (R7:0,P5:0); \
132 (R7:0, P5:0) = [SP++]; \
142 [--sp] = (R7:0,P5:0); \
161 (R7:0, P5:0) = [SP++]; \
Ddpmc.h13 #define PM_REG0 R7
28 #define PM_REGSET0 R7:7
29 #define PM_REGSET1 R7:6
30 #define PM_REGSET2 R7:5
31 #define PM_REGSET3 R7:4
32 #define PM_REGSET4 R7:3
33 #define PM_REGSET5 R7:2
34 #define PM_REGSET6 R7:1
35 #define PM_REGSET7 R7:0
36 #define PM_REGSET8 R7:0, P5:5
[all …]
Dcontext.S23 [--sp] = ( R7:0, P5:0 );
95 [--sp] = ( R7:0, P5:0 );
154 [--sp] = ( R7:0, P5:0 );
274 ( R7 : 0, P5 : 0) = [ SP ++ ];
344 ( R7 : 0, P5 : 0) = [ SP ++ ];
352 [--sp] = (R7:0, P5:0);
387 (R7:0, P5:0) = [SP++];
/arch/blackfin/mach-common/
Ddpmc_modes.S14 [--SP] = (R7:4, P5:3);
40 R7 = w[p0](z); define
41 BITCLR (R7, 3);
42 BITCLR (R7, 5);
43 w[p0] = R7.L;
51 (R7:4, P5:3) = [SP++];
90 [--SP] = (R7:4, P5:3);
125 R7 = W[P0](z); define
131 R2 = DEPOSIT(R7, R1);
162 W[P0]= R7;
[all …]
Dentry.S50 P4 = R7; /* Store EXCAUSE */
59 R7 = P4; define
61 cc = R6 == R7;
65 cc = R6 == R7;
88 (R7:6,P5:4) = [sp++];
112 CC = R7 == R6;
194 syscfg = R7;
222 cc = R7 == R6;
227 syscfg = R7;
234 R7=LC0;
[all …]
Dhead.S33 R7 = R0; define
220 R0 = R7;
/arch/blackfin/mach-bf609/
Ddpm.S42 [--sp] = (R7:0,P5:0);
66 (R7:0,P5:0) = [sp++];
73 [--sp] = (R7:0,P5:0);
122 (R7:0,P5:0) = [SP++];
/arch/sh/kernel/cpu/sh3/
Dswsusp.S62 ! BL=0: R7->R0 is bank0
68 ! BL=1: R7->R0 is bank1
83 ! BL=0: R7->R0 is bank0
108 ! BL=0: R7->R0 is bank0
115 ! BL=1: R7->R0 is bank1
122 ! BL=0: R7->R0 is bank0
/arch/x86/crypto/
Daes-x86_64-asm_64.S45 #define R7 %rbp macro
134 prologue(FUNC,KEY,B128,B192,R2,R8,R7,R9,R1,R3,R4,R6,R10,R5,R11)
136 #define return(FUNC) epilogue(FUNC,R8,R2,R9,R7,R5,R6,R3,R4,R11)
139 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4) \
143 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4)
146 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4) \
150 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4)
/arch/hexagon/kernel/
Dvm_entry.S68 { memd(R0 + #_PT_R0706) = R7:6; \
112 { memd(R0 + #_PT_R0706) = R7:6; \
151 { R7:6 = memd(R0 + #_PT_R0706); \
182 R7:6 = memd(R0 + #_PT_R0706); \
/arch/powerpc/mm/
Dtlb_nohash_low.S223 PPC_ICBT(0,R6,R7) /* touch next cache line */
225 PPC_ICBT(0,R6,R7) /* touch next cache line */
227 PPC_ICBT(0,R6,R7) /* touch next cache line */
/arch/hexagon/lib/
Dmemcpy.S157 #define ldata0 R7:6 /* even 8 bytes chunks */
159 #define data1 R7 /* lower 8 bytes of ldata1 */
174 #define back R7 /* nr bytes > dword boundary in src block */
/arch/arm/boot/dts/
Dsun5i-a10s-r7-tv-dongle.dts17 model = "R7 A10s hdmi tv-stick";
/arch/powerpc/platforms/pseries/
DhvCall.S41 std r7,STK_PARAM(R7)(r1); \
53 ld r7,STACK_FRAME_OVERHEAD+STK_PARAM(R7)(r1); \
/arch/m32r/kernel/
Dentry.S91 #define R7(reg) @(0x20,reg) macro
/arch/ia64/kernel/
Dentry.h55 .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off); \
/arch/powerpc/kvm/
Dbookehv_interrupts.S203 PPC_STL r7, VCPU_GPR(R7)(r4)
302 PPC_STL r7, VCPU_GPR(R7)(r11)
330 PPC_STL r7, VCPU_GPR(R7)(r11)
683 PPC_LL r7, VCPU_GPR(R7)(r4)
Dbooke_interrupts.S152 stw r7, VCPU_GPR(R7)(r4)
489 lwz r7, VCPU_GPR(R7)(r4)
/arch/powerpc/kernel/
Dfpu.S74 REST_32FPVSRS(0, R4, R7)
/arch/m32r/platforms/oaks32r/
Ddot.gdbinit.nommu79 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
/arch/cris/arch-v10/kernel/
Dkgdb.c303 R4, R5, R6, R7, enumerator

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