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Searched refs:SVC_MODE (Results 1 – 21 of 21) sorted by relevance

/arch/arm/include/uapi/asm/
Dptrace.h49 #define SVC_MODE 0x00000000 macro
52 #define SVC_MODE 0x00000013 macro
/arch/arm/plat-iop/
Dcp6.c44 .cpsr_val = SVC_MODE,
/arch/arm/include/asm/
Dvirt.h58 #define __boot_cpu_mode (SVC_MODE)
Dperf_event.h26 (regs)->ARM_cpsr = SVC_MODE; \
Dassembler.h103 msr cpsr_c, #PSR_I_BIT | SVC_MODE
107 msr cpsr_c, #SVC_MODE
322 orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT | SVC_MODE
337 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, \reg
/arch/arm/kvm/
Dreset.c37 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
Demulate.c119 case USR_MODE...SVC_MODE: in vcpu_reg()
149 case SVC_MODE: in vcpu_spsr()
Dguest.c89 case SVC_MODE: in set_core_reg()
/arch/arm/common/
Dfiq_glue.S62 cmp r4, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
67 msr cpsr_c, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
/arch/arm/mach-s3c24xx/
Dsleep.S56 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
/arch/arm/mach-s3c64xx/
Dsleep.S43 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
/arch/arm/kernel/
Dentry-header.S177 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
183 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
189 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
195 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
Dkgdb.c172 .cpsr_val = SVC_MODE,
180 .cpsr_val = SVC_MODE,
Dkprobes.c594 .cpsr_val = SVC_MODE,
602 .cpsr_val = SVC_MODE,
612 .cpsr_val = SVC_MODE,
Dhead-nommu.S55 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
98 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
Dentry-armv.S341 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
342 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
355 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
356 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
1071 eor r0, r0, #(\mode ^ SVC_MODE | PSR_ISETSTATE)
Dprocess.c531 childregs->ARM_cpsr = SVC_MODE; in copy_thread()
Dsetup.c506 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) in cpu_init()
Dtraps.c422 if (processor_mode(regs) == SVC_MODE) { in do_undefinstr()
/arch/arm/mm/
Dproc-xsc3.S110 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
451 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
Dproc-xscale.S147 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE