Searched refs:SVC_MODE (Results 1 – 21 of 21) sorted by relevance
/arch/arm/include/uapi/asm/ |
D | ptrace.h | 49 #define SVC_MODE 0x00000000 macro 52 #define SVC_MODE 0x00000013 macro
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/arch/arm/plat-iop/ |
D | cp6.c | 44 .cpsr_val = SVC_MODE,
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/arch/arm/include/asm/ |
D | virt.h | 58 #define __boot_cpu_mode (SVC_MODE)
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D | perf_event.h | 26 (regs)->ARM_cpsr = SVC_MODE; \
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D | assembler.h | 103 msr cpsr_c, #PSR_I_BIT | SVC_MODE 107 msr cpsr_c, #SVC_MODE 322 orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT | SVC_MODE 337 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, \reg
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/arch/arm/kvm/ |
D | reset.c | 37 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
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D | emulate.c | 119 case USR_MODE...SVC_MODE: in vcpu_reg() 149 case SVC_MODE: in vcpu_spsr()
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D | guest.c | 89 case SVC_MODE: in set_core_reg()
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/arch/arm/common/ |
D | fiq_glue.S | 62 cmp r4, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT) 67 msr cpsr_c, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
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/arch/arm/mach-s3c24xx/ |
D | sleep.S | 56 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
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/arch/arm/mach-s3c64xx/ |
D | sleep.S | 43 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
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/arch/arm/kernel/ |
D | entry-header.S | 177 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE) 183 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE) 189 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE) 195 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
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D | kgdb.c | 172 .cpsr_val = SVC_MODE, 180 .cpsr_val = SVC_MODE,
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D | kprobes.c | 594 .cpsr_val = SVC_MODE, 602 .cpsr_val = SVC_MODE, 612 .cpsr_val = SVC_MODE,
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D | head-nommu.S | 55 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode 98 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
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D | entry-armv.S | 341 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT ) 342 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT ) 355 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT ) 356 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT ) 1071 eor r0, r0, #(\mode ^ SVC_MODE | PSR_ISETSTATE)
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D | process.c | 531 childregs->ARM_cpsr = SVC_MODE; in copy_thread()
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D | setup.c | 506 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) in cpu_init()
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D | traps.c | 422 if (processor_mode(regs) == SVC_MODE) { in do_undefinstr()
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/arch/arm/mm/ |
D | proc-xsc3.S | 110 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 451 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
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D | proc-xscale.S | 147 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
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