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Searched refs:SYSCR (Results 1 – 17 of 17) sorted by relevance

/arch/blackfin/include/asm/
Ddpmc.h249 #ifdef SYSCR
250 PM_SYS_PUSH16(6, SYSCR)
289 #ifdef SYSCR
290 PM_SYS_POP16(6, SYSCR)
/arch/blackfin/kernel/
Dbfin_gpio.c19 AWA_data = SYSCR,
20 AWA_data_clear = SYSCR,
21 AWA_data_set = SYSCR,
22 AWA_toggle = SYSCR,
Ddebug-mmrs.c1461 D16(SYSCR); in bfin_debug_mmrs_init()
/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h26 #define SYSCR 0xFFC00104 /* System Configuration registe */ macro
DcdefBF532.h24 #define bfin_read_SYSCR() bfin_read16(SYSCR)
25 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h27 #define SYSCR 0xFFC00104 /* System Configuration Register */ macro
DcdefBF522.h26 #define bfin_read_SYSCR() bfin_read16(SYSCR)
27 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h24 #define SYSCR 0xFFC00104 /* System Configuration Register */ macro
DcdefBF512.h26 #define bfin_read_SYSCR() bfin_read16(SYSCR)
27 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h31 #define SYSCR 0xFFC00104 /* System Reset Configuration register */ macro
DcdefBF561.h28 #define bfin_read_SYSCR() bfin_read16(SYSCR)
29 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h23 #define SYSCR 0xFFC00104 /* System Configuration Register */ macro
DcdefBF534.h24 #define bfin_read_SYSCR() bfin_read16(SYSCR)
25 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h25 #define SYSCR 0xFFC00104 /* System Configuration registe */ macro
DcdefBF538.h24 #define bfin_read_SYSCR() bfin_read16(SYSCR)
25 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h34 #define SYSCR 0xffc00104 /* System Configuration register */ macro
DcdefBF54x_base.h34 #define bfin_read_SYSCR() bfin_read16(SYSCR)
35 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)