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Searched refs:base_lo (Results 1 – 6 of 6) sorted by relevance

/arch/x86/kernel/cpu/mtrr/
Dgeneric.c163 (mtrr_state.var_ranges[i].base_lo & PAGE_MASK); in __mtrr_type_lookup()
201 curr_match = mtrr_state.var_ranges[i].base_lo & 0xff; in __mtrr_type_lookup()
256 rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); in get_mtrr_var_range()
262 u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi) in fill_mtrr_var_range() argument
268 vr[index].base_lo = base_lo; in fill_mtrr_var_range()
372 mtrr_state.var_ranges[i].base_lo >> 12, in print_mtrr_state()
376 mtrr_attrib_to_str(mtrr_state.var_ranges[i].base_lo & 0xff)); in print_mtrr_state()
513 u32 mask_lo, mask_hi, base_lo, base_hi; in generic_get_mtrr() local
533 rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi); in generic_get_mtrr()
556 *base = (u64)base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT; in generic_get_mtrr()
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Dmtrr.h53 u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi);
Dcleanup.c178 u32 base_lo, base_hi, mask_lo, mask_hi; in set_var_mtrr() local
194 base_lo = base & ((1ULL<<32) - 1); in set_var_mtrr()
200 fill_mtrr_var_range(reg, base_lo, base_hi, mask_lo, mask_hi); in set_var_mtrr()
/arch/x86/include/uapi/asm/
Dmtrr.h70 __u32 base_lo; member
/arch/x86/kvm/
Dmmu.c2320 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK); in get_mtrr_type()
2332 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff; in get_mtrr_type()
Dx86.c1828 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo; in set_msr_mtrr()
2344 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo; in get_msr_mtrr()