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Searched refs:cache_line_size (Results 1 – 5 of 5) sorted by relevance

/arch/mips/mm/
Dpage.c102 static int cache_line_size; variable
103 #define cache_line_mask() (cache_line_size - 1)
149 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters()
208 cache_line_size = cpu_scache_line_size(); in set_prefetch_parameters()
210 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters()
217 max(cache_line_size >> 1, in set_prefetch_parameters()
220 max(cache_line_size >> 1, in set_prefetch_parameters()
241 } else if (cache_line_size == (half_clear_loop_size << 1)) { in build_clear_pref()
300 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) in build_clear_page()
301 * cache_line_size : 0; in build_clear_page()
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/arch/arm64/include/asm/
Dcache.h35 static inline int cache_line_size(void) in cache_line_size() function
/arch/powerpc/kernel/
Deeh_pe.c66 alloc_size = ALIGN(alloc_size, cache_line_size()); in eeh_pe_alloc()
82 cache_line_size()); in eeh_pe_alloc()
/arch/x86/include/asm/
Dprocessor.h163 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
/arch/arm64/kernel/
Dcpufeature.c965 cls = cache_line_size(); in setup_cpu_features()