Home
last modified time | relevance | path

Searched refs:dsisr (Results 1 – 25 of 36) sorted by relevance

12

/arch/powerpc/kernel/
Dmce_power.c66 static long mce_handle_derror(uint64_t dsisr, uint64_t slb_error_bits) in mce_handle_derror() argument
75 if (dsisr & slb_error_bits) { in mce_handle_derror()
78 dsisr &= ~(slb_error_bits); in mce_handle_derror()
80 if (dsisr & P7_DSISR_MC_TLB_MULTIHIT_MFTLB) { in mce_handle_derror()
84 dsisr &= ~P7_DSISR_MC_TLB_MULTIHIT_MFTLB; in mce_handle_derror()
87 if (dsisr & 0xffffffffUL) in mce_handle_derror()
93 static long mce_handle_derror_p7(uint64_t dsisr) in mce_handle_derror_p7() argument
95 return mce_handle_derror(dsisr, P7_DSISR_MC_SLB_ERRORS); in mce_handle_derror_p7()
174 static void mce_get_derror_p7(struct mce_error_info *mce_err, uint64_t dsisr) in mce_get_derror_p7() argument
176 if (dsisr & P7_DSISR_MC_UE) { in mce_get_derror_p7()
[all …]
Dppc32.h31 unsigned int dsisr; member
Dalign.c774 unsigned int dsisr; in fix_alignment() local
808 dsisr = regs->dsisr; in fix_alignment()
823 dsisr = make_dsisr(instr); in fix_alignment()
828 reg = (dsisr >> 5) & 0x1f; /* source/dest register */ in fix_alignment()
829 areg = dsisr & 0x1f; /* register to update */ in fix_alignment()
838 instr = (dsisr >> 10) & 0x7f; in fix_alignment()
839 instr |= (dsisr >> 13) & 0x60; in fix_alignment()
Dkvm.c464 kvm_patch_ins_lwz(inst, magic_var(dsisr), inst_rt); in kvm_check_ins()
567 kvm_patch_ins_stw(inst, magic_var(dsisr), inst_rt); in kvm_check_ins()
Dsignal_64.c333 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); in restore_sigcontext()
453 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); in restore_tm_sigcontexts()
/arch/powerpc/include/asm/
Ddisassemble.h93 unsigned dsisr; in make_dsisr() local
97 dsisr = (instr & 0x03ff0000) >> 16; in make_dsisr()
101 dsisr |= (instr & 0x00000006) << 14; in make_dsisr()
103 dsisr |= (instr & 0x00000040) << 8; in make_dsisr()
105 dsisr |= (instr & 0x00000780) << 3; in make_dsisr()
108 dsisr |= (instr & 0x04000000) >> 12; in make_dsisr()
110 dsisr |= (instr & 0x78000000) >> 17; in make_dsisr()
113 dsisr |= (instr & 0x00000003) << 18; in make_dsisr()
116 return dsisr; in make_dsisr()
Dcopro.h19 unsigned long dsisr, unsigned *flt);
Dspu_priv1.h41 void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
111 spu_mfc_dsisr_set (struct spu *spu, u64 dsisr) in spu_mfc_dsisr_set() argument
113 spu_priv1_ops->mfc_dsisr_set(spu, dsisr); in spu_mfc_dsisr_set()
Dptrace.h161 #define MAX_REG_OFFSET (offsetof(struct pt_regs, dsisr))
/arch/powerpc/kvm/
Dbook3s_hv_ras.c76 unsigned long dsisr = vcpu->arch.shregs.dsisr; in kvmppc_realmode_mc_power7() local
78 if (dsisr & (DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI | in kvmppc_realmode_mc_power7()
82 dsisr &= ~(DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI | in kvmppc_realmode_mc_power7()
85 if (dsisr & DSISR_MC_TLB_MULTI) { in kvmppc_realmode_mc_power7()
88 dsisr &= ~DSISR_MC_TLB_MULTI; in kvmppc_realmode_mc_power7()
91 if (dsisr & 0xffffffffUL) in kvmppc_realmode_mc_power7()
Dbook3s_emulate.c274 u32 dsisr; in kvmppc_core_emulate_op_pr() local
291 dsisr = DSISR_ISSTORE; in kvmppc_core_emulate_op_pr()
293 dsisr |= DSISR_NOHPTE; in kvmppc_core_emulate_op_pr()
295 dsisr |= DSISR_PROTFAULT; in kvmppc_core_emulate_op_pr()
297 kvmppc_set_dsisr(vcpu, dsisr); in kvmppc_core_emulate_op_pr()
298 vcpu->arch.fault_dsisr = dsisr; in kvmppc_core_emulate_op_pr()
Dbook3s_pr.c605 u32 dsisr = vcpu->arch.fault_dsisr; in kvmppc_handle_pagefault() local
609 dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT; in kvmppc_handle_pagefault()
610 kvmppc_set_dsisr(vcpu, dsisr); in kvmppc_handle_pagefault()
1190 u32 dsisr; in kvmppc_handle_exit_pr() local
1193 dsisr = kvmppc_alignment_dsisr(vcpu, last_inst); in kvmppc_handle_exit_pr()
1196 kvmppc_set_dsisr(vcpu, dsisr); in kvmppc_handle_exit_pr()
Dbook3s_paired_singles.c168 u32 dsisr; in kvmppc_inject_pf() local
176 dsisr = kvmppc_set_field(0, 33, 33, 1); in kvmppc_inject_pf()
178 dsisr = kvmppc_set_field(dsisr, 38, 38, 1); in kvmppc_inject_pf()
179 kvmppc_set_dsisr(vcpu, dsisr); in kvmppc_inject_pf()
/arch/powerpc/platforms/cell/spufs/
Dfault.c112 u64 ea, dsisr, access; in spufs_handle_class1() local
127 dsisr = ctx->csa.class_1_dsisr; in spufs_handle_class1()
129 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))) in spufs_handle_class1()
135 dsisr, ctx->state); in spufs_handle_class1()
145 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL; in spufs_handle_class1()
152 ret = copro_handle_mm_fault(current->mm, ea, dsisr, &flt); in spufs_handle_class1()
Drun.c50 u64 dsisr; in spu_stopped() local
71 dsisr = ctx->csa.class_1_dsisr; in spu_stopped()
72 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) in spu_stopped()
/arch/powerpc/platforms/pasemi/
Dsetup.c260 unsigned long srr0, srr1, dsisr; in pas_machine_check_handler() local
274 dsisr = mfspr(SPRN_DSISR); in pas_machine_check_handler()
277 printk(KERN_ERR "DSISR 0x%016lx DAR 0x%016lx\n", dsisr, regs->dar); in pas_machine_check_handler()
289 if (dsisr & 0x8000) in pas_machine_check_handler()
291 if (dsisr & 0x4000) in pas_machine_check_handler()
293 if (dsisr & 0x2000) { in pas_machine_check_handler()
297 if (dsisr & 0x1000) in pas_machine_check_handler()
299 if (dsisr & 0x800) in pas_machine_check_handler()
301 if (dsisr & 0x400) in pas_machine_check_handler()
/arch/powerpc/platforms/cell/
Dbeat_spu_priv1.c90 u64 dsisr; in mfc_dsisr_get() local
93 offsetof(struct spu_priv1, mfc_dsisr_RW), &dsisr); in mfc_dsisr_get()
94 return dsisr; in mfc_dsisr_get()
97 static void mfc_dsisr_set(struct spu *spu, u64 dsisr) in mfc_dsisr_set() argument
101 offsetof(struct spu_priv1, mfc_dsisr_RW), dsisr); in mfc_dsisr_set()
Dspu_base.c185 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr) in __spu_trap_data_map() argument
189 pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea); in __spu_trap_data_map()
195 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) && in __spu_trap_data_map()
209 spu->class_1_dsisr = dsisr; in __spu_trap_data_map()
317 unsigned long stat, mask, dar, dsisr; in spu_irq_class_1() local
326 dsisr = spu_mfc_dsisr_get(spu); in spu_irq_class_1()
332 dar, dsisr); in spu_irq_class_1()
338 __spu_trap_data_map(spu, dar, dsisr); in spu_irq_class_1()
Dspu_priv1_mmio.c103 static void mfc_dsisr_set(struct spu *spu, u64 dsisr) in mfc_dsisr_set() argument
105 out_be64(&spu->priv1->mfc_dsisr_RW, dsisr); in mfc_dsisr_set()
/arch/powerpc/mm/
Dcopro_fault.c37 unsigned long dsisr, unsigned *flt) in copro_handle_mm_fault() argument
62 is_write = dsisr & DSISR_ISSTORE; in copro_handle_mm_fault()
67 if (dsisr & DSISR_PROTFAULT) in copro_handle_mm_fault()
/arch/um/sys-ppc/shared/sysdep/
Dsigcontext.h35 retval = !!(_sc->regs->dsisr & DSISR_WRITE); \
Dptrace.h30 PPC_REG dsisr; member
/arch/powerpc/include/uapi/asm/
Dkvm_para.h48 __u32 dsisr; member
Dptrace.h50 unsigned long dsisr; /* on 4xx/Book-E used for ESR */ member
/arch/powerpc/perf/
Dcore-book3s.c153 unsigned long mmcra = regs->dsisr; in perf_ip_adjust()
174 unsigned long mmcra = regs->dsisr; in perf_get_data_addr()
206 return !!(regs->dsisr & sihv); in regs_sihv()
219 return !!(regs->dsisr & sipr); in regs_sipr()
274 regs->dsisr = mmcra; in perf_read_regs()
328 unsigned long mmcra = regs->dsisr; in siar_valid()

12