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Searched refs:ia64_setreg (Results 1 – 11 of 11) sorted by relevance

/arch/ia64/include/asm/
Dprocessor.h380 case 0: ia64_setreg(_IA64_REG_AR_KR0, r); break; \
381 case 1: ia64_setreg(_IA64_REG_AR_KR1, r); break; \
382 case 2: ia64_setreg(_IA64_REG_AR_KR2, r); break; \
383 case 3: ia64_setreg(_IA64_REG_AR_KR3, r); break; \
384 case 4: ia64_setreg(_IA64_REG_AR_KR4, r); break; \
385 case 5: ia64_setreg(_IA64_REG_AR_KR5, r); break; \
386 case 6: ia64_setreg(_IA64_REG_AR_KR6, r); break; \
387 case 7: ia64_setreg(_IA64_REG_AR_KR7, r); break; \
472 ia64_setreg(_IA64_REG_PSR_L, psr); in ia64_set_psr()
485 ia64_setreg(_IA64_REG_CR_ITIR, (log_page_size << 2)); in ia64_itr()
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Ddelay.h25 ia64_setreg(_IA64_REG_CR_ITM, val); in ia64_set_itm()
42 ia64_setreg(_IA64_REG_CR_ITV, val); in ia64_set_itv()
55 ia64_setreg(_IA64_REG_AR_ITC, val); in ia64_set_itc()
/arch/ia64/kernel/
Dmachine_kexec.c115 ia64_setreg(_IA64_REG_CR_PMV, 1 << 16); in ia64_machine_kexec()
116 ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16); in ia64_machine_kexec()
128 ia64_setreg(_IA64_REG_CR_TPR, 0); in ia64_machine_kexec()
Dirq_ia64.c490 ia64_setreg(_IA64_REG_CR_TPR, vector); in ia64_handle_irq()
505 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr); in ia64_handle_irq()
550 ia64_setreg(_IA64_REG_CR_TPR, vector); in ia64_process_pending_intr()
574 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr); in ia64_process_pending_intr()
Dsetup.c999 ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR in cpu_init()
1015 ia64_setreg(_IA64_REG_CR_PMV, 1 << 16); in cpu_init()
1016 ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16); in cpu_init()
1019 ia64_setreg(_IA64_REG_CR_TPR, 0); in cpu_init()
Dmca.c642 ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval); in ia64_mca_cmc_vector_setup()
671 ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval); in ia64_mca_cmc_vector_disable()
697 ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval); in ia64_mca_cmc_vector_enable()
Dperfmon.c701 ia64_setreg(_IA64_REG_PSR_L, val); in pfm_set_psr_l()
1027 ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP); in pfm_restore_monitoring()
1084 ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) | IA64_DCR_PP); in pfm_restore_monitoring()
3989 ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP); in pfm_stop()
4083 ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) | IA64_DCR_PP); in pfm_start()
5768 ia64_setreg(_IA64_REG_CR_DCR, dcr & ~IA64_DCR_PP); in pfm_syst_wide_update_task()
5780 ia64_setreg(_IA64_REG_CR_DCR, dcr |IA64_DCR_PP); in pfm_syst_wide_update_task()
6685 ia64_setreg(_IA64_REG_CR_PMV, IA64_PERFMON_VECTOR); in pfm_init_percpu()
/arch/ia64/include/uapi/asm/
Dintrinsics.h113 #define ia64_setreg IA64_INTRINSIC_API(setreg) macro
/arch/ia64/hp/sim/boot/
Dbootloader.c163 ia64_setreg(_IA64_REG_AR_KR0, 0xffffc000000UL); in start_bootloader()
/arch/ia64/kvm/
Dvcpu.c313 ia64_setreg(_IA64_REG_AR_RSC, new_rsc); in get_rse_reg()
334 ia64_setreg(_IA64_REG_AR_RSC, old_rsc); in get_rse_reg()
357 ia64_setreg(_IA64_REG_AR_RSC, new_rsc); in set_rse_reg()
380 ia64_setreg(_IA64_REG_AR_RNAT, rnat); in set_rse_reg()
389 ia64_setreg(_IA64_REG_AR_BSPSTORE, (unsigned long)bspstore); in set_rse_reg()
390 ia64_setreg(_IA64_REG_AR_RNAT, rnat); in set_rse_reg()
393 ia64_setreg(_IA64_REG_AR_RSC, old_rsc); in set_rse_reg()
Dvcpu.h529 ia64_setreg(_IA64_REG_CR_DCR, val); in vcpu_set_dcr()