| /arch/arm/lib/ |
| D | io-writesw-armv3.S | 27 mov r3, r3, lsr #16
47 orr ip, ip, ip, lsr #16
50 mov ip, r3, lsr #16
55 orr ip, ip, ip, lsr #16
58 mov ip, r4, lsr #16
63 orr ip, ip, ip, lsr #16
66 mov ip, r5, lsr #16
71 orr ip, ip, ip, lsr #16
74 mov ip, r6, lsr #16
90 orr ip, ip, ip, lsr #16
[all …]
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| D | findbit.S | 29 ARM( ldrb r3, [r0, r2, lsr #3] )
30 THUMB( lsr r3, r2, #3 )
50 ARM( ldrb r3, [r0, r2, lsr #3] )
51 THUMB( lsr r3, r2, #3 )
54 movs r3, r3, lsr ip @ shift off unused bits
70 ARM( ldrb r3, [r0, r2, lsr #3] )
71 THUMB( lsr r3, r2, #3 )
91 ARM( ldrb r3, [r0, r2, lsr #3] )
92 THUMB( lsr r3, r2, #3 )
94 movs r3, r3, lsr ip @ shift off unused bits
[all …]
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| D | delay-loop.S | 31 add r0, r0, r1, lsr #32-14
32 mov r0, r0, lsr #14 @ max = 0x0001ffff
33 add r2, r2, r1, lsr #32-10
34 mov r2, r2, lsr #10 @ max = 0x00007fff
36 add r0, r0, r1, lsr #32-6
37 movs r0, r0, lsr #6
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| D | lib1funcs.S | 89 cmp \dividend, \divisor, lsr #1
90 subhs \dividend, \dividend, \divisor, lsr #1
91 orrhs \result, \result, \curbit, lsr #1
92 cmp \dividend, \divisor, lsr #2
93 subhs \dividend, \dividend, \divisor, lsr #2
94 orrhs \result, \result, \curbit, lsr #2
95 cmp \dividend, \divisor, lsr #3
96 subhs \dividend, \dividend, \divisor, lsr #3
97 orrhs \result, \result, \curbit, lsr #3
99 movnes \curbit, \curbit, lsr #4 @ No, any more bits to do?
[all …]
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| D | div64.S | 92 movnes ip, ip, lsr #1
93 mov yl, yl, lsr #1
113 movs ip, ip, lsr #1
131 mov ip, ip, lsr xh
136 mov ip, ip, lsr #1
145 movs ip, ip, lsr #1
163 movhs yl, yl, lsr #16
167 movhs yl, yl, lsr #8
171 movhs yl, yl, lsr #4
176 addls ip, ip, yl, lsr #1
[all …]
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| D | io-writesw-armv4.S | 16 mov \rd, \rd, lsr #16
19 mov lr, \rd, lsr #16
71 #define push_hbyte1 lsr #24
73 #define pull_hbyte0 lsr #24
87 1: mov ip, r3, lsr #8
97 3: movne ip, r3, lsr #8
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| D | muldi3.S | 33 mov ip, xl, lsr #16
34 mov yh, yl, lsr #16
42 adc xh, xh, yh, lsr #16
44 adc xh, xh, ip, lsr #16
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| D | io-writesb.S | 16 mov \rd, \rd, lsr #8
18 mov \rd, \rd, lsr #8
20 mov \rd, \rd, lsr #8
23 mov lr, \rd, lsr #24
25 mov lr, \rd, lsr #16
27 mov lr, \rd, lsr #8
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| D | lshrdi3.S | 45 movmi al, al, lsr r2
46 movpl al, ah, lsr r3
50 mov ah, ah, lsr r2
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| D | io-readsw-armv4.S | 87 #define push_hbyte0 lsr #8
93 #define pull_hbyte1 lsr #8
104 _LE_ONLY_( mov ip, ip, lsr #8 )
105 _BE_ONLY_( mov ip, ip, lsr #24 )
120 _BE_ONLY_( mov ip, ip, lsr #24 )
127 _LE_ONLY_( movne ip, ip, lsr #8 )
128 _BE_ONLY_( movne ip, ip, lsr #24 )
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| D | bswapsdi2.S | 19 mov r3, r3, lsr #8
29 mov r1, r1, lsr #8
30 mov r3, r3, lsr #8
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| /arch/arm/mm/ |
| D | abort-lv4t.S | 33 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
64 add r6, r6, r9, lsr #1
66 add r6, r6, r9, lsr #2
68 add r6, r6, r9, lsr #3
69 add r6, r6, r6, lsr #8
70 add r6, r6, r6, lsr #4
73 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
77 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
87 orrne r6, r9, r6, lsr #4 @ combine nibbles } else
91 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
[all …]
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| /arch/arm/mach-ks8695/include/mach/ |
| D | entry-macro.S | 30 moveq \irqstat, \irqstat, lsr #8
33 moveq \irqstat, \irqstat, lsr #8
36 moveq \irqstat, \irqstat, lsr #8
39 moveq \irqstat, \irqstat, lsr #4
42 moveq \irqstat, \irqstat, lsr #2
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| /arch/arm/mach-sa1100/include/mach/ |
| D | entry-macro.S | 23 moveq \irqstat, \irqstat, lsr #8
26 moveq \irqstat, \irqstat, lsr #8
29 moveq \irqstat, \irqstat, lsr #8
32 moveq \irqstat, \irqstat, lsr #4
35 moveq \irqstat, \irqstat, lsr #2
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| /arch/arm/crypto/ |
| D | aes-armv4.S | 213 mov r4,r0,lsr#24 @ write output in endian-neutral
214 mov r5,r0,lsr#16 @ manner...
215 mov r6,r0,lsr#8
218 mov r4,r1,lsr#24
220 mov r5,r1,lsr#16
222 mov r6,r1,lsr#8
225 mov r4,r2,lsr#24
227 mov r5,r2,lsr#16
229 mov r6,r2,lsr#8
232 mov r4,r3,lsr#24
[all …]
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| /arch/mips/include/asm/netlogic/xlp-hal/ |
| D | uart.h | 123 uint32_t lsr; in nlm_uart_outbyte() local
126 lsr = nlm_read_uart_reg(base, UART_LINE_STS); in nlm_uart_outbyte()
127 if (lsr & 0x20) in nlm_uart_outbyte()
137 int data, lsr; in nlm_uart_inbyte() local
140 lsr = nlm_read_uart_reg(base, UART_LINE_STS); in nlm_uart_inbyte()
141 if (lsr & 0x80) { /* parity/frame/break-error - push a zero */ in nlm_uart_inbyte()
145 if (lsr & 0x01) { /* Rx data */ in nlm_uart_inbyte()
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| /arch/avr32/lib/ |
| D | findbit.S | 33 lsr r8, r10, 5
46 lsr r8, r8, r10
97 lsr r8, r10, 5
109 lsr r8, r8, r10
127 lsr r8, r10, 5
139 lsr r8, r8, r10
157 lsr r8, r10, 5
170 lsr r8, r8, r10
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| D | __avr32_lsr64.S | 23 lsr r11, r11, r12
24 lsr r10, r10, r12
29 lsr r10, r11, r9
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| /arch/arm/mach-ebsa110/include/mach/ |
| D | entry-macro.S | 24 moveq \stat, \stat, lsr #4
27 moveq \stat, \stat, lsr #2
30 moveq \stat, \stat, lsr #1
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| /arch/mips/jz4740/ |
| D | prom.c | 61 uint8_t lsr; in prom_putchar() local
64 lsr = readb(UART_REG(UART_LSR)); in prom_putchar()
65 } while ((lsr & UART_LSR_TEMT) == 0); in prom_putchar()
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| /arch/arm64/lib/ |
| D | memcmp.S | 69 lsr limit_wd, limit_wd, #3 /* Convert to Dwords. */
95 CPU_BE( lsr mask, mask, limit )
119 lsr limit_wd, limit_wd, #3
121 add limit_wd, limit_wd, tmp3, lsr #3
130 CPU_LE( lsr tmp2, tmp2, tmp1 )
166 lsr limit_wd, limit, #3
175 lsr limit_wd, limit, #3
237 lsr data1, data1, #56
238 sub result, data1, data2, lsr #56
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| D | bitops.S | 32 add x1, x1, x0, lsr #3 // Get word offset
47 add x1, x1, x0, lsr #3 // Get word offset
50 lsr x0, x2, x3 // Save old value of bit
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| D | strnlen.S | 70 lsr limit_wd, limit_wd, #4 /* Convert to Qwords. */
125 add len, len, pos, lsr #3 /* Bits to bytes. */
145 lsr limit_wd, limit_wd, #4
148 add limit_wd, limit_wd, tmp3, lsr #4
157 CPU_LE( lsr tmp2, tmp2, tmp4 ) /* Shift (tmp1 & 63). */
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| /arch/arm/boot/compressed/ |
| D | ll_char_wr.S | 86 mov ip, r7, lsr #4
96 mov ip, r7, lsr #4
117 mov r4, r4, lsr #8
119 mov r4, r4, lsr #8
121 mov r4, r4, lsr #8
124 mov r7, r7, lsr #8
126 mov r7, r7, lsr #8
128 mov r7, r7, lsr #8
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| /arch/arm/mach-omap2/ |
| D | omap-headsmp.S | 37 mov r0, r0, lsr #5
53 mov r0, r0, lsr #5
75 mov r0, r0, lsr #9
92 mov r0, r0, lsr #9
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