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Searched refs:omap_writew (Results 1 – 18 of 18) sorted by relevance

/arch/arm/mach-omap1/
Dlcd_dma.c240 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); in set_b1_regs()
241 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); in set_b1_regs()
242 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); in set_b1_regs()
243 omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L); in set_b1_regs()
249 omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U); in set_b1_regs()
250 omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L); in set_b1_regs()
251 omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U); in set_b1_regs()
252 omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L); in set_b1_regs()
254 omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1); in set_b1_regs()
255 omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1); in set_b1_regs()
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Dreset.c33 omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL); in omap1_restart()
34 omap_writew(0x8, ARM_RSTCT1); in omap1_restart()
37 omap_writew(1, ARM_RSTCT1); in omap1_restart()
Dio.c130 omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); in omap1_init_early()
131 omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); in omap1_init_early()
172 void omap_writew(u16 v, u32 pa) in omap_writew() function
176 EXPORT_SYMBOL(omap_writew);
Dpm.c226 omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG); in omap1_pm_suspend()
296 omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); in omap1_pm_suspend()
300 omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); in omap1_pm_suspend()
303 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); in omap1_pm_suspend()
357 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); in omap1_pm_suspend()
405 omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); in omap1_pm_suspend()
679 omap_writew(ULPD_SETUP_ANALOG_CELL_3_VAL, ULPD_SETUP_ANALOG_CELL_3); in omap_pm_init()
682 omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); in omap_pm_init()
Dboard-palmtt.c250 omap_writew(0x8000, OMAP_WDT_TIMER_MODE); in omap_mpu_wdt_mode()
252 omap_writew(0x00f5, OMAP_WDT_TIMER_MODE); in omap_mpu_wdt_mode()
253 omap_writew(0x00a0, OMAP_WDT_TIMER_MODE); in omap_mpu_wdt_mode()
Dboard-palmz71.c232 omap_writew(0x8000, OMAP_WDT_TIMER_MODE); in omap_mpu_wdt_mode()
234 omap_writew(0x00f5, OMAP_WDT_TIMER_MODE); in omap_mpu_wdt_mode()
235 omap_writew(0x00a0, OMAP_WDT_TIMER_MODE); in omap_mpu_wdt_mode()
Dclock_data.c782 omap_writew(reg, SOFT_REQ_REG); in omap1_clk_init()
784 omap_writew(0, SOFT_REQ_REG2); in omap1_clk_init()
825 omap_writew(0x1000, ARM_SYSST); in omap1_clk_init()
863 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, in omap1_clk_init()
876 omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); in omap1_clk_init()
878 omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); in omap1_clk_init()
881 omap_writew(0, ARM_RSTCT1); in omap1_clk_init()
882 omap_writew(1, ARM_RSTCT2); in omap1_clk_init()
883 omap_writew(0x400, ARM_IDLECT1); in omap1_clk_init()
890 omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */ in omap1_clk_init()
Dusb.c116 omap_writew(w, ULPD_SOFT_REQ); in omap_otg_init()
121 omap_writew(w, ULPD_CLOCK_CTRL); in omap_otg_init()
590 omap_writew(w, ULPD_APLL_CTRL); in omap_1510_usb_init()
594 omap_writew(w, ULPD_DPLL_CTRL); in omap_1510_usb_init()
598 omap_writew(w, ULPD_SOFT_REQ); in omap_1510_usb_init()
Dboard-nokia770.c275 omap_writew((omap_readw(0xfffb5008) & ~2), 0xfffb5008); in omap_nokia770_init()
277 omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); in omap_nokia770_init()
Dboard-voiceblue.c226 omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL); in voiceblue_restart()
227 omap_writew(0x8, ARM_RSTCT1); in voiceblue_restart()
Dtimer32k.c91 omap_writew(val, OMAP1_32K_TIMER_BASE + reg); in omap_32k_timer_write()
Dboard-htcherald.c483 omap_writew(reg, OMAP_DMA_LCD_CCR); in htcherald_lcd_init()
487 omap_writew(reg, OMAP_DMA_LCD_CTRL); in htcherald_lcd_init()
Dpm.h156 #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x))
Dboard-perseus2.c248 omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); in omap_perseus2_init()
Dboard-fsample.c280 omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); in omap_fsample_init()
Dboard-ams-delta.c505 omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1); in ams_delta_init()
Dclock.c274 omap_writew(regval, ARM_CKCTL); in omap1_clk_set_rate_ckctl_arm()
/arch/arm/mach-omap1/include/mach/
Dhardware.h51 extern void omap_writew(u16 v, u32 pa);