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Searched refs:pclk (Results 1 – 25 of 50) sorted by relevance

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/arch/avr32/mach-at32ap/
Dpdc.c16 struct clk *pclk, *hclk; in pdc_probe() local
18 pclk = clk_get(&pdev->dev, "pclk"); in pdc_probe()
19 if (IS_ERR(pclk)) { in pdc_probe()
21 return PTR_ERR(pclk); in pdc_probe()
26 clk_put(pclk); in pdc_probe()
30 clk_enable(pclk); in pdc_probe()
Dhsmc.c26 struct clk *pclk; member
220 struct clk *pclk, *mck; in hsmc_probe() local
229 pclk = clk_get(&pdev->dev, "pclk"); in hsmc_probe()
230 if (IS_ERR(pclk)) in hsmc_probe()
231 return PTR_ERR(pclk); in hsmc_probe()
243 clk_enable(pclk); in hsmc_probe()
246 hsmc->pclk = pclk; in hsmc_probe()
261 clk_disable(pclk); in hsmc_probe()
266 clk_put(pclk); in hsmc_probe()
Dintc.c94 struct clk *pclk; in init_IRQ() local
103 pclk = clk_get(&at32_intc0_device.dev, "pclk"); in init_IRQ()
104 if (IS_ERR(pclk)) { in init_IRQ()
109 clk_enable(pclk); in init_IRQ()
/arch/arm/boot/dts/
Dversatile-ab.dts52 pclk: pclk@24M { label
120 clocks = <&pclk>;
128 clocks = <&xtal24mhz>, <&pclk>;
136 clocks = <&xtal24mhz>, <&pclk>;
144 clocks = <&xtal24mhz>, <&pclk>;
151 clocks = <&pclk>;
158 clocks = <&pclk>;
166 clocks = <&osc1>, <&pclk>;
173 clocks = <&pclk>;
181 clocks = <&pclk>;
[all …]
Decx-common.dtsi60 clocks = <&pclk>;
70 clocks = <&pclk>;
81 clocks = <&pclk>;
92 clocks = <&pclk>;
103 clocks = <&pclk>;
112 clocks = <&pclk>;
120 clocks = <&pclk>;
128 clocks = <&pclk>;
197 pclk: pclk { label
209 clocks = <&pclk>;
Dversatile-pb.dts16 clocks = <&pclk>;
28 clocks = <&pclk>;
38 clocks = <&xtal24mhz>, <&pclk>;
53 clocks = <&xtal24mhz>, <&pclk>;
Dintegratorcp.dts53 pclk: pclk@0 { label
159 clocks = <&pclk>;
165 clocks = <&uartclk>, <&pclk>;
171 clocks = <&uartclk>, <&pclk>;
177 clocks = <&kmiclk>, <&pclk>;
183 clocks = <&kmiclk>, <&pclk>;
195 clocks = <&uartclk>, <&pclk>;
203 clocks = <&pclk>;
211 clocks = <&auxosc>, <&pclk>;
Dste-nomadik-stn8815.dtsi32 clocks = <&timclk>, <&pclk>;
41 clocks = <&timclk>, <&pclk>;
55 clocks = <&pclk>;
68 clocks = <&pclk>;
81 clocks = <&pclk>;
94 clocks = <&pclk>;
227 pclk: pclk@0 { label
326 clocks = <&pclk>;
332 clocks = <&pclk>;
338 clocks = <&pclk>;
[all …]
Dintegratorap.dts29 pclk: pclk@0 { label
121 clocks = <&pclk>;
128 clocks = <&uartclk>, <&pclk>;
135 clocks = <&uartclk>, <&pclk>;
142 clocks = <&xtal24mhz>, <&pclk>;
149 clocks = <&xtal24mhz>, <&pclk>;
Dzynq-7000.dtsi79 clock-names = "can_clk", "pclk";
91 clock-names = "can_clk", "pclk";
157 clock-names = "uart_clk", "pclk";
166 clock-names = "uart_clk", "pclk";
178 clock-names = "ref_clk", "pclk";
190 clock-names = "ref_clk", "pclk";
201 clock-names = "pclk", "hclk", "tx_clk";
212 clock-names = "pclk", "hclk", "tx_clk";
Dpicoxcell-pc3x2.dtsi40 pclk: clock@0 { label
42 clock-outputs = "bus", "pclk";
103 ref-clock = <&pclk>, "ref";
118 ref-clock = <&pclk>, "ref";
222 bus-clock = <&pclk>, "bus";
Dat91sam9x5_macb1.dtsi50 clock-names = "hclk", "pclk";
/arch/arm/mach-spear/
Dspear3xx.c92 struct clk *gpt_clk, *pclk; in spear3xx_timer_init() local
104 pclk = clk_get(NULL, pclk_name); in spear3xx_timer_init()
105 if (IS_ERR(pclk)) { in spear3xx_timer_init()
111 clk_set_parent(gpt_clk, pclk); in spear3xx_timer_init()
113 clk_put(pclk); in spear3xx_timer_init()
Dspear13xx.c103 struct clk *gpt_clk, *pclk; in spear13xx_timer_init() local
115 pclk = clk_get(NULL, pclk_name); in spear13xx_timer_init()
116 if (IS_ERR(pclk)) { in spear13xx_timer_init()
122 clk_set_parent(gpt_clk, pclk); in spear13xx_timer_init()
124 clk_put(pclk); in spear13xx_timer_init()
Dspear6xx.c379 struct clk *gpt_clk, *pclk; in spear6xx_timer_init() local
391 pclk = clk_get(NULL, pclk_name); in spear6xx_timer_init()
392 if (IS_ERR(pclk)) { in spear6xx_timer_init()
398 clk_set_parent(gpt_clk, pclk); in spear6xx_timer_init()
400 clk_put(pclk); in spear6xx_timer_init()
/arch/avr32/boards/hammerhead/
Dsetup.c132 struct clk *pclk; in set_hw_addr() local
151 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
153 if (IS_ERR(pclk)) in set_hw_addr()
156 clk_enable(pclk); in set_hw_addr()
162 clk_disable(pclk); in set_hw_addr()
163 clk_put(pclk); in set_hw_addr()
/arch/arm/mach-omap2/
Ddpll3xxx.c644 struct clk_hw_omap *pclk = NULL; in omap3_find_clkoutx2_dpll() local
655 pclk = to_clk_hw_omap(hw); in omap3_find_clkoutx2_dpll()
656 } while (pclk && !pclk->dpll_data); in omap3_find_clkoutx2_dpll()
659 if (!pclk) { in omap3_find_clkoutx2_dpll()
664 return pclk; in omap3_find_clkoutx2_dpll()
680 struct clk_hw_omap *pclk = NULL; in omap3_clkoutx2_recalc() local
685 pclk = omap3_find_clkoutx2_dpll(hw); in omap3_clkoutx2_recalc()
687 if (!pclk) in omap3_clkoutx2_recalc()
690 dd = pclk->dpll_data; in omap3_clkoutx2_recalc()
694 v = omap2_clk_readl(pclk, dd->control_reg) & dd->enable_mask; in omap3_clkoutx2_recalc()
[all …]
/arch/avr32/boards/mimc200/
Dsetup.c147 struct clk *pclk; in set_hw_addr() local
164 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
165 if (IS_ERR(pclk)) in set_hw_addr()
168 clk_enable(pclk); in set_hw_addr()
172 clk_disable(pclk); in set_hw_addr()
173 clk_put(pclk); in set_hw_addr()
/arch/avr32/boards/atstk1000/
Datstk1002.c184 struct clk *pclk; in set_hw_addr() local
201 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
202 if (IS_ERR(pclk)) in set_hw_addr()
205 clk_enable(pclk); in set_hw_addr()
209 clk_disable(pclk); in set_hw_addr()
210 clk_put(pclk); in set_hw_addr()
/arch/avr32/boards/merisc/
Dsetup.c125 struct clk *pclk; in set_hw_addr() local
138 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
139 if (IS_ERR(pclk)) in set_hw_addr()
142 clk_enable(pclk); in set_hw_addr()
146 clk_disable(pclk); in set_hw_addr()
147 clk_put(pclk); in set_hw_addr()
/arch/avr32/boards/atngw100/
Dsetup.c170 struct clk *pclk; in set_hw_addr() local
187 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
188 if (IS_ERR(pclk)) in set_hw_addr()
191 clk_enable(pclk); in set_hw_addr()
195 clk_disable(pclk); in set_hw_addr()
196 clk_put(pclk); in set_hw_addr()
/arch/arm/mach-mv78xx0/
Dcommon.c78 static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk) in get_pclk_l2clk() argument
96 *pclk = ((u64)hclk * (2 + (cfg & 0xf))) >> 1; in get_pclk_l2clk()
102 *l2clk = *pclk / (((cfg >> 4) & 3) + 1); in get_pclk_l2clk()
394 int pclk; in mv78xx0_init() local
399 get_pclk_l2clk(hclk, core_index, &pclk, &l2clk); in mv78xx0_init()
403 printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000); in mv78xx0_init()
/arch/avr32/boards/favr-32/
Dsetup.c196 struct clk *pclk; in set_hw_addr() local
213 pclk = clk_get(&pdev->dev, "pclk"); in set_hw_addr()
214 if (IS_ERR(pclk)) in set_hw_addr()
217 clk_enable(pclk); in set_hw_addr()
221 clk_disable(pclk); in set_hw_addr()
222 clk_put(pclk); in set_hw_addr()
/arch/arm/mach-exynos/
Dpm_domains.c39 struct clk *pclk[MAX_CLK_PER_DOMAIN]; member
89 if (clk_set_parent(pd->clk[i], pd->pclk[i])) in exynos_pd_power()
146 pd->pclk[i] = clk_get(dev, clk_name); in exynos4_pm_init_power_domain()
147 if (IS_ERR(pd->pclk[i])) { in exynos4_pm_init_power_domain()
/arch/arm/plat-samsung/include/plat/
Dcpu-freq.h40 unsigned long pclk; member

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