| /arch/x86/pci/ |
| D | early.c | 10 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config() argument
13 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config()
18 u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config_byte() argument
21 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_byte()
26 u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config_16() argument
29 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_16()
34 void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, in write_pci_config() argument
37 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config()
41 void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) in write_pci_config_byte() argument
43 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config_byte()
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| D | broadcom_bus.c | 22 static void __init cnb20le_res(u8 bus, u8 slot, u8 func) in cnb20le_res() argument
31 fbus = read_pci_config_byte(bus, slot, func, 0x44); in cnb20le_res()
32 lbus = read_pci_config_byte(bus, slot, func, 0x45); in cnb20le_res()
50 word1 = read_pci_config_16(bus, slot, func, 0xc0); in cnb20le_res()
51 word2 = read_pci_config_16(bus, slot, func, 0xc2); in cnb20le_res()
60 word1 = read_pci_config_16(bus, slot, func, 0xc4); in cnb20le_res()
61 word2 = read_pci_config_16(bus, slot, func, 0xc6); in cnb20le_res()
70 word1 = read_pci_config_16(bus, slot, func, 0xd0); in cnb20le_res()
71 word2 = read_pci_config_16(bus, slot, func, 0xd2); in cnb20le_res()
91 u8 bus = 0, slot = 0; in broadcom_postcore_init() local
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| /arch/x86/kernel/ |
| D | aperture_64.c | 95 static u32 __init find_cap(int bus, int slot, int func, int cap) in find_cap() argument
100 if (!(read_pci_config_16(bus, slot, func, PCI_STATUS) & in find_cap()
104 pos = read_pci_config_byte(bus, slot, func, PCI_CAPABILITY_LIST); in find_cap()
109 id = read_pci_config_byte(bus, slot, func, pos+PCI_CAP_LIST_ID); in find_cap()
114 pos = read_pci_config_byte(bus, slot, func, in find_cap()
121 static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order) in read_agp() argument
130 pr_info("pci 0000:%02x:%02x:%02x: AGP bridge\n", bus, slot, func); in read_agp()
131 apsizereg = read_pci_config_16(bus, slot, func, cap + 0x14); in read_agp()
134 bus, slot, func); in read_agp()
150 aper_low = read_pci_config(bus, slot, func, 0x10); in read_agp()
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| D | early-quirks.c | 30 #define dev_err(msg) pr_err("pci 0000:%02x:%02x.%d: %s", bus, slot, func, msg)
32 static void __init fix_hypertransport_config(int num, int slot, int func) in fix_hypertransport_config() argument
41 htcfg = read_pci_config(num, slot, func, 0x68); in fix_hypertransport_config()
51 write_pci_config(num, slot, func, 0x68, htcfg); in fix_hypertransport_config()
58 static void __init via_bugs(int num, int slot, int func) in via_bugs() argument
81 static void __init nvidia_bugs(int num, int slot, int func) in nvidia_bugs() argument
117 static u32 __init ati_ixp4x0_rev(int num, int slot, int func) in ati_ixp4x0_rev() argument
122 b = read_pci_config_byte(num, slot, func, 0xac); in ati_ixp4x0_rev()
124 write_pci_config_byte(num, slot, func, 0xac, b); in ati_ixp4x0_rev()
126 d = read_pci_config(num, slot, func, 0x70); in ati_ixp4x0_rev()
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| /arch/sh/drivers/pci/ |
| D | fixups-cayman.c | 8 int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) in pcibios_map_platform_irq() argument
32 int slot; in pcibios_map_platform_irq() member
39 slot = path[i].slot = PCI_SLOT(dev->devfn); in pcibios_map_platform_irq()
46 slot = PCI_SLOT(dev->devfn); in pcibios_map_platform_irq()
51 if ((slot < 3) || (i == 0)) { in pcibios_map_platform_irq()
57 slot = path[i].slot; in pcibios_map_platform_irq()
59 if (slot > 0) { in pcibios_map_platform_irq()
65 slot = path[i].slot; in pcibios_map_platform_irq()
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| /arch/sparc/include/asm/ |
| D | parport.h | 114 int slot, err; in ecpp_probe() local
127 for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) { in ecpp_probe()
128 if (!test_and_set_bit(slot, dma_slot_map)) in ecpp_probe()
132 if (slot >= PARPORT_PC_MAX_PORTS) in ecpp_probe()
135 spin_lock_init(&sparc_ebus_dmas[slot].info.lock); in ecpp_probe()
138 sparc_ebus_dmas[slot].info.regs = in ecpp_probe()
141 if (!sparc_ebus_dmas[slot].info.regs) in ecpp_probe()
144 sparc_ebus_dmas[slot].info.flags = 0; in ecpp_probe()
145 sparc_ebus_dmas[slot].info.callback = NULL; in ecpp_probe()
146 sparc_ebus_dmas[slot].info.client_cookie = NULL; in ecpp_probe()
[all …]
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| /arch/powerpc/platforms/cell/ |
| D | beat_htab.c | 96 u64 hpte_v, hpte_r, slot; in beat_lpar_hpte_insert() local
126 hpte_v, hpte_r, &slot); in beat_lpar_hpte_insert()
140 DBG_LOW(" -> slot: %lx\n", slot); in beat_lpar_hpte_insert()
143 return (slot ^ hpte_group) & 15; in beat_lpar_hpte_insert()
152 static unsigned long beat_lpar_hpte_getword0(unsigned long slot) in beat_lpar_hpte_getword0() argument
158 lpar_rc = beat_read_htab_entries(0, slot & ~3UL, dword); in beat_lpar_hpte_getword0()
160 dword0 = dword[slot&3]; in beat_lpar_hpte_getword0()
185 static long beat_lpar_hpte_updatepp(unsigned long slot, in beat_lpar_hpte_updatepp() argument
199 want_v & HPTE_V_AVPN, slot, psize, newpp); in beat_lpar_hpte_updatepp()
202 dummy0 = beat_lpar_hpte_getword0(slot); in beat_lpar_hpte_updatepp()
[all …]
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| /arch/arm/mach-pxa/ |
| D | cm-x2xx-pci.c | 80 static int __init cmx2xx_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in cmx2xx_pci_map_irq() argument
84 dev_dbg(&dev->dev, "%s: slot=%x, pin=%x\n", __func__, slot, pin); in cmx2xx_pci_map_irq()
86 irq = it8152_pci_map_irq(dev, slot, pin); in cmx2xx_pci_map_irq()
96 if (slot == 7) in cmx2xx_pci_map_irq()
100 if (slot == 8 || slot == 0) in cmx2xx_pci_map_irq()
104 if (slot == 9) in cmx2xx_pci_map_irq()
108 if (slot == 15) in cmx2xx_pci_map_irq()
112 if (slot == 16) in cmx2xx_pci_map_irq()
116 if ((slot == 17) || (slot == 19)) in cmx2xx_pci_map_irq()
118 if ((slot == 18) || (slot == 20)) in cmx2xx_pci_map_irq()
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| /arch/mips/pci/ |
| D | fixup-rbtx4938.c | 16 int __init rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in rbtx4938_pci_map_irq() argument
18 int irq = tx4938_pcic1_map_irq(dev, slot); in rbtx4938_pci_map_irq()
25 if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) { in rbtx4938_pci_map_irq()
28 irq = (irq + 0 + slot) % 4; in rbtx4938_pci_map_irq()
32 irq = (irq + 33 - slot) % 4; in rbtx4938_pci_map_irq()
34 irq = (irq + 3 + slot) % 4; in rbtx4938_pci_map_irq()
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| D | fixup-jmr3927.c | 34 int __init jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in jmr3927_pci_map_irq() argument
40 if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) { in jmr3927_pci_map_irq()
45 } else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) { in jmr3927_pci_map_irq()
53 irq = (irq + 33 - slot) % 4; in jmr3927_pci_map_irq()
55 irq = (irq + 3 + slot) % 4; in jmr3927_pci_map_irq()
76 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) in jmr3927_pci_map_irq()
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| D | pci-ip27.c | 50 int slot; in bridge_probe() local
121 for (slot = 0; slot < 8; slot ++) { in bridge_probe()
122 bridge->b_device[slot].reg |= BRIDGE_DEV_SWAP_DIR; in bridge_probe()
123 bc->pci_int[slot] = -1; in bridge_probe()
145 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in pcibios_map_irq() argument
165 int slot = PCI_SLOT(rdev->devfn); in pcibios_plat_dev_init() local
168 irq = bc->pci_int[slot]; in pcibios_plat_dev_init()
174 bc->pci_int[slot] = irq; in pcibios_plat_dev_init()
178 irq_to_slot[irq] = slot; in pcibios_plat_dev_init()
196 int slot = PCI_SLOT(dev->devfn); in pci_disable_swapping() local
[all …]
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| D | fixup-rbtx4927.c | 39 int __init rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in rbtx4927_pci_map_irq() argument
45 if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) { in rbtx4927_pci_map_irq()
48 irq = (irq + 0 + slot) % 4; in rbtx4927_pci_map_irq()
52 irq = (irq + 33 - slot) % 4; in rbtx4927_pci_map_irq()
54 irq = (irq + 3 + slot) % 4; in rbtx4927_pci_map_irq()
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| /arch/arm/mach-iop32x/ |
| D | iq80321.c | 71 iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in iq80321_pci_map_irq() argument
75 if ((slot == 2 || slot == 6) && pin == 1) { in iq80321_pci_map_irq()
78 } else if ((slot == 2 || slot == 6) && pin == 2) { in iq80321_pci_map_irq()
81 } else if ((slot == 2 || slot == 6) && pin == 3) { in iq80321_pci_map_irq()
84 } else if ((slot == 2 || slot == 6) && pin == 4) { in iq80321_pci_map_irq()
87 } else if (slot == 4 || slot == 8) { in iq80321_pci_map_irq()
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| /arch/arm/common/ |
| D | edma.c | 392 u32 slot; in dma_irq_handler() local
397 slot = __ffs(sh_ipr); in dma_irq_handler()
398 sh_ipr &= ~(BIT(slot)); in dma_irq_handler()
400 if (sh_ier & BIT(slot)) { in dma_irq_handler()
401 channel = (bank << 5) | slot; in dma_irq_handler()
404 BIT(slot)); in dma_irq_handler()
760 int edma_alloc_slot(unsigned ctlr, int slot) in edma_alloc_slot() argument
765 if (slot >= 0) in edma_alloc_slot()
766 slot = EDMA_CHAN_SLOT(slot); in edma_alloc_slot()
768 if (slot < 0) { in edma_alloc_slot()
[all …]
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| /arch/sh/mm/ |
| D | ioremap_fixed.c | 53 int i, slot; in ioremap_fixed() local
62 slot = -1; in ioremap_fixed()
67 slot = i; in ioremap_fixed()
72 if (slot < 0) in ioremap_fixed()
85 idx0 = FIX_IOREMAP_BEGIN + slot; in ioremap_fixed()
104 int i, slot; in iounmap_fixed() local
106 slot = -1; in iounmap_fixed()
110 slot = i; in iounmap_fixed()
118 if (slot < 0) in iounmap_fixed()
123 idx = FIX_IOREMAP_BEGIN + slot + nrpages - 1; in iounmap_fixed()
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| /arch/x86/include/asm/ |
| D | pci-direct.h | 9 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
10 extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset);
11 extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset);
12 extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val);
13 extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val);
14 extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val);
19 extern void early_dump_pci_device(u8 bus, u8 slot, u8 func);
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| /arch/ia64/kernel/ |
| D | kprobes.c | 100 static void __kprobes update_kprobe_inst_flag(uint template, uint slot, in update_kprobe_inst_flag() argument
107 p->ainsn.slot = slot; in update_kprobe_inst_flag()
120 if (bundle_encoding[template][slot] == B) { in update_kprobe_inst_flag()
136 } else if (bundle_encoding[template][slot] == X) { in update_kprobe_inst_flag()
153 static uint __kprobes is_cmp_ctype_unc_inst(uint template, uint slot, in is_cmp_ctype_unc_inst() argument
160 if (!((bundle_encoding[template][slot] == I) || in is_cmp_ctype_unc_inst()
161 (bundle_encoding[template][slot] == M))) in is_cmp_ctype_unc_inst()
189 static int __kprobes unsupported_inst(uint template, uint slot, in unsupported_inst() argument
197 if (is_cmp_ctype_unc_inst(template, slot, major_opcode, kprobe_inst)) { in unsupported_inst()
198 if (slot == 1 && qp) { in unsupported_inst()
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| /arch/arm/mach-ixp4xx/ |
| D | gtwx5715-pci.c | 52 static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in gtwx5715_map_irq() argument
56 if ((slot == SLOT0_DEVID && pin == 1) || in gtwx5715_map_irq()
57 (slot == SLOT1_DEVID && pin == 2)) in gtwx5715_map_irq()
59 else if ((slot == SLOT0_DEVID && pin == 2) || in gtwx5715_map_irq()
60 (slot == SLOT1_DEVID && pin == 1)) in gtwx5715_map_irq()
64 __func__, slot, pin, rc); in gtwx5715_map_irq()
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| D | fsg-pci.c | 41 static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in fsg_map_irq() argument
50 slot -= 11; in fsg_map_irq()
52 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) in fsg_map_irq()
53 irq = pci_irq_table[slot - 1]; in fsg_map_irq()
55 __func__, slot, pin, irq); in fsg_map_irq()
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| /arch/arm/mach-omap2/ |
| D | board-n8x0.c | 188 static int n8x0_mmc_switch_slot(struct device *dev, int slot) in n8x0_mmc_switch_slot() argument
191 dev_dbg(dev, "Choose slot %d\n", slot + 1); in n8x0_mmc_switch_slot()
193 gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); in n8x0_mmc_switch_slot()
197 static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, in n8x0_mmc_set_power_menelaus() argument
203 dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, in n8x0_mmc_set_power_menelaus()
206 if (slot == 0) { in n8x0_mmc_set_power_menelaus()
284 static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, in n8x0_mmc_set_power() argument
287 if (board_is_n800() || slot == 0) in n8x0_mmc_set_power()
288 return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); in n8x0_mmc_set_power()
295 static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) in n8x0_mmc_set_bus_mode() argument
[all …]
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| /arch/powerpc/platforms/pseries/ |
| D | lpar.c | 132 unsigned long slot; in pSeries_lpar_hpte_insert() local
161 lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot); in pSeries_lpar_hpte_insert()
179 pr_devel(" -> slot: %lu\n", slot & 7); in pSeries_lpar_hpte_insert()
184 return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3); in pSeries_lpar_hpte_insert()
283 static long pSeries_lpar_hpte_updatepp(unsigned long slot, in pSeries_lpar_hpte_updatepp() argument
296 want_v, slot, flags, psize); in pSeries_lpar_hpte_updatepp()
298 lpar_rc = plpar_pte_protect(flags, slot, want_v); in pSeries_lpar_hpte_updatepp()
312 static unsigned long pSeries_lpar_hpte_getword0(unsigned long slot) in pSeries_lpar_hpte_getword0() argument
324 lpar_rc = plpar_pte_read(flags, slot, &dword0, &dummy_word1); in pSeries_lpar_hpte_getword0()
335 long slot; in pSeries_lpar_hpte_find() local
[all …]
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| /arch/powerpc/mm/ |
| D | hugepage-hash64.c | 27 unsigned long hidx, shift, vpn, hash, slot; in invalidate_old_hpte() local
64 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; in invalidate_old_hpte()
65 slot += hidx & _PTEIDX_GROUP_IX; in invalidate_old_hpte()
66 ppc_md.hpte_invalidate(slot, vpn, psize, in invalidate_old_hpte()
81 unsigned long vpn, hash, shift, slot; in __hash_page_thp() local
157 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; in __hash_page_thp()
158 slot += hidx & _PTEIDX_GROUP_IX; in __hash_page_thp()
160 ret = ppc_md.hpte_updatepp(slot, rflags, vpn, in __hash_page_thp()
195 slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0, in __hash_page_thp()
200 if (unlikely(slot == -1)) { in __hash_page_thp()
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| D | hugetlbpage-hash64.c | 28 long slot; in __hash_page_huge() local
75 unsigned long hash, slot; in __hash_page_huge() local
80 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; in __hash_page_huge()
81 slot += (old_pte & _PAGE_F_GIX) >> 12; in __hash_page_huge()
83 if (ppc_md.hpte_updatepp(slot, rflags, vpn, mmu_psize, in __hash_page_huge()
107 slot = hpte_insert_repeating(hash, vpn, pa, rflags, 0, in __hash_page_huge()
114 if (unlikely(slot == -2)) { in __hash_page_huge()
121 new_pte |= (slot << 12) & (_PAGE_F_SECOND | _PAGE_F_GIX); in __hash_page_huge()
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| D | hash_native_64.c | 284 static long native_hpte_updatepp(unsigned long slot, unsigned long newpp, in native_hpte_updatepp() argument
288 struct hash_pte *hptep = htab_address + slot; in native_hpte_updatepp()
295 vpn, want_v & HPTE_V_AVPN, slot, newpp); in native_hpte_updatepp()
329 long slot; in native_hpte_find() local
336 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; in native_hpte_find()
338 hptep = htab_address + slot; in native_hpte_find()
343 return slot; in native_hpte_find()
344 ++slot; in native_hpte_find()
362 long slot; in native_hpte_updateboltedpp() local
368 slot = native_hpte_find(vpn, psize, ssize); in native_hpte_updateboltedpp()
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| /arch/arm/boot/dts/ |
| D | integratorap.dts | 90 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
91 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
92 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
93 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
95 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
96 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
97 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
98 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
100 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
101 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
[all …]
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