Searched refs:ull (Results 1 – 15 of 15) sorted by relevance
| /arch/parisc/lib/ |
| D | ucmpdi2.c | 4 unsigned long long ull; member
13 union ull_union au = {.ull = a}; in __ucmpdi2()
14 union ull_union bu = {.ull = b}; in __ucmpdi2()
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| /arch/s390/lib/ |
| D | ucmpdi2.c | 4 unsigned long long ull; member
13 union ull_union au = {.ull = a}; in __ucmpdi2()
14 union ull_union bu = {.ull = b}; in __ucmpdi2()
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| /arch/powerpc/include/asm/ |
| D | spu.h | 425 #define MFC_CNTL_RESUME_DMA_QUEUE (0ull << 0)
429 #define MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION (0ull << 8)
625 #define MFC_LSACR_COMPARE_MASK ((~0ull) << 32)
626 #define MFC_LSACR_COMPARE_ADDR ((~0ull) >> 32)
631 #define MFC_LSCRR_QI_MASK ((~0ull) << MFC_LSCRR_QI_SHIFT)
676 #define SPU_ECC_CNTL_E (1ull << 0ull)
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| /arch/powerpc/platforms/cell/spufs/ |
| D | spu_utils.h | 28 unsigned long long ull; member
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| D | switch.c | 849 u64 ull; in set_signot1() member
858 addr64.ull = (u64) csa->lscsa; in set_signot1()
867 u64 ull; in set_signot2() member
876 addr64.ull = (u64) csa->lscsa; in set_signot2()
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| D | file.c | 148 __simple_attr_check_format(__fmt, 0ull); \
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-pip.h | 47 CVMX_PIP_L4_NO_ERR = 0ull,
78 CVMX_PIP_IP_NO_ERR = 0ull,
102 CVMX_PIP_RX_NO_ERR = 0ull,
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| D | cvmx-pip-defs.h | 40 CVMX_PIP_PORT_CFG_MODE_NONE = 0ull,
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| /arch/powerpc/mm/ |
| D | init_32.c | 63 phys_addr_t memstart_addr = (phys_addr_t)~0ull;
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| /arch/mips/cavium-octeon/executive/ |
| D | cvmx-bootmem.c | 240 address_max = ~0ull; /* If no limits given, use max limits */ in cvmx_bootmem_phy_alloc()
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| /arch/x86/kernel/cpu/ |
| D | perf_event_intel.c | 1328 wrmsrl_safe(x86_pmu_config_addr(idx), 0ull); in intel_pmu_reset()
1329 wrmsrl_safe(x86_pmu_event_addr(idx), 0ull); in intel_pmu_reset()
1332 wrmsrl_safe(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull); in intel_pmu_reset()
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| /arch/mips/cavium-octeon/ |
| D | setup.c | 58 static unsigned long long RESERVE_LOW_MEM = 0ull;
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| /arch/x86/kvm/ |
| D | mmu.c | 596 __update_clear_spte_fast(sptep, 0ull); in mmu_spte_clear_track_bits()
598 old_spte = __update_clear_spte_slow(sptep, 0ull); in mmu_spte_clear_track_bits()
626 __update_clear_spte_fast(sptep, 0ull); in mmu_spte_clear_no_track()
1891 sp->spt[i] = 0ull; in init_shadow_page_table()
2816 u64 spte = 0ull; in fast_page_fault()
3213 u64 spte = 0ull; in walk_shadow_page_get_mmio_spte()
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| D | vmx.c | 9348 kvm_mmu_set_mask_ptes(0ull, in vmx_init()
9349 (enable_ept_ad_bits) ? VMX_EPT_ACCESS_BIT : 0ull, in vmx_init()
9350 (enable_ept_ad_bits) ? VMX_EPT_DIRTY_BIT : 0ull, in vmx_init()
9351 0ull, VMX_EPT_EXECUTABLE_MASK); in vmx_init()
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| D | emulate.c | 35 #define OpNone 0ull
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