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Searched refs:CMD2 (Results 1 – 3 of 3) sorted by relevance

/drivers/video/backlight/
Dtdo24m.c46 #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\ macro
60 CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
68 CMD2(0xB8, 0x80, 0x02), /* Output Control */
94 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
96 CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
97 CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
98 CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
107 CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
109 CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
110 CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
[all …]
/drivers/net/ethernet/amd/
Damd8111e.c475 writel( REX_UFLO, mmio + CMD2); in amd8111e_restart()
477 writel( VAL0 | APAD_XMT|REX_RTRY , mmio + CMD2); in amd8111e_restart()
479 writel( VAL0 | APAD_XMT | REX_RTRY|REX_UFLO, mmio + CMD2); in amd8111e_restart()
486 writel( VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2 ); in amd8111e_restart()
534 writel(CMD2_CLEAR, mmio +CMD2); in amd8111e_init_hw_default()
592 readl(mmio + CMD2); in amd8111e_init_hw_default()
1342 buf[5] = readl(mmio + CMD2); in amd8111e_read_regs()
1364 writel( VAL2 | PROM, lp->mmio + CMD2); in amd8111e_set_multicast_list()
1368 writel( PROM, lp->mmio + CMD2); in amd8111e_set_multicast_list()
1383 writel(PROM, lp->mmio + CMD2); in amd8111e_set_multicast_list()
[all …]
Damd8111e.h58 #define CMD2 0x50 /* Command2 register */ macro