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Searched refs:PLL_PLLCTRL_1 (Results 1 – 1 of 1) sorted by relevance

/drivers/net/phy/
Dbcm7xxx.c36 #define PLL_PLLCTRL_1 MISC_ADDR(0x32, 1) macro
110 phy_write_misc(phydev, PLL_PLLCTRL_1, 0x0048); in bcm7xxx_28nm_afe_config_init()