Searched refs:irq_enable_mask (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/i915/ |
| D | intel_ringbuffer.c | 1197 gen5_enable_gt_irq(dev_priv, ring->irq_enable_mask); in gen5_ring_get_irq()
1212 gen5_disable_gt_irq(dev_priv, ring->irq_enable_mask); in gen5_ring_put_irq()
1228 dev_priv->irq_mask &= ~ring->irq_enable_mask; in i9xx_ring_get_irq()
1246 dev_priv->irq_mask |= ring->irq_enable_mask; in i9xx_ring_put_irq()
1265 dev_priv->irq_mask &= ~ring->irq_enable_mask; in i8xx_ring_get_irq()
1283 dev_priv->irq_mask |= ring->irq_enable_mask; in i8xx_ring_put_irq()
1401 ~(ring->irq_enable_mask | in gen6_ring_get_irq()
1404 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in gen6_ring_get_irq()
1405 gen5_enable_gt_irq(dev_priv, ring->irq_enable_mask); in gen6_ring_get_irq()
1425 gen5_disable_gt_irq(dev_priv, ring->irq_enable_mask); in gen6_ring_put_irq()
[all …]
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| D | intel_lrc.c | 999 I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); in gen8_init_common_ring()
1071 I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); in gen8_logical_ring_get_irq()
1279 ring->irq_enable_mask = in logical_render_ring_init()
1307 ring->irq_enable_mask = in logical_bsd_ring_init()
1332 ring->irq_enable_mask = in logical_bsd2_ring_init()
1357 ring->irq_enable_mask = in logical_blt_ring_init()
1382 ring->irq_enable_mask = in logical_vebox_ring_init()
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| D | intel_ringbuffer.h | 144 u32 irq_enable_mask; /* bitmask to enable ring interrupt */ member
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| /drivers/gpu/drm/via/ |
| D | via_irq.c | 272 dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; in via_driver_irq_preinstall()
291 dev_priv->irq_enable_mask |= cur_irq->enable_mask; in via_driver_irq_preinstall()
303 ~(dev_priv->irq_enable_mask)); in via_driver_irq_preinstall()
321 | dev_priv->irq_enable_mask); in via_driver_irq_postinstall()
345 ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); in via_driver_irq_uninstall()
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| D | via_drv.h | 89 uint32_t irq_enable_mask; member
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| /drivers/dma/ |
| D | omap-dma.c | 35 uint32_t irq_enable_mask; member
488 status &= od->irq_enable_mask; in omap_dma_irq()
546 od->irq_enable_mask |= val; in omap_dma_alloc_chan_resources()
547 omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask); in omap_dma_alloc_chan_resources()
581 od->irq_enable_mask &= ~BIT(c->dma_ch); in omap_dma_free_chan_resources()
582 omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask); in omap_dma_free_chan_resources()
1166 od->irq_enable_mask = 0; in omap_dma_probe()
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| /drivers/pinctrl/ |
| D | pinctrl-single.c | 169 unsigned irq_enable_mask; member
769 if (pcs_soc->irq_enable_mask) { in pcs_add_pin()
773 if (val & pcs_soc->irq_enable_mask) { in pcs_add_pin()
776 val &= ~pcs_soc->irq_enable_mask; in pcs_add_pin()
1571 soc_mask = pcs_soc->irq_enable_mask; in pcs_irq_set()
1749 if (!pcs_soc->irq_enable_mask || in pcs_irq_init_chained_handler()
1983 .irq_enable_mask = (1 << 14), /* OMAP_WAKEUP_EN */
1989 .irq_enable_mask = (1 << 24), /* WAKEUPENABLE */
1995 .irq_enable_mask = (1 << 29), /* OMAP_WAKEUP_EN */
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