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Searched refs:phy_reg (Results 1 – 21 of 21) sorted by relevance

/drivers/net/ethernet/dec/tulip/
Dpnic.c23 u32 phy_reg = ioread32(ioaddr + 0xB8); in pnic_do_nway() local
26 if (phy_reg & 0x78000000) { /* Ignore baseT4 */ in pnic_do_nway()
27 if (phy_reg & 0x20000000) dev->if_port = 5; in pnic_do_nway()
28 else if (phy_reg & 0x40000000) dev->if_port = 3; in pnic_do_nway()
29 else if (phy_reg & 0x10000000) dev->if_port = 4; in pnic_do_nway()
30 else if (phy_reg & 0x08000000) dev->if_port = 0; in pnic_do_nway()
36 if (phy_reg & 0x30000000) { in pnic_do_nway()
42 phy_reg, medianame[dev->if_port]); in pnic_do_nway()
56 int phy_reg = ioread32(ioaddr + 0xB8); in pnic_lnk_change() local
60 phy_reg, csr5); in pnic_lnk_change()
[all …]
Ddmfe.c1690 u16 phy_reg; in dmfe_set_phyxcer() local
1698 phy_reg = dmfe_phy_read(db->ioaddr, in dmfe_set_phyxcer()
1702 db->phy_addr, 18, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1706 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; in dmfe_set_phyxcer()
1710 phy_reg |= db->PHY_reg4; in dmfe_set_phyxcer()
1714 case DMFE_10MHF: phy_reg |= 0x20; break; in dmfe_set_phyxcer()
1715 case DMFE_10MFD: phy_reg |= 0x40; break; in dmfe_set_phyxcer()
1716 case DMFE_100MHF: phy_reg |= 0x80; break; in dmfe_set_phyxcer()
1717 case DMFE_100MFD: phy_reg |= 0x100; break; in dmfe_set_phyxcer()
1719 if (db->chip_id == PCI_DM9009_ID) phy_reg &= 0x61; in dmfe_set_phyxcer()
[all …]
Duli526x.c1563 u16 phy_reg; in uli526x_set_phyxcer() local
1566 phy_reg = phy->read(db, db->phy_addr, 4) & ~0x01e0; in uli526x_set_phyxcer()
1570 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
1574 case ULI526X_10MHF: phy_reg |= 0x20; break; in uli526x_set_phyxcer()
1575 case ULI526X_10MFD: phy_reg |= 0x40; break; in uli526x_set_phyxcer()
1576 case ULI526X_100MHF: phy_reg |= 0x80; break; in uli526x_set_phyxcer()
1577 case ULI526X_100MFD: phy_reg |= 0x100; break; in uli526x_set_phyxcer()
1583 if ( !(phy_reg & 0x01e0)) { in uli526x_set_phyxcer()
1584 phy_reg|=db->PHY_reg4; in uli526x_set_phyxcer()
1587 phy->write(db, db->phy_addr, 4, phy_reg); in uli526x_set_phyxcer()
[all …]
/drivers/clk/hisilicon/
Dclk-hix5hd2.c142 u32 phy_reg; member
154 void __iomem *phy_reg; member
183 val = readl_relaxed(clk->phy_reg); in clk_ether_prepare()
186 writel_relaxed(val, clk->phy_reg); in clk_ether_prepare()
191 writel_relaxed(val, clk->phy_reg); in clk_ether_prepare()
196 writel_relaxed(val, clk->phy_reg); in clk_ether_prepare()
226 val = readl_relaxed(clk->phy_reg); in clk_complex_enable()
229 writel_relaxed(val, clk->phy_reg); in clk_complex_enable()
244 val = readl_relaxed(clk->phy_reg); in clk_complex_disable()
247 writel_relaxed(val, clk->phy_reg); in clk_complex_disable()
[all …]
/drivers/net/ethernet/intel/e1000e/
Dich8lan.c188 u16 phy_reg = 0; in e1000_phy_is_accessible_pchlan() local
195 ret_val = e1e_rphy_locked(hw, MII_PHYSID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
196 if (ret_val || (phy_reg == 0xFFFF)) in e1000_phy_is_accessible_pchlan()
198 phy_id = (u32)(phy_reg << 16); in e1000_phy_is_accessible_pchlan()
200 ret_val = e1e_rphy_locked(hw, MII_PHYSID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
201 if (ret_val || (phy_reg == 0xFFFF)) { in e1000_phy_is_accessible_pchlan()
205 phy_id |= (u32)(phy_reg & PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
214 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
234 e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
235 phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS; in e1000_phy_is_accessible_pchlan()
[all …]
Dethtool.c1317 u16 phy_reg = 0; in e1000_integrated_phy_loopback() local
1356 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg); in e1000_integrated_phy_loopback()
1357 phy_reg &= ~0x0007; in e1000_integrated_phy_loopback()
1358 phy_reg |= 0x006; in e1000_integrated_phy_loopback()
1359 e1e_wphy(hw, PHY_REG(2, 21), phy_reg); in e1000_integrated_phy_loopback()
1364 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); in e1000_integrated_phy_loopback()
1365 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C); in e1000_integrated_phy_loopback()
1367 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg); in e1000_integrated_phy_loopback()
1368 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040); in e1000_integrated_phy_loopback()
1370 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); in e1000_integrated_phy_loopback()
[all …]
Dphy.h66 s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg);
67 s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg);
Dphy.c2555 s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg) in e1000_enable_phy_wakeup_reg_access_bm() argument
2570 ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); in e1000_enable_phy_wakeup_reg_access_bm()
2580 temp = *phy_reg; in e1000_enable_phy_wakeup_reg_access_bm()
2608 s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg) in e1000_disable_phy_wakeup_reg_access_bm() argument
2620 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, *phy_reg); in e1000_disable_phy_wakeup_reg_access_bm()
2659 u16 phy_reg = 0; in e1000_access_phy_wakeup_reg_bm() local
2669 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_access_phy_wakeup_reg_bm()
2701 ret_val = e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_access_phy_wakeup_reg_bm()
Dnetdev.c5963 u16 phy_reg, wuc_enable; in e1000_init_phy_wakeup() local
5990 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); in e1000_init_phy_wakeup()
5993 phy_reg |= BM_RCTL_UPE; in e1000_init_phy_wakeup()
5995 phy_reg |= BM_RCTL_MPE; in e1000_init_phy_wakeup()
5996 phy_reg &= ~(BM_RCTL_MO_MASK); in e1000_init_phy_wakeup()
5998 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) in e1000_init_phy_wakeup()
6001 phy_reg |= BM_RCTL_BAM; in e1000_init_phy_wakeup()
6003 phy_reg |= BM_RCTL_PMCF; in e1000_init_phy_wakeup()
6006 phy_reg |= BM_RCTL_RFCE; in e1000_init_phy_wakeup()
6007 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); in e1000_init_phy_wakeup()
/drivers/usb/phy/
Dphy-am335x-control.c11 void __iomem *phy_reg; member
81 val = readl(usb_ctrl->phy_reg + reg); in am335x_phy_power()
89 writel(val, usb_ctrl->phy_reg + reg); in am335x_phy_power()
161 ctrl_usb->phy_reg = devm_ioremap_resource(&pdev->dev, res); in am335x_control_usb_probe()
162 if (IS_ERR(ctrl_usb->phy_reg)) in am335x_control_usb_probe()
163 return PTR_ERR(ctrl_usb->phy_reg); in am335x_control_usb_probe()
/drivers/net/
Dsungem_phy.c599 u32 phy_reg; in bcm5421_poll_link() local
604 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_poll_link()
606 mode = (phy_reg & BCM5421_MODE_MASK) >> 5; in bcm5421_poll_link()
613 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_poll_link()
615 if (phy_reg & 0x0020) in bcm5421_poll_link()
623 u32 phy_reg; in bcm5421_read_link() local
628 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_read_link()
630 mode = (phy_reg & BCM5421_MODE_MASK ) >> 5; in bcm5421_read_link()
639 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_read_link()
641 if ( (phy_reg & 0x0080) >> 7) in bcm5421_read_link()
[all …]
/drivers/net/phy/
Dphy_device.c223 int phy_reg; in get_phy_c45_ids() local
234 phy_reg = mdiobus_read(bus, addr, reg_addr); in get_phy_c45_ids()
235 if (phy_reg < 0) in get_phy_c45_ids()
237 c45_ids->devices_in_package = (phy_reg & 0xffff) << 16; in get_phy_c45_ids()
240 phy_reg = mdiobus_read(bus, addr, reg_addr); in get_phy_c45_ids()
241 if (phy_reg < 0) in get_phy_c45_ids()
243 c45_ids->devices_in_package |= (phy_reg & 0xffff); in get_phy_c45_ids()
260 phy_reg = mdiobus_read(bus, addr, reg_addr); in get_phy_c45_ids()
261 if (phy_reg < 0) in get_phy_c45_ids()
263 c45_ids->device_ids[i] = (phy_reg & 0xffff) << 16; in get_phy_c45_ids()
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/drivers/net/ethernet/intel/e1000/
De1000_ethtool.c1139 u16 phy_reg; in e1000_phy_reset_clk_and_crs() local
1145 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); in e1000_phy_reset_clk_and_crs()
1146 phy_reg |= M88E1000_EPSCR_TX_CLK_25; in e1000_phy_reset_clk_and_crs()
1147 e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_reg); in e1000_phy_reset_clk_and_crs()
1153 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); in e1000_phy_reset_clk_and_crs()
1154 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX; in e1000_phy_reset_clk_and_crs()
1155 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg); in e1000_phy_reset_clk_and_crs()
1162 u16 phy_reg; in e1000_nonintegrated_phy_loopback() local
1176 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); in e1000_nonintegrated_phy_loopback()
1181 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE; in e1000_nonintegrated_phy_loopback()
[all …]
/drivers/net/ethernet/ti/
Ddavinci_mdio.c219 static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg) in davinci_mdio_read() argument
225 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in davinci_mdio_read()
235 reg = (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) | in davinci_mdio_read()
264 int phy_reg, u16 phy_data) in davinci_mdio_write() argument
270 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in davinci_mdio_write()
280 reg = (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) | in davinci_mdio_write()
/drivers/net/usb/
Dsr9800.c373 int phy_reg; in sr_get_phyid() local
379 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in sr_get_phyid()
380 if (phy_reg != 0 && phy_reg != 0xFFFF) in sr_get_phyid()
385 if (phy_reg <= 0 || phy_reg == 0xFFFF) in sr_get_phyid()
388 phy_id = (phy_reg & 0xffff) << 16; in sr_get_phyid()
390 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in sr_get_phyid()
391 if (phy_reg < 0) in sr_get_phyid()
394 phy_id |= (phy_reg & 0xffff); in sr_get_phyid()
Dasix_devices.c75 int phy_reg; in asix_get_phyid() local
81 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in asix_get_phyid()
82 if (phy_reg != 0 && phy_reg != 0xFFFF) in asix_get_phyid()
87 if (phy_reg <= 0 || phy_reg == 0xFFFF) in asix_get_phyid()
90 phy_id = (phy_reg & 0xffff) << 16; in asix_get_phyid()
92 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in asix_get_phyid()
93 if (phy_reg < 0) in asix_get_phyid()
96 phy_id |= (phy_reg & 0xffff); in asix_get_phyid()
/drivers/infiniband/hw/nes/
Dnes_utils.c413 void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data) in nes_write_1G_phy_reg() argument
419 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23)); in nes_write_1G_phy_reg()
440 void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data) in nes_read_1G_phy_reg() argument
449 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23)); in nes_read_1G_phy_reg()
472 void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg, in nes_write_10G_phy_reg() argument
483 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); in nes_write_10G_phy_reg()
518 void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg) in nes_read_10G_phy_reg() argument
528 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); in nes_read_10G_phy_reg()
/drivers/net/ethernet/
Dlantiq_etop.c339 ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data) in ltq_etop_mdio_wr() argument
343 ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) | in ltq_etop_mdio_wr()
353 ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg) in ltq_etop_mdio_rd() argument
357 ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET); in ltq_etop_mdio_rd()
/drivers/net/ethernet/realtek/
Dr8169.c2409 struct phy_reg { struct
2415 const struct phy_reg *regs, int len) in rtl_writephy_batch() argument
2687 static const struct phy_reg phy_reg_init[] = { in rtl8169s_hw_phy_config()
2754 static const struct phy_reg phy_reg_init[] = { in rtl8169sb_hw_phy_config()
2778 static const struct phy_reg phy_reg_init[] = { in rtl8169scd_hw_phy_config()
2825 static const struct phy_reg phy_reg_init[] = { in rtl8169sce_hw_phy_config()
2878 static const struct phy_reg phy_reg_init[] = { in rtl8168bb_hw_phy_config()
2891 static const struct phy_reg phy_reg_init[] = { in rtl8168bef_hw_phy_config()
2902 static const struct phy_reg phy_reg_init[] = { in rtl8168cp_1_hw_phy_config()
2915 static const struct phy_reg phy_reg_init[] = { in rtl8168cp_2_hw_phy_config()
[all …]
/drivers/net/ethernet/icplus/
Dipg.c217 static int mdio_read(struct net_device *dev, int phy_id, int phy_reg) in mdio_read() argument
243 { phy_reg, 5 }, /* REGAD */ in mdio_read()
308 static void mdio_write(struct net_device *dev, int phy_id, int phy_reg, int val) in mdio_write() argument
334 { phy_reg, 5 }, /* REGAD */ in mdio_write()
/drivers/net/ethernet/intel/igb/
Digb_ethtool.c1731 u16 phy_reg; in igb_loopback_cleanup() local
1756 igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg); in igb_loopback_cleanup()
1757 if (phy_reg & MII_CR_LOOPBACK) { in igb_loopback_cleanup()
1758 phy_reg &= ~MII_CR_LOOPBACK; in igb_loopback_cleanup()
1759 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg); in igb_loopback_cleanup()