| /drivers/net/wireless/iwlwifi/mvm/ |
| D | rs.c | 191 struct rs_rate *rate = &tbl->rate; in rs_sgi_allow() local
195 if (is_ht20(rate) && (ht_cap->cap & in rs_sgi_allow()
198 if (is_ht40(rate) && (ht_cap->cap & in rs_sgi_allow()
201 if (is_ht80(rate) && (vht_cap->cap & in rs_sgi_allow()
505 static inline void rs_dump_rate(struct iwl_mvm *mvm, const struct rs_rate *rate, in rs_dump_rate() argument
509 prefix, rs_pretty_lq_type(rate->type), in rs_dump_rate()
510 rate->index, rs_pretty_ant(rate->ant), in rs_dump_rate()
511 rate->bw, rate->sgi, rate->ldpc); in rs_dump_rate()
699 struct rs_rate *rate) in ucode_rate_from_rs_rate() argument
702 int index = rate->index; in ucode_rate_from_rs_rate()
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| D | rs.h | 228 #define is_legacy(rate) is_type_legacy((rate)->type) argument
229 #define is_ht_siso(rate) is_type_ht_siso((rate)->type) argument
230 #define is_ht_mimo2(rate) is_type_ht_mimo2((rate)->type) argument
231 #define is_vht_siso(rate) is_type_vht_siso((rate)->type) argument
232 #define is_vht_mimo2(rate) is_type_vht_mimo2((rate)->type) argument
233 #define is_siso(rate) is_type_siso((rate)->type) argument
234 #define is_mimo2(rate) is_type_mimo2((rate)->type) argument
235 #define is_mimo(rate) is_type_mimo((rate)->type) argument
236 #define is_ht(rate) is_type_ht((rate)->type) argument
237 #define is_vht(rate) is_type_vht((rate)->type) argument
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| /drivers/clk/samsung/ |
| D | clk-pll.c | 32 struct samsung_clk_pll *pll, unsigned long rate) in samsung_get_pll_settings() argument
38 if (rate == rate_table[i].rate) in samsung_get_pll_settings()
54 if (drate >= rate_table[i].rate) in samsung_pll_round_rate()
55 return rate_table[i].rate; in samsung_pll_round_rate()
59 return rate_table[i - 1].rate; in samsung_pll_round_rate()
162 const struct samsung_pll_rate_table *rate, u32 pll_con) in samsung_pll35xx_mp_change() argument
169 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change()
176 const struct samsung_pll_rate_table *rate; in samsung_pll35xx_set_rate() local
180 rate = samsung_get_pll_settings(pll, drate); in samsung_pll35xx_set_rate()
181 if (!rate) { in samsung_pll35xx_set_rate()
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| /drivers/clk/qcom/ |
| D | clk-rcg2.c | 132 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) in calc_rate() argument
135 rate *= 2; in calc_rate()
136 rate /= hid_div + 1; in calc_rate()
140 u64 tmp = rate; in calc_rate()
143 rate = tmp; in calc_rate()
146 return rate; in calc_rate()
177 const struct freq_tbl *f, unsigned long rate, in _freq_tbl_determine_rate() argument
182 f = qcom_find_freq(f, rate); in _freq_tbl_determine_rate()
190 rate /= 2; in _freq_tbl_determine_rate()
191 rate *= f->pre_div + 1; in _freq_tbl_determine_rate()
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| D | clk-rcg.c | 296 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 pre_div) in calc_rate() argument
299 rate /= pre_div + 1; in calc_rate()
302 u64 tmp = rate; in calc_rate()
305 rate = tmp; in calc_rate()
308 return rate; in calc_rate()
370 const struct freq_tbl *f, unsigned long rate, in _freq_tbl_determine_rate() argument
375 f = qcom_find_freq(f, rate); in _freq_tbl_determine_rate()
382 rate = rate * f->pre_div; in _freq_tbl_determine_rate()
384 u64 tmp = rate; in _freq_tbl_determine_rate()
387 rate = tmp; in _freq_tbl_determine_rate()
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| /drivers/clk/ |
| D | clk-si5351.c | 274 unsigned long rate; in si5351_clkin_recalc_rate() local
277 rate = parent_rate; in si5351_clkin_recalc_rate()
280 rate /= 8; in si5351_clkin_recalc_rate()
283 rate /= 4; in si5351_clkin_recalc_rate()
286 rate /= 2; in si5351_clkin_recalc_rate()
295 __func__, (1 << (idiv >> 6)), rate); in si5351_clkin_recalc_rate()
297 return rate; in si5351_clkin_recalc_rate()
330 static int si5351_vxco_set_rate(struct clk_hw *hw, unsigned long rate, in si5351_vxco_set_rate() argument
425 unsigned long long rate; in si5351_pll_recalc_rate() local
434 rate = hwdata->params.p1 * hwdata->params.p3; in si5351_pll_recalc_rate()
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| D | clk-vt8500.c | 140 static long vt8500_dclk_round_rate(struct clk_hw *hw, unsigned long rate, in vt8500_dclk_round_rate() argument
146 if (rate == 0) in vt8500_dclk_round_rate()
149 divisor = *prate / rate; in vt8500_dclk_round_rate()
152 if (rate * divisor < *prate) in vt8500_dclk_round_rate()
166 static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate, in vt8500_dclk_set_rate() argument
173 if (rate == 0) in vt8500_dclk_set_rate()
176 divisor = parent_rate / rate; in vt8500_dclk_set_rate()
358 static void vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate, in vt8500_find_pll_bits() argument
364 if ((rate < parent_rate * 4) || (rate > parent_rate * 62)) { in vt8500_find_pll_bits()
370 if (rate <= parent_rate * 31) in vt8500_find_pll_bits()
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| D | clk-divider.c | 189 unsigned long parent_rate, unsigned long rate) in _div_round_up() argument
191 int div = DIV_ROUND_UP(parent_rate, rate); in _div_round_up()
202 unsigned long parent_rate, unsigned long rate) in _div_round_closest() argument
207 up = down = div = DIV_ROUND_CLOSEST(parent_rate, rate); in _div_round_closest()
220 return (rate - up_rate) <= (down_rate - rate) ? up : down; in _div_round_closest()
224 unsigned long rate) in _div_round() argument
227 return _div_round_closest(divider, parent_rate, rate); in _div_round()
229 return _div_round_up(divider, parent_rate, rate); in _div_round()
233 unsigned long rate, unsigned long now, unsigned long best) in _is_best_div() argument
236 return abs(rate - now) < abs(rate - best); in _is_best_div()
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| /drivers/gpu/drm/msm/hdmi/ |
| D | hdmi_audio.c | 104 info->level_shift_value, info->downmix_inhibit, audio->rate); in hdmi_audio_update()
136 n = arcs->lut[audio->rate].n; in hdmi_audio_update()
137 cts = arcs->lut[audio->rate].cts; in hdmi_audio_update()
139 if ((MSM_HDMI_SAMPLE_RATE_192KHZ == audio->rate) || in hdmi_audio_update()
140 (MSM_HDMI_SAMPLE_RATE_176_4KHZ == audio->rate)) { in hdmi_audio_update()
143 } else if ((MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) || in hdmi_audio_update()
144 (MSM_HDMI_SAMPLE_RATE_88_2KHZ == audio->rate)) { in hdmi_audio_update()
157 if ((MSM_HDMI_SAMPLE_RATE_48KHZ == audio->rate) || in hdmi_audio_update()
158 (MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) || in hdmi_audio_update()
159 (MSM_HDMI_SAMPLE_RATE_192KHZ == audio->rate)) in hdmi_audio_update()
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| /drivers/sh/clk/ |
| D | core.c | 64 freq = clk->parent->rate * mult / div; in clk_rate_table_build()
78 unsigned long rate; member
107 rate_error = abs(freq - rounder->rate); in clk_rate_round_helper()
117 if (rounder->rate >= highest) in clk_rate_round_helper()
119 if (rounder->rate <= lowest) in clk_rate_round_helper()
139 unsigned long rate) in clk_rate_table_round() argument
146 .rate = rate, in clk_rate_table_round()
162 unsigned int div_max, unsigned long rate) in clk_rate_div_range_round() argument
169 .rate = rate, in clk_rate_div_range_round()
182 unsigned int mult_max, unsigned long rate) in clk_rate_mult_range_round() argument
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| /drivers/clk/tegra/ |
| D | clk-audio-sync.c | 28 return sync->rate; in clk_sync_source_recalc_rate()
31 static long clk_sync_source_round_rate(struct clk_hw *hw, unsigned long rate, in clk_sync_source_round_rate() argument
36 if (rate > sync->max_rate) in clk_sync_source_round_rate()
39 return rate; in clk_sync_source_round_rate()
42 static int clk_sync_source_set_rate(struct clk_hw *hw, unsigned long rate, in clk_sync_source_set_rate() argument
47 sync->rate = rate; in clk_sync_source_set_rate()
58 unsigned long rate, unsigned long max_rate) in tegra_clk_register_sync_source() argument
70 sync->rate = rate; in tegra_clk_register_sync_source()
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| D | clk-divider.c | 33 static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate, in get_div() argument
40 if (!rate) in get_div()
49 divider_ux1 += rate - 1; in get_div()
51 do_div(divider_ux1, rate); in get_div()
73 u64 rate = parent_rate; in clk_frac_div_recalc_rate() local
81 rate *= mul; in clk_frac_div_recalc_rate()
82 rate += div - 1; in clk_frac_div_recalc_rate()
83 do_div(rate, div); in clk_frac_div_recalc_rate()
85 return rate; in clk_frac_div_recalc_rate()
88 static long clk_frac_div_round_rate(struct clk_hw *hw, unsigned long rate, in clk_frac_div_round_rate() argument
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| /drivers/net/wireless/ti/wl18xx/ |
| D | tx.c | 33 u8 band, struct ieee80211_tx_rate *rate) in wl18xx_get_last_tx_rate() argument
39 rate->idx = 0; in wl18xx_get_last_tx_rate()
40 rate->flags = 0; in wl18xx_get_last_tx_rate()
45 rate->idx = fw_rate; in wl18xx_get_last_tx_rate()
47 rate->idx -= CONF_HW_RATE_INDEX_6MBPS; in wl18xx_get_last_tx_rate()
48 rate->flags = 0; in wl18xx_get_last_tx_rate()
50 rate->flags = IEEE80211_TX_RC_MCS; in wl18xx_get_last_tx_rate()
51 rate->idx = fw_rate - CONF_HW_RATE_INDEX_MCS0; in wl18xx_get_last_tx_rate()
55 (rate->idx)--; in wl18xx_get_last_tx_rate()
57 (rate->idx)--; in wl18xx_get_last_tx_rate()
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| /drivers/net/wireless/mwifiex/ |
| D | cfp.c | 201 u32 rate = 0; in mwifiex_index_to_acs_data_rate() local
216 rate = ac_mcs_rate_nss2[2 * (3 - bw) + gi][mcs_index]; in mwifiex_index_to_acs_data_rate()
218 rate = ac_mcs_rate_nss1[2 * (3 - bw) + gi][mcs_index]; in mwifiex_index_to_acs_data_rate()
228 rate = 0x0D; /* MCS 32 SGI rate */ in mwifiex_index_to_acs_data_rate()
230 rate = 0x0C; /* MCS 32 LGI rate */ in mwifiex_index_to_acs_data_rate()
233 rate = mcs_rate[2 * (1 - bw) + gi][index]; in mwifiex_index_to_acs_data_rate()
235 rate = mwifiex_data_rates[0]; in mwifiex_index_to_acs_data_rate()
237 rate = mwifiex_data_rates[0]; in mwifiex_index_to_acs_data_rate()
243 rate = mwifiex_data_rates[index]; in mwifiex_index_to_acs_data_rate()
246 return rate; in mwifiex_index_to_acs_data_rate()
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| /drivers/clocksource/ |
| D | dw_apb_timer_of.c | 27 void __iomem **base, u32 *rate) in timer_get_base_and_rate() argument
52 *rate = clk_get_rate(timer_clk); in timer_get_base_and_rate()
57 if (of_property_read_u32(np, "clock-freq", rate) && in timer_get_base_and_rate()
58 of_property_read_u32(np, "clock-frequency", rate)) in timer_get_base_and_rate()
66 u32 irq, rate; in add_clockevent() local
72 timer_get_base_and_rate(event_timer, &iobase, &rate); in add_clockevent()
75 rate); in add_clockevent()
89 u32 rate; in add_clocksource() local
91 timer_get_base_and_rate(source_timer, &iobase, &rate); in add_clocksource()
93 cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate); in add_clocksource()
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| /drivers/clk/versatile/ |
| D | clk-vexpress-osc.c | 35 u32 rate; in vexpress_osc_recalc_rate() local
37 regmap_read(osc->reg, 0, &rate); in vexpress_osc_recalc_rate()
39 return rate; in vexpress_osc_recalc_rate()
42 static long vexpress_osc_round_rate(struct clk_hw *hw, unsigned long rate, in vexpress_osc_round_rate() argument
47 if (WARN_ON(osc->rate_min && rate < osc->rate_min)) in vexpress_osc_round_rate()
48 rate = osc->rate_min; in vexpress_osc_round_rate()
50 if (WARN_ON(osc->rate_max && rate > osc->rate_max)) in vexpress_osc_round_rate()
51 rate = osc->rate_max; in vexpress_osc_round_rate()
53 return rate; in vexpress_osc_round_rate()
56 static int vexpress_osc_set_rate(struct clk_hw *hw, unsigned long rate, in vexpress_osc_set_rate() argument
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| /drivers/net/wireless/b43/ |
| D | ppr.c | 37 u8 *rate; in b43_ppr_add() local
39 ppr_for_each_entry(ppr, i, rate) { in b43_ppr_add()
40 *rate = clamp_val(*rate + diff, 0, 127); in b43_ppr_add()
47 u8 *rate; in b43_ppr_apply_max() local
49 ppr_for_each_entry(ppr, i, rate) { in b43_ppr_apply_max()
50 *rate = min(*rate, max); in b43_ppr_apply_max()
57 u8 *rate; in b43_ppr_apply_min() local
59 ppr_for_each_entry(ppr, i, rate) { in b43_ppr_apply_min()
60 *rate = max(*rate, min); in b43_ppr_apply_min()
68 u8 *rate; in b43_ppr_get_max() local
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| /drivers/clk/rockchip/ |
| D | clk-pll.c | 52 struct rockchip_clk_pll *pll, unsigned long rate) in rockchip_get_pll_settings() argument
58 if (rate == rate_table[i].rate) in rockchip_get_pll_settings()
74 if (drate >= rate_table[i].rate) in rockchip_pll_round_rate()
75 return rate_table[i].rate; in rockchip_pll_round_rate()
79 return rate_table[i - 1].rate; in rockchip_pll_round_rate()
161 const struct rockchip_pll_rate_table *rate; in rockchip_rk3066_pll_set_rate() local
180 rate = rockchip_get_pll_settings(pll, drate); in rockchip_rk3066_pll_set_rate()
181 if (!rate) { in rockchip_rk3066_pll_set_rate()
188 __func__, rate->rate, rate->nr, rate->no, rate->nf); in rockchip_rk3066_pll_set_rate()
201 writel(HIWORD_UPDATE(rate->nr - 1, RK3066_PLLCON0_NR_MASK, in rockchip_rk3066_pll_set_rate()
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| /drivers/mmc/host/ |
| D | sdhci-s3c.c | 89 unsigned long rate, max = 0; in sdhci_s3c_get_max_clk() local
93 rate = ourhost->clk_rates[src]; in sdhci_s3c_get_max_clk()
94 if (rate > max) in sdhci_s3c_get_max_clk()
95 max = rate; in sdhci_s3c_get_max_clk()
111 unsigned long rate; in sdhci_s3c_consider_clock() local
123 rate = clk_round_rate(clksrc, wanted); in sdhci_s3c_consider_clock()
124 return wanted - rate; in sdhci_s3c_consider_clock()
127 rate = ourhost->clk_rates[src]; in sdhci_s3c_consider_clock()
130 if ((rate >> shift) <= wanted) in sdhci_s3c_consider_clock()
137 src, rate, rate / 256, wanted); in sdhci_s3c_consider_clock()
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| /drivers/clk/at91/ |
| D | clk-h32mx.c | 52 static long clk_sama5d4_h32mx_round_rate(struct clk_hw *hw, unsigned long rate, in clk_sama5d4_h32mx_round_rate() argument
57 if (rate > *parent_rate) in clk_sama5d4_h32mx_round_rate()
60 if (rate < div) in clk_sama5d4_h32mx_round_rate()
63 if (rate - div < *parent_rate - rate) in clk_sama5d4_h32mx_round_rate()
69 static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate, in clk_sama5d4_h32mx_set_rate() argument
76 if (parent_rate != rate && (parent_rate / 2) != rate) in clk_sama5d4_h32mx_set_rate()
81 if ((parent_rate / 2) == rate) in clk_sama5d4_h32mx_set_rate()
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| D | clk-plldiv.c | 39 static long clk_plldiv_round_rate(struct clk_hw *hw, unsigned long rate, in clk_plldiv_round_rate() argument
44 if (rate > *parent_rate) in clk_plldiv_round_rate()
47 if (rate < div) in clk_plldiv_round_rate()
50 if (rate - div < *parent_rate - rate) in clk_plldiv_round_rate()
56 static int clk_plldiv_set_rate(struct clk_hw *hw, unsigned long rate, in clk_plldiv_set_rate() argument
63 if (parent_rate != rate && (parent_rate / 2) != rate) in clk_plldiv_set_rate()
68 if ((parent_rate / 2) == rate) in clk_plldiv_set_rate()
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| /drivers/clk/mmp/ |
| D | clk-frac.c | 38 unsigned long rate = 0, prev_rate; in clk_factor_round_rate() local
42 prev_rate = rate; in clk_factor_round_rate()
43 rate = (((*prate / 10000) * factor->ftbl[i].den) / in clk_factor_round_rate()
45 if (rate > drate) in clk_factor_round_rate()
49 return rate; in clk_factor_round_rate()
51 if ((drate - prev_rate) > (rate - drate)) in clk_factor_round_rate()
52 return rate; in clk_factor_round_rate()
88 unsigned long prev_rate, rate = 0; in clk_factor_set_rate() local
91 prev_rate = rate; in clk_factor_set_rate()
92 rate = (((prate / 10000) * factor->ftbl[i].den) / in clk_factor_set_rate()
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| /drivers/clk/st/ |
| D | clkgen-fsyn.c | 496 unsigned long *rate) in clk_fs660c32_vco_get_rate() argument
500 *rate = input * nd; in clk_fs660c32_vco_get_rate()
509 unsigned long rate = 0; in quadfs_pll_fs660c32_recalc_rate() local
513 if (clk_fs660c32_vco_get_rate(parent_rate, ¶ms, &rate)) in quadfs_pll_fs660c32_recalc_rate()
519 return rate; in quadfs_pll_fs660c32_recalc_rate()
551 static long quadfs_pll_fs660c32_round_rate(struct clk_hw *hw, unsigned long rate in quadfs_pll_fs660c32_round_rate() argument
556 if (!clk_fs660c32_vco_get_params(*prate, rate, ¶ms)) in quadfs_pll_fs660c32_round_rate()
557 clk_fs660c32_vco_get_rate(*prate, ¶ms, &rate); in quadfs_pll_fs660c32_round_rate()
561 rate, (unsigned int)params.sdiv, in quadfs_pll_fs660c32_round_rate()
565 return rate; in quadfs_pll_fs660c32_round_rate()
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| /drivers/gpu/drm/msm/mdp/mdp4/ |
| D | mdp4_lvds_pll.c | 37 unsigned long rate; member
59 static const struct pll_rate *find_rate(unsigned long rate) in find_rate() argument
63 if (rate > freqtbl[i].rate) in find_rate()
75 DBG("pixclk=%lu (%lu)", lvds_pll->pixclk, pll_rate->rate); in mpd4_lvds_pll_enable()
112 static long mpd4_lvds_pll_round_rate(struct clk_hw *hw, unsigned long rate, in mpd4_lvds_pll_round_rate() argument
115 const struct pll_rate *pll_rate = find_rate(rate); in mpd4_lvds_pll_round_rate()
116 return pll_rate->rate; in mpd4_lvds_pll_round_rate()
119 static int mpd4_lvds_pll_set_rate(struct clk_hw *hw, unsigned long rate, in mpd4_lvds_pll_set_rate() argument
123 lvds_pll->pixclk = rate; in mpd4_lvds_pll_set_rate()
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| /drivers/clk/sunxi/ |
| D | clk-factors.c | 49 unsigned long rate; in clk_factors_recalc_rate() local
67 rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1); in clk_factors_recalc_rate()
69 return rate; in clk_factors_recalc_rate()
72 static long clk_factors_round_rate(struct clk_hw *hw, unsigned long rate, in clk_factors_round_rate() argument
76 factors->get_factors((u32 *)&rate, (u32)*parent_rate, in clk_factors_round_rate()
79 return rate; in clk_factors_round_rate()
82 static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate, in clk_factors_determine_rate() argument
97 parent_rate = __clk_round_rate(parent, rate); in clk_factors_determine_rate()
101 child_rate = clk_factors_round_rate(hw, rate, &parent_rate); in clk_factors_determine_rate()
103 if (child_rate <= rate && child_rate > best_child_rate) { in clk_factors_determine_rate()
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