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Searched refs:reg_width (Results 1 – 22 of 22) sorted by relevance

/drivers/sh/intc/
Dhandle.c73 fn += (mr->reg_width >> 3) - 1; in _intc_mask_data()
78 (mr->reg_width - 1) - *fld_idx); in _intc_mask_data()
137 fn += (pr->reg_width >> 3) - 1; in _intc_prio_data()
140 BUG_ON(n * pr->field_width > pr->reg_width); in _intc_prio_data()
142 bit = pr->reg_width - (n * pr->field_width); in _intc_prio_data()
194 fn += (mr->reg_width >> 3) - 1; in intc_ack_data()
199 (mr->reg_width - 1) - j); in intc_ack_data()
272 fn += (sr->reg_width >> 3) - 1; in intc_get_sense_handle()
274 BUG_ON((j + 1) * sr->field_width > sr->reg_width); in intc_get_sense_handle()
276 bit = sr->reg_width - ((j + 1) * sr->field_width); in intc_get_sense_handle()
Dbalancing.c67 fn += (mr->reg_width >> 3) - 1; in intc_dist_data()
72 (mr->reg_width - 1) - j); in intc_dist_data()
Dvirq.c136 unsigned int fn = REG_FN_TEST_BASE + (subgroup->reg_width >> 3) - 1; in intc_subgroup_data()
139 0, 1, (subgroup->reg_width - 1) - index); in intc_subgroup_data()
/drivers/net/wireless/b43/
Dbus.c77 size_t count, u16 offset, u8 reg_width) in b43_bus_bcma_block_read() argument
79 bcma_block_read(dev->bdev, buffer, count, offset, reg_width); in b43_bus_bcma_block_read()
83 size_t count, u16 offset, u8 reg_width) in b43_bus_bcma_block_write() argument
85 bcma_block_write(dev->bdev, buffer, count, offset, reg_width); in b43_bus_bcma_block_write()
180 size_t count, u16 offset, u8 reg_width) in b43_bus_ssb_block_read() argument
182 ssb_block_read(dev->sdev, buffer, count, offset, reg_width); in b43_bus_ssb_block_read()
186 size_t count, u16 offset, u8 reg_width) in b43_bus_ssb_block_write() argument
188 ssb_block_write(dev->sdev, buffer, count, offset, reg_width); in b43_bus_ssb_block_write()
Dbus.h33 size_t count, u16 offset, u8 reg_width);
35 size_t count, u16 offset, u8 reg_width);
Db43.h1065 size_t count, u16 offset, u8 reg_width) in b43_block_read() argument
1067 dev->dev->block_read(dev->dev, buffer, count, offset, reg_width); in b43_block_read()
1071 size_t count, u16 offset, u8 reg_width) in b43_block_write() argument
1073 dev->dev->block_write(dev->dev, buffer, count, offset, reg_width); in b43_block_write()
/drivers/pinctrl/sh-pfc/
Dcore.c148 unsigned long reg_width) in sh_pfc_read_raw_reg() argument
150 switch (reg_width) { in sh_pfc_read_raw_reg()
163 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width, in sh_pfc_write_raw_reg() argument
166 switch (reg_width) { in sh_pfc_write_raw_reg()
194 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width); in sh_pfc_config_reg_helper()
197 *posp = crp->reg_width; in sh_pfc_config_reg_helper()
214 crp->reg, value, field, crp->reg_width, crp->field_width); in sh_pfc_write_config_reg()
219 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); in sh_pfc_write_config_reg()
228 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); in sh_pfc_write_config_reg()
243 r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
Dgpio.c67 return sh_pfc_read_raw_reg(mem, dreg->reg_width); in gpio_read_data_reg()
76 sh_pfc_write_raw_reg(mem, dreg->reg_width, value); in gpio_write_data_reg()
89 for (bit = 0; bit < dreg->reg_width; bit++) { in gpio_setup_data_reg()
110 for (i = 0; pfc->info->data_regs[i].reg_width; ++i) in gpio_setup_data_regs()
118 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_regs()
162 pos = reg->info->reg_width - (bit + 1); in gpio_pin_set_value()
194 pos = reg->info->reg_width - (bit + 1); in gpio_pin_get()
Dcore.h61 unsigned long reg_width);
62 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
Dsh_pfc.h72 unsigned long reg, reg_width, field_width; member
78 .reg = r, .reg_width = r_width, .field_width = f_width, \
82 .reg = r, .reg_width = r_width, \
88 unsigned long reg, reg_width; member
93 .reg = r, .reg_width = r_width, \
/drivers/dma/
Dat_hdmac.c695 unsigned int reg_width; in atc_prep_slave_sg() local
717 reg_width = convert_buswidth(sconfig->dst_addr_width); in atc_prep_slave_sg()
718 ctrla |= ATC_DST_WIDTH(reg_width); in atc_prep_slave_sg()
756 reg_width = convert_buswidth(sconfig->src_addr_width); in atc_prep_slave_sg()
757 ctrla |= ATC_SRC_WIDTH(reg_width); in atc_prep_slave_sg()
788 | len >> reg_width; in atc_prep_slave_sg()
805 first->tx_width = reg_width; in atc_prep_slave_sg()
824 atc_dma_cyclic_check_values(unsigned int reg_width, dma_addr_t buf_addr, in atc_dma_cyclic_check_values() argument
827 if (period_len > (ATC_BTSIZE_MAX << reg_width)) in atc_dma_cyclic_check_values()
829 if (unlikely(period_len & ((1 << reg_width) - 1))) in atc_dma_cyclic_check_values()
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Dtxx9dmac.c356 sai = ds->reg_width; in txx9dmac_dostart()
360 dai = ds->reg_width; in txx9dmac_dostart()
377 sai = ds->reg_width; in txx9dmac_dostart()
381 dai = ds->reg_width; in txx9dmac_dostart()
824 BUG_ON(!ds || !ds->reg_width); in txx9dmac_prep_slave_sg()
867 sai = ds->reg_width; in txx9dmac_prep_slave_sg()
871 dai = ds->reg_width; in txx9dmac_prep_slave_sg()
1027 TXX9_DMA_CCR_XFSZ(__ffs(ds->reg_width)); in txx9dmac_alloc_chan_resources()
/drivers/bcma/
Dhost_soc.c51 size_t count, u16 offset, u8 reg_width) in bcma_host_soc_block_read() argument
55 switch (reg_width) { in bcma_host_soc_block_read()
95 size_t count, u16 offset, u8 reg_width) in bcma_host_soc_block_write() argument
99 switch (reg_width) { in bcma_host_soc_block_write()
Dhost_pci.c81 size_t count, u16 offset, u8 reg_width) in bcma_host_pci_block_read() argument
86 switch (reg_width) { in bcma_host_pci_block_read()
105 u16 offset, u8 reg_width) in bcma_host_pci_block_write() argument
110 switch (reg_width) { in bcma_host_pci_block_write()
/drivers/dma/dw/
Dcore.c764 unsigned int reg_width; in dwc_prep_slave_sg() local
782 reg_width = __fls(sconfig->dst_addr_width); in dwc_prep_slave_sg()
785 | DWC_CTLL_DST_WIDTH(reg_width) in dwc_prep_slave_sg()
842 reg_width = __fls(sconfig->src_addr_width); in dwc_prep_slave_sg()
845 | DWC_CTLL_SRC_WIDTH(reg_width) in dwc_prep_slave_sg()
875 if ((len >> reg_width) > dwc->block_size) { in dwc_prep_slave_sg()
876 dlen = dwc->block_size << reg_width; in dwc_prep_slave_sg()
883 desc->lli.ctlhi = dlen >> reg_width; in dwc_prep_slave_sg()
1318 unsigned int reg_width; in dw_dma_cyclic_prep() local
1354 reg_width = __ffs(sconfig->dst_addr_width); in dw_dma_cyclic_prep()
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/drivers/ssb/
Dsdio.c298 size_t count, u16 offset, u8 reg_width) in ssb_sdio_block_read() argument
313 switch (reg_width) { in ssb_sdio_block_read()
337 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); in ssb_sdio_block_read()
405 size_t count, u16 offset, u8 reg_width) in ssb_sdio_block_write() argument
420 switch (reg_width) { in ssb_sdio_block_write()
444 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); in ssb_sdio_block_write()
Dpcmcia.c277 size_t count, u16 offset, u8 reg_width) in ssb_pcmcia_block_read() argument
290 switch (reg_width) { in ssb_pcmcia_block_read()
379 size_t count, u16 offset, u8 reg_width) in ssb_pcmcia_block_write() argument
390 switch (reg_width) { in ssb_pcmcia_block_write()
Dmain.c644 size_t count, u16 offset, u8 reg_width) in ssb_ssb_block_read() argument
652 switch (reg_width) { in ssb_ssb_block_read()
717 size_t count, u16 offset, u8 reg_width) in ssb_ssb_block_write() argument
725 switch (reg_width) { in ssb_ssb_block_write()
Dpci.c1013 size_t count, u16 offset, u8 reg_width) in ssb_pci_block_read() argument
1024 switch (reg_width) { in ssb_pci_block_read()
1087 size_t count, u16 offset, u8 reg_width) in ssb_pci_block_write() argument
1098 switch (reg_width) { in ssb_pci_block_write()
/drivers/mfd/
Dhtc-egpio.c300 if ((pdata->reg_width != 8) && (pdata->reg_width != 16)) in egpio_probe()
302 ei->reg_shift = fls(pdata->reg_width - 1); in egpio_probe()
305 ei->reg_mask = (1 << pdata->reg_width) - 1; in egpio_probe()
/drivers/scsi/qla2xxx/
Dqla_tmpl.h82 uint8_t reg_width; member
96 uint8_t reg_width; member
Dqla_tmpl.c256 ent->t256.reg_count, ent->t256.reg_width, buf, len); in qla27xx_fwdt_entry_t256()
285 ent->t258.reg_count, ent->t258.reg_width, buf, len); in qla27xx_fwdt_entry_t258()