1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_tmpl.h"
9
10 /* note default template is in big endian */
11 static const uint32_t ql27xx_fwdt_default_template[] = {
12 0x63000000, 0xa4000000, 0x7c050000, 0x00000000,
13 0x30000000, 0x01000000, 0x00000000, 0xc0406eb4,
14 0x00000000, 0x00000000, 0x00000000, 0x00000000,
15 0x00000000, 0x00000000, 0x00000000, 0x00000000,
16 0x00000000, 0x00000000, 0x00000000, 0x00000000,
17 0x00000000, 0x00000000, 0x00000000, 0x00000000,
18 0x00000000, 0x00000000, 0x00000000, 0x00000000,
19 0x00000000, 0x00000000, 0x00000000, 0x00000000,
20 0x00000000, 0x00000000, 0x00000000, 0x00000000,
21 0x00000000, 0x00000000, 0x00000000, 0x00000000,
22 0x00000000, 0x04010000, 0x14000000, 0x00000000,
23 0x02000000, 0x44000000, 0x09010000, 0x10000000,
24 0x00000000, 0x02000000, 0x01010000, 0x1c000000,
25 0x00000000, 0x02000000, 0x00600000, 0x00000000,
26 0xc0000000, 0x01010000, 0x1c000000, 0x00000000,
27 0x02000000, 0x00600000, 0x00000000, 0xcc000000,
28 0x01010000, 0x1c000000, 0x00000000, 0x02000000,
29 0x10600000, 0x00000000, 0xd4000000, 0x01010000,
30 0x1c000000, 0x00000000, 0x02000000, 0x700f0000,
31 0x00000060, 0xf0000000, 0x00010000, 0x18000000,
32 0x00000000, 0x02000000, 0x00700000, 0x041000c0,
33 0x00010000, 0x18000000, 0x00000000, 0x02000000,
34 0x10700000, 0x041000c0, 0x00010000, 0x18000000,
35 0x00000000, 0x02000000, 0x40700000, 0x041000c0,
36 0x01010000, 0x1c000000, 0x00000000, 0x02000000,
37 0x007c0000, 0x01000000, 0xc0000000, 0x00010000,
38 0x18000000, 0x00000000, 0x02000000, 0x007c0000,
39 0x040300c4, 0x00010000, 0x18000000, 0x00000000,
40 0x02000000, 0x007c0000, 0x040100c0, 0x01010000,
41 0x1c000000, 0x00000000, 0x02000000, 0x007c0000,
42 0x00000000, 0xc0000000, 0x00010000, 0x18000000,
43 0x00000000, 0x02000000, 0x007c0000, 0x04200000,
44 0x0b010000, 0x18000000, 0x00000000, 0x02000000,
45 0x0c000000, 0x00000000, 0x02010000, 0x20000000,
46 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
47 0xf0000000, 0x000000b0, 0x02010000, 0x20000000,
48 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
49 0xf0000000, 0x000010b0, 0x02010000, 0x20000000,
50 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
51 0xf0000000, 0x000020b0, 0x02010000, 0x20000000,
52 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
53 0xf0000000, 0x000030b0, 0x02010000, 0x20000000,
54 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
55 0xf0000000, 0x000040b0, 0x02010000, 0x20000000,
56 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
57 0xf0000000, 0x000050b0, 0x02010000, 0x20000000,
58 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
59 0xf0000000, 0x000060b0, 0x02010000, 0x20000000,
60 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
61 0xf0000000, 0x000070b0, 0x02010000, 0x20000000,
62 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
63 0xf0000000, 0x000080b0, 0x02010000, 0x20000000,
64 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
65 0xf0000000, 0x000090b0, 0x02010000, 0x20000000,
66 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
67 0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000,
68 0x00000000, 0x02000000, 0x0a000000, 0x040100c0,
69 0x00010000, 0x18000000, 0x00000000, 0x02000000,
70 0x0a000000, 0x04200080, 0x00010000, 0x18000000,
71 0x00000000, 0x02000000, 0x00be0000, 0x041000c0,
72 0x00010000, 0x18000000, 0x00000000, 0x02000000,
73 0x10be0000, 0x041000c0, 0x00010000, 0x18000000,
74 0x00000000, 0x02000000, 0x20be0000, 0x041000c0,
75 0x00010000, 0x18000000, 0x00000000, 0x02000000,
76 0x30be0000, 0x041000c0, 0x00010000, 0x18000000,
77 0x00000000, 0x02000000, 0x00b00000, 0x041000c0,
78 0x00010000, 0x18000000, 0x00000000, 0x02000000,
79 0x10b00000, 0x041000c0, 0x00010000, 0x18000000,
80 0x00000000, 0x02000000, 0x20b00000, 0x041000c0,
81 0x00010000, 0x18000000, 0x00000000, 0x02000000,
82 0x30b00000, 0x041000c0, 0x00010000, 0x18000000,
83 0x00000000, 0x02000000, 0x00300000, 0x041000c0,
84 0x00010000, 0x18000000, 0x00000000, 0x02000000,
85 0x10300000, 0x041000c0, 0x00010000, 0x18000000,
86 0x00000000, 0x02000000, 0x20300000, 0x041000c0,
87 0x00010000, 0x18000000, 0x00000000, 0x02000000,
88 0x30300000, 0x041000c0, 0x0a010000, 0x10000000,
89 0x00000000, 0x02000000, 0x06010000, 0x1c000000,
90 0x00000000, 0x02000000, 0x01000000, 0x00000200,
91 0xff230200, 0x06010000, 0x1c000000, 0x00000000,
92 0x02000000, 0x02000000, 0x00001000, 0x00000000,
93 0x07010000, 0x18000000, 0x00000000, 0x02000000,
94 0x00000000, 0x01000000, 0x07010000, 0x18000000,
95 0x00000000, 0x02000000, 0x00000000, 0x02000000,
96 0x07010000, 0x18000000, 0x00000000, 0x02000000,
97 0x00000000, 0x03000000, 0x0d010000, 0x14000000,
98 0x00000000, 0x02000000, 0x00000000, 0xff000000,
99 0x10000000, 0x00000000, 0x00000080,
100 };
101
102 static inline void __iomem *
qla27xx_isp_reg(struct scsi_qla_host * vha)103 qla27xx_isp_reg(struct scsi_qla_host *vha)
104 {
105 return &vha->hw->iobase->isp24;
106 }
107
108 static inline void
qla27xx_insert16(uint16_t value,void * buf,ulong * len)109 qla27xx_insert16(uint16_t value, void *buf, ulong *len)
110 {
111 if (buf) {
112 buf += *len;
113 *(__le16 *)buf = cpu_to_le16(value);
114 }
115 *len += sizeof(value);
116 }
117
118 static inline void
qla27xx_insert32(uint32_t value,void * buf,ulong * len)119 qla27xx_insert32(uint32_t value, void *buf, ulong *len)
120 {
121 if (buf) {
122 buf += *len;
123 *(__le32 *)buf = cpu_to_le32(value);
124 }
125 *len += sizeof(value);
126 }
127
128 static inline void
qla27xx_insertbuf(void * mem,ulong size,void * buf,ulong * len)129 qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len)
130 {
131
132 if (buf && mem && size) {
133 buf += *len;
134 memcpy(buf, mem, size);
135 }
136 *len += size;
137 }
138
139 static inline void
qla27xx_read8(void * window,void * buf,ulong * len)140 qla27xx_read8(void *window, void *buf, ulong *len)
141 {
142 uint8_t value = ~0;
143
144 if (buf) {
145 value = RD_REG_BYTE((__iomem void *)window);
146 }
147 qla27xx_insert32(value, buf, len);
148 }
149
150 static inline void
qla27xx_read16(void * window,void * buf,ulong * len)151 qla27xx_read16(void *window, void *buf, ulong *len)
152 {
153 uint16_t value = ~0;
154
155 if (buf) {
156 value = RD_REG_WORD((__iomem void *)window);
157 }
158 qla27xx_insert32(value, buf, len);
159 }
160
161 static inline void
qla27xx_read32(void * window,void * buf,ulong * len)162 qla27xx_read32(void *window, void *buf, ulong *len)
163 {
164 uint32_t value = ~0;
165
166 if (buf) {
167 value = RD_REG_DWORD((__iomem void *)window);
168 }
169 qla27xx_insert32(value, buf, len);
170 }
171
qla27xx_read_vector(uint width)172 static inline void (*qla27xx_read_vector(uint width))(void *, void *, ulong *)
173 {
174 return
175 (width == 1) ? qla27xx_read8 :
176 (width == 2) ? qla27xx_read16 :
177 qla27xx_read32;
178 }
179
180 static inline void
qla27xx_read_reg(__iomem struct device_reg_24xx * reg,uint offset,void * buf,ulong * len)181 qla27xx_read_reg(__iomem struct device_reg_24xx *reg,
182 uint offset, void *buf, ulong *len)
183 {
184 void *window = (void *)reg + offset;
185
186 qla27xx_read32(window, buf, len);
187 }
188
189 static inline void
qla27xx_write_reg(__iomem struct device_reg_24xx * reg,uint offset,uint32_t data,void * buf)190 qla27xx_write_reg(__iomem struct device_reg_24xx *reg,
191 uint offset, uint32_t data, void *buf)
192 {
193 __iomem void *window = reg + offset;
194
195 if (buf) {
196 WRT_REG_DWORD(window, data);
197 }
198 }
199
200 static inline void
qla27xx_read_window(__iomem struct device_reg_24xx * reg,uint32_t addr,uint offset,uint count,uint width,void * buf,ulong * len)201 qla27xx_read_window(__iomem struct device_reg_24xx *reg,
202 uint32_t addr, uint offset, uint count, uint width, void *buf,
203 ulong *len)
204 {
205 void *window = (void *)reg + offset;
206 void (*readn)(void *, void *, ulong *) = qla27xx_read_vector(width);
207
208 qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf);
209 while (count--) {
210 qla27xx_insert32(addr, buf, len);
211 readn(window, buf, len);
212 window += width;
213 addr++;
214 }
215 }
216
217 static inline void
qla27xx_skip_entry(struct qla27xx_fwdt_entry * ent,void * buf)218 qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf)
219 {
220 if (buf)
221 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY;
222 }
223
224 static int
qla27xx_fwdt_entry_t0(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)225 qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha,
226 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
227 {
228 ql_dbg(ql_dbg_misc, vha, 0xd100,
229 "%s: nop [%lx]\n", __func__, *len);
230 qla27xx_skip_entry(ent, buf);
231
232 return false;
233 }
234
235 static int
qla27xx_fwdt_entry_t255(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)236 qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha,
237 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
238 {
239 ql_dbg(ql_dbg_misc, vha, 0xd1ff,
240 "%s: end [%lx]\n", __func__, *len);
241 qla27xx_skip_entry(ent, buf);
242
243 /* terminate */
244 return true;
245 }
246
247 static int
qla27xx_fwdt_entry_t256(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)248 qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha,
249 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
250 {
251 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
252
253 ql_dbg(ql_dbg_misc, vha, 0xd200,
254 "%s: rdio t1 [%lx]\n", __func__, *len);
255 qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset,
256 ent->t256.reg_count, ent->t256.reg_width, buf, len);
257
258 return false;
259 }
260
261 static int
qla27xx_fwdt_entry_t257(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)262 qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha,
263 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
264 {
265 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
266
267 ql_dbg(ql_dbg_misc, vha, 0xd201,
268 "%s: wrio t1 [%lx]\n", __func__, *len);
269 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf);
270 qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf);
271
272 return false;
273 }
274
275 static int
qla27xx_fwdt_entry_t258(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)276 qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha,
277 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
278 {
279 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
280
281 ql_dbg(ql_dbg_misc, vha, 0xd202,
282 "%s: rdio t2 [%lx]\n", __func__, *len);
283 qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf);
284 qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset,
285 ent->t258.reg_count, ent->t258.reg_width, buf, len);
286
287 return false;
288 }
289
290 static int
qla27xx_fwdt_entry_t259(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)291 qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha,
292 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
293 {
294 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
295
296 ql_dbg(ql_dbg_misc, vha, 0xd203,
297 "%s: wrio t2 [%lx]\n", __func__, *len);
298 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf);
299 qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf);
300 qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf);
301
302 return false;
303 }
304
305 static int
qla27xx_fwdt_entry_t260(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)306 qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha,
307 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
308 {
309 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
310
311 ql_dbg(ql_dbg_misc, vha, 0xd204,
312 "%s: rdpci [%lx]\n", __func__, *len);
313 qla27xx_insert32(ent->t260.pci_offset, buf, len);
314 qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len);
315
316 return false;
317 }
318
319 static int
qla27xx_fwdt_entry_t261(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)320 qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha,
321 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
322 {
323 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
324
325 ql_dbg(ql_dbg_misc, vha, 0xd205,
326 "%s: wrpci [%lx]\n", __func__, *len);
327 qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf);
328
329 return false;
330 }
331
332 static int
qla27xx_fwdt_entry_t262(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)333 qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha,
334 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
335 {
336 ulong dwords;
337 ulong start;
338 ulong end;
339
340 ql_dbg(ql_dbg_misc, vha, 0xd206,
341 "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len);
342 start = ent->t262.start_addr;
343 end = ent->t262.end_addr;
344
345 if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) {
346 ;
347 } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) {
348 end = vha->hw->fw_memory_size;
349 if (buf)
350 ent->t262.end_addr = end;
351 } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) {
352 start = vha->hw->fw_shared_ram_start;
353 end = vha->hw->fw_shared_ram_end;
354 if (buf) {
355 ent->t262.start_addr = start;
356 ent->t262.end_addr = end;
357 }
358 } else {
359 ql_dbg(ql_dbg_misc, vha, 0xd022,
360 "%s: unknown area %x\n", __func__, ent->t262.ram_area);
361 qla27xx_skip_entry(ent, buf);
362 goto done;
363 }
364
365 if (end < start || end == 0) {
366 ql_dbg(ql_dbg_misc, vha, 0xd023,
367 "%s: unusable range (start=%x end=%x)\n", __func__,
368 ent->t262.end_addr, ent->t262.start_addr);
369 qla27xx_skip_entry(ent, buf);
370 goto done;
371 }
372
373 dwords = end - start + 1;
374 if (buf) {
375 buf += *len;
376 qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf);
377 }
378 *len += dwords * sizeof(uint32_t);
379 done:
380 return false;
381 }
382
383 static int
qla27xx_fwdt_entry_t263(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)384 qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha,
385 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
386 {
387 uint count = 0;
388 uint i;
389 uint length;
390
391 ql_dbg(ql_dbg_misc, vha, 0xd207,
392 "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len);
393 if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) {
394 for (i = 0; i < vha->hw->max_req_queues; i++) {
395 struct req_que *req = vha->hw->req_q_map[i];
396
397 if (!test_bit(i, vha->hw->req_qid_map))
398 continue;
399
400 if (req || !buf) {
401 length = req ?
402 req->length : REQUEST_ENTRY_CNT_24XX;
403 qla27xx_insert16(i, buf, len);
404 qla27xx_insert16(length, buf, len);
405 qla27xx_insertbuf(req ? req->ring : NULL,
406 length * sizeof(*req->ring), buf, len);
407 count++;
408 }
409 }
410 } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) {
411 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
412 struct rsp_que *rsp = vha->hw->rsp_q_map[i];
413
414 if (!test_bit(i, vha->hw->rsp_qid_map))
415 continue;
416
417 if (rsp || !buf) {
418 length = rsp ?
419 rsp->length : RESPONSE_ENTRY_CNT_MQ;
420 qla27xx_insert16(i, buf, len);
421 qla27xx_insert16(length, buf, len);
422 qla27xx_insertbuf(rsp ? rsp->ring : NULL,
423 length * sizeof(*rsp->ring), buf, len);
424 count++;
425 }
426 }
427 } else {
428 ql_dbg(ql_dbg_misc, vha, 0xd026,
429 "%s: unknown queue %x\n", __func__, ent->t263.queue_type);
430 qla27xx_skip_entry(ent, buf);
431 }
432
433 if (buf)
434 ent->t263.num_queues = count;
435
436 return false;
437 }
438
439 static int
qla27xx_fwdt_entry_t264(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)440 qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha,
441 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
442 {
443 ql_dbg(ql_dbg_misc, vha, 0xd208,
444 "%s: getfce [%lx]\n", __func__, *len);
445 if (vha->hw->fce) {
446 if (buf) {
447 ent->t264.fce_trace_size = FCE_SIZE;
448 ent->t264.write_pointer = vha->hw->fce_wr;
449 ent->t264.base_pointer = vha->hw->fce_dma;
450 ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0];
451 ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2];
452 ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3];
453 ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4];
454 ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5];
455 ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6];
456 }
457 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len);
458 } else {
459 ql_dbg(ql_dbg_misc, vha, 0xd027,
460 "%s: missing fce\n", __func__);
461 qla27xx_skip_entry(ent, buf);
462 }
463
464 return false;
465 }
466
467 static int
qla27xx_fwdt_entry_t265(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)468 qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha,
469 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
470 {
471 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
472
473 ql_dbg(ql_dbg_misc, vha, 0xd209,
474 "%s: pause risc [%lx]\n", __func__, *len);
475 if (buf)
476 qla24xx_pause_risc(reg, vha->hw);
477
478 return false;
479 }
480
481 static int
qla27xx_fwdt_entry_t266(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)482 qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha,
483 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
484 {
485 ql_dbg(ql_dbg_misc, vha, 0xd20a,
486 "%s: reset risc [%lx]\n", __func__, *len);
487 if (buf)
488 qla24xx_soft_reset(vha->hw);
489
490 return false;
491 }
492
493 static int
qla27xx_fwdt_entry_t267(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)494 qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha,
495 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
496 {
497 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
498
499 ql_dbg(ql_dbg_misc, vha, 0xd20b,
500 "%s: dis intr [%lx]\n", __func__, *len);
501 qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf);
502
503 return false;
504 }
505
506 static int
qla27xx_fwdt_entry_t268(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)507 qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha,
508 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
509 {
510 ql_dbg(ql_dbg_misc, vha, 0xd20c,
511 "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len);
512 if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_TRACE) {
513 if (vha->hw->eft) {
514 if (buf) {
515 ent->t268.buf_size = EFT_SIZE;
516 ent->t268.start_addr = vha->hw->eft_dma;
517 }
518 qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len);
519 } else {
520 ql_dbg(ql_dbg_misc, vha, 0xd028,
521 "%s: missing eft\n", __func__);
522 qla27xx_skip_entry(ent, buf);
523 }
524 } else {
525 ql_dbg(ql_dbg_misc, vha, 0xd02b,
526 "%s: unknown buffer %x\n", __func__, ent->t268.buf_type);
527 qla27xx_skip_entry(ent, buf);
528 }
529
530 return false;
531 }
532
533 static int
qla27xx_fwdt_entry_t269(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)534 qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha,
535 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
536 {
537 ql_dbg(ql_dbg_misc, vha, 0xd20d,
538 "%s: scratch [%lx]\n", __func__, *len);
539 qla27xx_insert32(0xaaaaaaaa, buf, len);
540 qla27xx_insert32(0xbbbbbbbb, buf, len);
541 qla27xx_insert32(0xcccccccc, buf, len);
542 qla27xx_insert32(0xdddddddd, buf, len);
543 qla27xx_insert32(*len + sizeof(uint32_t), buf, len);
544 if (buf)
545 ent->t269.scratch_size = 5 * sizeof(uint32_t);
546
547 return false;
548 }
549
550 static int
qla27xx_fwdt_entry_t270(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)551 qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha,
552 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
553 {
554 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
555 ulong dwords = ent->t270.count;
556 ulong addr = ent->t270.addr;
557
558 ql_dbg(ql_dbg_misc, vha, 0xd20e,
559 "%s: rdremreg [%lx]\n", __func__, *len);
560 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
561 while (dwords--) {
562 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf);
563 qla27xx_insert32(addr, buf, len);
564 qla27xx_read_reg(reg, 0xc4, buf, len);
565 addr += sizeof(uint32_t);
566 }
567
568 return false;
569 }
570
571 static int
qla27xx_fwdt_entry_t271(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)572 qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha,
573 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
574 {
575 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
576 ulong addr = ent->t271.addr;
577 ulong data = ent->t271.data;
578
579 ql_dbg(ql_dbg_misc, vha, 0xd20f,
580 "%s: wrremreg [%lx]\n", __func__, *len);
581 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
582 qla27xx_write_reg(reg, 0xc4, data, buf);
583 qla27xx_write_reg(reg, 0xc0, addr, buf);
584
585 return false;
586 }
587
588 static int
qla27xx_fwdt_entry_t272(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)589 qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha,
590 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
591 {
592 ulong dwords = ent->t272.count;
593 ulong start = ent->t272.addr;
594
595 ql_dbg(ql_dbg_misc, vha, 0xd210,
596 "%s: rdremram [%lx]\n", __func__, *len);
597 if (buf) {
598 ql_dbg(ql_dbg_misc, vha, 0xd02c,
599 "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords);
600 buf += *len;
601 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf);
602 }
603 *len += dwords * sizeof(uint32_t);
604
605 return false;
606 }
607
608 static int
qla27xx_fwdt_entry_t273(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)609 qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha,
610 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
611 {
612 ulong dwords = ent->t273.count;
613 ulong addr = ent->t273.addr;
614 uint32_t value;
615
616 ql_dbg(ql_dbg_misc, vha, 0xd211,
617 "%s: pcicfg [%lx]\n", __func__, *len);
618 while (dwords--) {
619 value = ~0;
620 if (pci_read_config_dword(vha->hw->pdev, addr, &value))
621 ql_dbg(ql_dbg_misc, vha, 0xd02d,
622 "%s: failed pcicfg read at %lx\n", __func__, addr);
623 qla27xx_insert32(addr, buf, len);
624 qla27xx_insert32(value, buf, len);
625 addr += sizeof(uint32_t);
626 }
627
628 return false;
629 }
630
631 static int
qla27xx_fwdt_entry_t274(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)632 qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
633 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
634 {
635 uint count = 0;
636 uint i;
637
638 ql_dbg(ql_dbg_misc, vha, 0xd212,
639 "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len);
640 if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) {
641 for (i = 0; i < vha->hw->max_req_queues; i++) {
642 struct req_que *req = vha->hw->req_q_map[i];
643
644 if (!test_bit(i, vha->hw->req_qid_map))
645 continue;
646
647 if (req || !buf) {
648 qla27xx_insert16(i, buf, len);
649 qla27xx_insert16(1, buf, len);
650 qla27xx_insert32(req && req->out_ptr ?
651 *req->out_ptr : 0, buf, len);
652 count++;
653 }
654 }
655 } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) {
656 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
657 struct rsp_que *rsp = vha->hw->rsp_q_map[i];
658
659 if (!test_bit(i, vha->hw->rsp_qid_map))
660 continue;
661
662 if (rsp || !buf) {
663 qla27xx_insert16(i, buf, len);
664 qla27xx_insert16(1, buf, len);
665 qla27xx_insert32(rsp && rsp->in_ptr ?
666 *rsp->in_ptr : 0, buf, len);
667 count++;
668 }
669 }
670 } else {
671 ql_dbg(ql_dbg_misc, vha, 0xd02f,
672 "%s: unknown queue %x\n", __func__, ent->t274.queue_type);
673 qla27xx_skip_entry(ent, buf);
674 }
675
676 if (buf)
677 ent->t274.num_queues = count;
678
679 if (!count)
680 qla27xx_skip_entry(ent, buf);
681
682 return false;
683 }
684
685 static int
qla27xx_fwdt_entry_t275(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)686 qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha,
687 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
688 {
689 ulong offset = offsetof(typeof(*ent), t275.buffer);
690
691 ql_dbg(ql_dbg_misc, vha, 0xd213,
692 "%s: buffer(%x) [%lx]\n", __func__, ent->t275.length, *len);
693 if (!ent->t275.length) {
694 ql_dbg(ql_dbg_misc, vha, 0xd020,
695 "%s: buffer zero length\n", __func__);
696 qla27xx_skip_entry(ent, buf);
697 goto done;
698 }
699 if (offset + ent->t275.length > ent->hdr.entry_size) {
700 ql_dbg(ql_dbg_misc, vha, 0xd030,
701 "%s: buffer overflow\n", __func__);
702 qla27xx_skip_entry(ent, buf);
703 goto done;
704 }
705
706 qla27xx_insertbuf(ent->t275.buffer, ent->t275.length, buf, len);
707 done:
708 return false;
709 }
710
711 static int
qla27xx_fwdt_entry_other(struct scsi_qla_host * vha,struct qla27xx_fwdt_entry * ent,void * buf,ulong * len)712 qla27xx_fwdt_entry_other(struct scsi_qla_host *vha,
713 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
714 {
715 ql_dbg(ql_dbg_misc, vha, 0xd2ff,
716 "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len);
717 qla27xx_skip_entry(ent, buf);
718
719 return false;
720 }
721
722 struct qla27xx_fwdt_entry_call {
723 uint type;
724 int (*call)(
725 struct scsi_qla_host *,
726 struct qla27xx_fwdt_entry *,
727 void *,
728 ulong *);
729 };
730
731 static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = {
732 { ENTRY_TYPE_NOP , qla27xx_fwdt_entry_t0 } ,
733 { ENTRY_TYPE_TMP_END , qla27xx_fwdt_entry_t255 } ,
734 { ENTRY_TYPE_RD_IOB_T1 , qla27xx_fwdt_entry_t256 } ,
735 { ENTRY_TYPE_WR_IOB_T1 , qla27xx_fwdt_entry_t257 } ,
736 { ENTRY_TYPE_RD_IOB_T2 , qla27xx_fwdt_entry_t258 } ,
737 { ENTRY_TYPE_WR_IOB_T2 , qla27xx_fwdt_entry_t259 } ,
738 { ENTRY_TYPE_RD_PCI , qla27xx_fwdt_entry_t260 } ,
739 { ENTRY_TYPE_WR_PCI , qla27xx_fwdt_entry_t261 } ,
740 { ENTRY_TYPE_RD_RAM , qla27xx_fwdt_entry_t262 } ,
741 { ENTRY_TYPE_GET_QUEUE , qla27xx_fwdt_entry_t263 } ,
742 { ENTRY_TYPE_GET_FCE , qla27xx_fwdt_entry_t264 } ,
743 { ENTRY_TYPE_PSE_RISC , qla27xx_fwdt_entry_t265 } ,
744 { ENTRY_TYPE_RST_RISC , qla27xx_fwdt_entry_t266 } ,
745 { ENTRY_TYPE_DIS_INTR , qla27xx_fwdt_entry_t267 } ,
746 { ENTRY_TYPE_GET_HBUF , qla27xx_fwdt_entry_t268 } ,
747 { ENTRY_TYPE_SCRATCH , qla27xx_fwdt_entry_t269 } ,
748 { ENTRY_TYPE_RDREMREG , qla27xx_fwdt_entry_t270 } ,
749 { ENTRY_TYPE_WRREMREG , qla27xx_fwdt_entry_t271 } ,
750 { ENTRY_TYPE_RDREMRAM , qla27xx_fwdt_entry_t272 } ,
751 { ENTRY_TYPE_PCICFG , qla27xx_fwdt_entry_t273 } ,
752 { ENTRY_TYPE_GET_SHADOW , qla27xx_fwdt_entry_t274 } ,
753 { ENTRY_TYPE_WRITE_BUF , qla27xx_fwdt_entry_t275 } ,
754 { -1 , qla27xx_fwdt_entry_other }
755 };
756
qla27xx_find_entry(uint type)757 static inline int (*qla27xx_find_entry(uint type))
758 (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *)
759 {
760 struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list;
761
762 while (list->type < type)
763 list++;
764
765 if (list->type == type)
766 return list->call;
767 return qla27xx_fwdt_entry_other;
768 }
769
770 static inline void *
qla27xx_next_entry(void * p)771 qla27xx_next_entry(void *p)
772 {
773 struct qla27xx_fwdt_entry *ent = p;
774
775 return p + ent->hdr.entry_size;
776 }
777
778 static void
qla27xx_walk_template(struct scsi_qla_host * vha,struct qla27xx_fwdt_template * tmp,void * buf,ulong * len)779 qla27xx_walk_template(struct scsi_qla_host *vha,
780 struct qla27xx_fwdt_template *tmp, void *buf, ulong *len)
781 {
782 struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset;
783 ulong count = tmp->entry_count;
784
785 ql_dbg(ql_dbg_misc, vha, 0xd01a,
786 "%s: entry count %lx\n", __func__, count);
787 while (count--) {
788 if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len))
789 break;
790 ent = qla27xx_next_entry(ent);
791 }
792
793 if (count)
794 ql_dbg(ql_dbg_misc, vha, 0xd018,
795 "%s: residual count (%lx)\n", __func__, count);
796
797 if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END)
798 ql_dbg(ql_dbg_misc, vha, 0xd019,
799 "%s: missing end (%lx)\n", __func__, count);
800
801 ql_dbg(ql_dbg_misc, vha, 0xd01b,
802 "%s: len=%lx\n", __func__, *len);
803 }
804
805 static void
qla27xx_time_stamp(struct qla27xx_fwdt_template * tmp)806 qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp)
807 {
808 tmp->capture_timestamp = jiffies;
809 }
810
811 static void
qla27xx_driver_info(struct qla27xx_fwdt_template * tmp)812 qla27xx_driver_info(struct qla27xx_fwdt_template *tmp)
813 {
814 uint8_t v[] = { 0, 0, 0, 0, 0, 0 };
815 int rval = 0;
816
817 rval = sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu",
818 v+0, v+1, v+2, v+3, v+4, v+5);
819
820 tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0];
821 tmp->driver_info[1] = v[5] << 8 | v[4];
822 tmp->driver_info[2] = 0x12345678;
823 }
824
825 static void
qla27xx_firmware_info(struct qla27xx_fwdt_template * tmp,struct scsi_qla_host * vha)826 qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp,
827 struct scsi_qla_host *vha)
828 {
829 tmp->firmware_version[0] = vha->hw->fw_major_version;
830 tmp->firmware_version[1] = vha->hw->fw_minor_version;
831 tmp->firmware_version[2] = vha->hw->fw_subminor_version;
832 tmp->firmware_version[3] =
833 vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes;
834 tmp->firmware_version[4] =
835 vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0];
836 }
837
838 static void
ql27xx_edit_template(struct scsi_qla_host * vha,struct qla27xx_fwdt_template * tmp)839 ql27xx_edit_template(struct scsi_qla_host *vha,
840 struct qla27xx_fwdt_template *tmp)
841 {
842 qla27xx_time_stamp(tmp);
843 qla27xx_driver_info(tmp);
844 qla27xx_firmware_info(tmp, vha);
845 }
846
847 static inline uint32_t
qla27xx_template_checksum(void * p,ulong size)848 qla27xx_template_checksum(void *p, ulong size)
849 {
850 uint32_t *buf = p;
851 uint64_t sum = 0;
852
853 size /= sizeof(*buf);
854
855 while (size--)
856 sum += *buf++;
857
858 sum = (sum & 0xffffffff) + (sum >> 32);
859
860 return ~sum;
861 }
862
863 static inline int
qla27xx_verify_template_checksum(struct qla27xx_fwdt_template * tmp)864 qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp)
865 {
866 return qla27xx_template_checksum(tmp, tmp->template_size) == 0;
867 }
868
869 static inline int
qla27xx_verify_template_header(struct qla27xx_fwdt_template * tmp)870 qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp)
871 {
872 return tmp->template_type == TEMPLATE_TYPE_FWDUMP;
873 }
874
875 static void
qla27xx_execute_fwdt_template(struct scsi_qla_host * vha)876 qla27xx_execute_fwdt_template(struct scsi_qla_host *vha)
877 {
878 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
879 ulong len;
880
881 if (qla27xx_fwdt_template_valid(tmp)) {
882 len = tmp->template_size;
883 tmp = memcpy(vha->hw->fw_dump, tmp, len);
884 ql27xx_edit_template(vha, tmp);
885 qla27xx_walk_template(vha, tmp, tmp, &len);
886 vha->hw->fw_dump_len = len;
887 vha->hw->fw_dumped = 1;
888 }
889 }
890
891 ulong
qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host * vha)892 qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha)
893 {
894 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
895 ulong len = 0;
896
897 if (qla27xx_fwdt_template_valid(tmp)) {
898 len = tmp->template_size;
899 qla27xx_walk_template(vha, tmp, NULL, &len);
900 }
901
902 return len;
903 }
904
905 ulong
qla27xx_fwdt_template_size(void * p)906 qla27xx_fwdt_template_size(void *p)
907 {
908 struct qla27xx_fwdt_template *tmp = p;
909
910 return tmp->template_size;
911 }
912
913 ulong
qla27xx_fwdt_template_default_size(void)914 qla27xx_fwdt_template_default_size(void)
915 {
916 return sizeof(ql27xx_fwdt_default_template);
917 }
918
919 const void *
qla27xx_fwdt_template_default(void)920 qla27xx_fwdt_template_default(void)
921 {
922 return ql27xx_fwdt_default_template;
923 }
924
925 int
qla27xx_fwdt_template_valid(void * p)926 qla27xx_fwdt_template_valid(void *p)
927 {
928 struct qla27xx_fwdt_template *tmp = p;
929
930 if (!qla27xx_verify_template_header(tmp)) {
931 ql_log(ql_log_warn, NULL, 0xd01c,
932 "%s: template type %x\n", __func__, tmp->template_type);
933 return false;
934 }
935
936 if (!qla27xx_verify_template_checksum(tmp)) {
937 ql_log(ql_log_warn, NULL, 0xd01d,
938 "%s: failed template checksum\n", __func__);
939 return false;
940 }
941
942 return true;
943 }
944
945 void
qla27xx_fwdump(scsi_qla_host_t * vha,int hardware_locked)946 qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked)
947 {
948 ulong flags = 0;
949
950 if (!hardware_locked)
951 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
952
953 if (!vha->hw->fw_dump)
954 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n");
955 else if (!vha->hw->fw_dump_template)
956 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n");
957 else
958 qla27xx_execute_fwdt_template(vha);
959
960 if (!hardware_locked)
961 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
962 }
963