/drivers/gpu/drm/nouveau/ |
D | nouveau_dma.h | 111 BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NV04() argument 113 OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd); in BEGIN_NV04() 117 BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NI04() argument 119 OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd); in BEGIN_NI04() 123 BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NVC0() argument 125 OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2)); in BEGIN_NVC0() 129 BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NIC0() argument 131 OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2)); in BEGIN_NIC0() 135 BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data) in BEGIN_IMC0() argument 137 OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2)); in BEGIN_IMC0()
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/drivers/gpu/drm/nouveau/core/engine/fifo/ |
D | nv04.c | 367 const int subc = (addr >> 13) & 0x7; in nv04_fifo_swmthd() local 386 engine = 0x0000000f << (subc * 4); in nv04_fifo_swmthd() 387 chan->subc[subc] = data; in nv04_fifo_swmthd() 397 if (unlikely(((engine >> (subc * 4)) & 0xf) != 0)) in nv04_fifo_swmthd() 400 bind = nouveau_namedb_get(nv_namedb(chan), chan->subc[subc]); in nv04_fifo_swmthd()
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D | nv50.h | 21 u32 subc[8]; member
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D | nv04.h | 157 u32 subc[8]; member
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D | nvc0.c | 695 u32 subc = (addr & 0x00070000) >> 16; in nvc0_fifo_intr_pbdma() local 712 subc, mthd, data); in nvc0_fifo_intr_pbdma()
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D | nve0.c | 836 u32 subc = (addr & 0x00070000) >> 16; in nve0_fifo_intr_pbdma() local 853 subc, mthd, data); in nve0_fifo_intr_pbdma()
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/drivers/gpu/drm/nouveau/core/engine/copy/ |
D | nva3.c | 94 u32 subc = (addr & 0x3800) >> 11; in nva3_copy_intr() local 105 chid, inst << 12, nouveau_client_name(engctx), subc, in nva3_copy_intr()
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/drivers/gpu/drm/nouveau/core/engine/crypt/ |
D | nv98.c | 95 u32 subc = (addr & 0x3800) >> 11; in nv98_crypt_intr() local 107 subc, mthd, data); in nv98_crypt_intr()
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/drivers/gpu/drm/nouveau/core/engine/graph/ |
D | nv50.c | 608 u32 subc = (addr & 0x00070000) >> 16; in nv50_graph_trap_handler() local 620 nouveau_client_name(engctx), subc, in nv50_graph_trap_handler() 635 u32 subc = (addr & 0x00070000) >> 16; in nv50_graph_trap_handler() local 645 nouveau_client_name(engctx), subc, in nv50_graph_trap_handler() 804 u32 subc = (addr & 0x00070000) >> 16; in nv50_graph_intr() local 849 subc, class, mthd, data); in nv50_graph_intr()
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D | nv04.c | 455 int subc = (nv_rd32(priv, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7; in nv04_graph_set_ctx1() local 464 nv_wr32(priv, NV04_PGRAPH_CTX_CACHE1 + (subc<<2), tmp); in nv04_graph_set_ctx1() 1267 u32 subc = (addr & 0x0000e000) >> 13; in nv04_graph_intr() local 1270 u32 class = nv_rd32(priv, 0x400180 + subc * 4) & 0xff; in nv04_graph_intr() 1309 chid, nouveau_client_name(chan), subc, class, mthd, in nv04_graph_intr()
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D | nv20.c | 207 u32 subc = (addr & 0x00070000) >> 16; in nv20_graph_intr() local 210 u32 class = nv_rd32(priv, 0x400160 + subc * 4) & 0xfff; in nv20_graph_intr() 236 chid, nouveau_client_name(engctx), subc, class, mthd, in nv20_graph_intr()
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D | nv40.c | 305 u32 subc = (addr & 0x00070000) >> 16; in nv40_graph_intr() local 308 u32 class = nv_rd32(priv, 0x400160 + subc * 4) & 0xffff; in nv40_graph_intr() 341 chid, inst << 4, nouveau_client_name(engctx), subc, in nv40_graph_intr()
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D | nvc0.c | 1045 u32 subc = (addr & 0x00070000) >> 16; in nvc0_graph_ctxctl_isr() local 1051 subc, class, mthd, data); in nvc0_graph_ctxctl_isr() 1086 u32 subc = (addr & 0x00070000) >> 16; in nvc0_graph_intr() local 1089 u32 class = nv_rd32(priv, 0x404200 + (subc * 4)); in nvc0_graph_intr() 1101 subc, class, mthd, data); in nvc0_graph_intr() 1111 chid, inst << 12, nouveau_client_name(engctx), subc, in nvc0_graph_intr() 1121 chid, inst << 12, nouveau_client_name(engctx), subc, in nvc0_graph_intr()
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D | nv10.c | 1167 u32 subc = (addr & 0x00070000) >> 16; in nv10_graph_intr() local 1170 u32 class = nv_rd32(priv, 0x400160 + subc * 4) & 0xfff; in nv10_graph_intr() 1208 chid, nouveau_client_name(chan), subc, class, mthd, in nv10_graph_intr()
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/drivers/gpu/drm/i2c/ |
D | ch7006_mode.c | 106 subc, scale, scale_mask, norm_mask, e_hd, e_vd) { \ argument 128 .subc_coeff = subc * fixed1, \ 136 subc, scale, scale_mask, norm_mask) \ argument 137 __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
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