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1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/input/input.h>
15#include "imx25.dtsi"
16
17/ {
18	model = "Freescale i.MX25 Product Development Kit";
19	compatible = "fsl,imx25-pdk", "fsl,imx25";
20
21	memory {
22		reg = <0x80000000 0x4000000>;
23	};
24
25	regulators {
26		compatible = "simple-bus";
27		#address-cells = <1>;
28		#size-cells = <0>;
29
30		reg_fec_3v3: regulator@0 {
31			compatible = "regulator-fixed";
32			reg = <0>;
33			regulator-name = "fec-3v3";
34			regulator-min-microvolt = <3300000>;
35			regulator-max-microvolt = <3300000>;
36			gpio = <&gpio2 3 0>;
37			enable-active-high;
38		};
39
40		reg_2p5v: regulator@1 {
41			compatible = "regulator-fixed";
42			reg = <1>;
43			regulator-name = "2P5V";
44			regulator-min-microvolt = <2500000>;
45			regulator-max-microvolt = <2500000>;
46		};
47
48		reg_3p3v: regulator@2 {
49			compatible = "regulator-fixed";
50			reg = <2>;
51			regulator-name = "3P3V";
52			regulator-min-microvolt = <3300000>;
53			regulator-max-microvolt = <3300000>;
54		};
55
56		reg_can_3v3: regulator@3 {
57			compatible = "regulator-fixed";
58			reg = <3>;
59			regulator-name = "can-3v3";
60			regulator-min-microvolt = <3300000>;
61			regulator-max-microvolt = <3300000>;
62			gpio = <&gpio4 6 0>;
63		};
64	};
65
66	sound {
67		compatible = "fsl,imx25-pdk-sgtl5000",
68			     "fsl,imx-audio-sgtl5000";
69		model = "imx25-pdk-sgtl5000";
70		ssi-controller = <&ssi1>;
71		audio-codec = <&codec>;
72		audio-routing =
73			"MIC_IN", "Mic Jack",
74			"Mic Jack", "Mic Bias",
75			"Headphone Jack", "HP_OUT";
76		mux-int-port = <1>;
77		mux-ext-port = <4>;
78	};
79};
80
81&audmux {
82	pinctrl-names = "default";
83	pinctrl-0 = <&pinctrl_audmux>;
84	status = "okay";
85};
86
87&can1 {
88	pinctrl-names = "default";
89	pinctrl-0 = <&pinctrl_can1>;
90	xceiver-supply = <&reg_can_3v3>;
91	status = "okay";
92};
93
94&esdhc1 {
95	pinctrl-names = "default";
96	pinctrl-0 = <&pinctrl_esdhc1>;
97	cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
98	wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
99	status = "okay";
100};
101
102&fec {
103	phy-mode = "rmii";
104	pinctrl-names = "default";
105	pinctrl-0 = <&pinctrl_fec>;
106	phy-supply = <&reg_fec_3v3>;
107	phy-reset-gpios = <&gpio4 8 0>;
108	status = "okay";
109};
110
111&i2c1 {
112	clock-frequency = <100000>;
113	pinctrl-names = "default";
114	pinctrl-0 = <&pinctrl_i2c1>;
115	status = "okay";
116
117	codec: sgtl5000@0a {
118		compatible = "fsl,sgtl5000";
119		reg = <0x0a>;
120		clocks = <&clks 129>;
121		VDDA-supply = <&reg_2p5v>;
122		VDDIO-supply = <&reg_3p3v>;
123	};
124};
125
126&iomuxc {
127	imx25-pdk {
128		pinctrl_audmux: audmuxgrp {
129			fsl,pins = <
130				MX25_PAD_RW__AUD4_TXFS			0xe0
131				MX25_PAD_OE__AUD4_TXC			0xe0
132				MX25_PAD_EB0__AUD4_TXD			0xe0
133				MX25_PAD_EB1__AUD4_RXD			0xe0
134			>;
135		};
136
137		pinctrl_can1: can1grp {
138			fsl,pins = <
139				MX25_PAD_GPIO_A__CAN1_TX		0x0
140				MX25_PAD_GPIO_B__CAN1_RX		0x0
141				MX25_PAD_D14__GPIO_4_6 			0x80000000
142			>;
143		};
144
145		pinctrl_esdhc1: esdhc1grp {
146			fsl,pins = <
147				MX25_PAD_SD1_CMD__SD1_CMD		0x80000000
148				MX25_PAD_SD1_CLK__SD1_CLK		0x80000000
149				MX25_PAD_SD1_DATA0__SD1_DATA0		0x80000000
150				MX25_PAD_SD1_DATA1__SD1_DATA1		0x80000000
151				MX25_PAD_SD1_DATA2__SD1_DATA2		0x80000000
152				MX25_PAD_SD1_DATA3__SD1_DATA3		0x80000000
153				MX25_PAD_A14__GPIO_2_0			0x80000000
154				MX25_PAD_A15__GPIO_2_1			0x80000000
155			>;
156		};
157
158		pinctrl_fec: fecgrp {
159			fsl,pins = <
160				MX25_PAD_FEC_MDC__FEC_MDC		0x80000000
161				MX25_PAD_FEC_MDIO__FEC_MDIO		0x400001e0
162				MX25_PAD_FEC_TDATA0__FEC_TDATA0		0x80000000
163				MX25_PAD_FEC_TDATA1__FEC_TDATA1		0x80000000
164				MX25_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
165				MX25_PAD_FEC_RDATA0__FEC_RDATA0		0x80000000
166				MX25_PAD_FEC_RDATA1__FEC_RDATA1		0x80000000
167				MX25_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000
168				MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		0x1c0
169				MX25_PAD_A17__GPIO_2_3			0x80000000
170				MX25_PAD_D12__GPIO_4_8			0x80000000
171			>;
172		};
173
174		pinctrl_i2c1: i2c1grp {
175			fsl,pins = <
176				MX25_PAD_I2C1_CLK__I2C1_CLK		0x80000000
177				MX25_PAD_I2C1_DAT__I2C1_DAT		0x80000000
178			>;
179		};
180
181		pinctrl_kpp: kppgrp {
182			fsl,pins = <
183				MX25_PAD_KPP_ROW0__KPP_ROW0	0x80000000
184				MX25_PAD_KPP_ROW1__KPP_ROW1	0x80000000
185				MX25_PAD_KPP_ROW2__KPP_ROW2	0x80000000
186				MX25_PAD_KPP_ROW3__KPP_ROW3	0x80000000
187				MX25_PAD_KPP_COL0__KPP_COL0	0x80000000
188				MX25_PAD_KPP_COL1__KPP_COL1	0x80000000
189				MX25_PAD_KPP_COL2__KPP_COL2	0x80000000
190				MX25_PAD_KPP_COL3__KPP_COL3	0x80000000
191			>;
192		};
193
194
195		pinctrl_uart1: uart1grp {
196			fsl,pins = <
197				MX25_PAD_UART1_RTS__UART1_RTS		0xe0
198				MX25_PAD_UART1_CTS__UART1_CTS		0xe0
199				MX25_PAD_UART1_TXD__UART1_TXD		0x80000000
200				MX25_PAD_UART1_RXD__UART1_RXD		0xc0
201			>;
202		};
203	};
204};
205
206&nfc {
207	nand-on-flash-bbt;
208	status = "okay";
209};
210
211&kpp {
212	pinctrl-names = "default";
213	pinctrl-0 = <&pinctrl_kpp>;
214	linux,keymap = <
215			MATRIX_KEY(0x0, 0x0, KEY_UP)
216			MATRIX_KEY(0x0, 0x1, KEY_DOWN)
217			MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN)
218			MATRIX_KEY(0x0, 0x3, KEY_HOME)
219			MATRIX_KEY(0x1, 0x0, KEY_RIGHT)
220			MATRIX_KEY(0x1, 0x1, KEY_LEFT)
221			MATRIX_KEY(0x1, 0x2, KEY_ENTER)
222			MATRIX_KEY(0x1, 0x3, KEY_VOLUMEUP)
223			MATRIX_KEY(0x2, 0x0, KEY_F6)
224			MATRIX_KEY(0x2, 0x1, KEY_F8)
225			MATRIX_KEY(0x2, 0x2, KEY_F9)
226			MATRIX_KEY(0x2, 0x3, KEY_F10)
227			MATRIX_KEY(0x3, 0x0, KEY_F1)
228			MATRIX_KEY(0x3, 0x1, KEY_F2)
229			MATRIX_KEY(0x3, 0x2, KEY_F3)
230			MATRIX_KEY(0x3, 0x2, KEY_POWER)
231	>;
232	status = "okay";
233};
234
235&ssi1 {
236	codec-handle = <&codec>;
237	status = "okay";
238};
239
240&uart1 {
241	pinctrl-names = "default";
242	pinctrl-0 = <&pinctrl_uart1>;
243	fsl,uart-has-rtscts;
244	status = "okay";
245};
246
247&usbhost1 {
248	phy_type = "serial";
249	dr_mode = "host";
250	status = "okay";
251};
252
253&usbotg {
254	phy_type = "utmi";
255	dr_mode = "otg";
256	external-vbus-divider;
257	status = "okay";
258};
259