1/* 2 * Device Tree file for LaCie 5Big Network v2 3 * 4 * Copyright (C) 2014 5 * 6 * Andrew Lunn <andrew@lunn.ch> 7 * 8 * Based on netxbig_v2-setup.c, 9 * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> 10 * 11 * This file is licensed under the terms of the GNU General Public 12 * License version 2. This program is licensed "as is" without any 13 * warranty of any kind, whether express or implied. 14*/ 15 16/dts-v1/; 17 18#include "kirkwood.dtsi" 19#include "kirkwood-6281.dtsi" 20#include "kirkwood-netxbig.dtsi" 21 22/ { 23 model = "LaCie 5Big Network v2"; 24 compatible = "lacie,net5big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood"; 25 26 memory { 27 device_type = "memory"; 28 reg = <0x00000000 0x20000000>; 29 }; 30 31}; 32 33®ulators { 34 regulator@2 { 35 compatible = "regulator-fixed"; 36 reg = <2>; 37 regulator-name = "hdd1power"; 38 regulator-min-microvolt = <5000000>; 39 regulator-max-microvolt = <5000000>; 40 enable-active-high; 41 regulator-always-on; 42 regulator-boot-on; 43 gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; 44 }; 45 46 regulator@3 { 47 compatible = "regulator-fixed"; 48 reg = <3>; 49 regulator-name = "hdd2power"; 50 regulator-min-microvolt = <5000000>; 51 regulator-max-microvolt = <5000000>; 52 enable-active-high; 53 regulator-always-on; 54 regulator-boot-on; 55 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 56 }; 57 58 regulator@4 { 59 compatible = "regulator-fixed"; 60 reg = <4>; 61 regulator-name = "hdd3power"; 62 regulator-min-microvolt = <5000000>; 63 regulator-max-microvolt = <5000000>; 64 enable-active-high; 65 regulator-always-on; 66 regulator-boot-on; 67 gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; 68 }; 69 70 regulator@5 { 71 compatible = "regulator-fixed"; 72 reg = <5>; 73 regulator-name = "hdd4power"; 74 regulator-min-microvolt = <5000000>; 75 regulator-max-microvolt = <5000000>; 76 enable-active-high; 77 regulator-always-on; 78 regulator-boot-on; 79 gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>; 80 }; 81 82 clocks { 83 g762_clk: g762-oscillator { 84 compatible = "fixed-clock"; 85 #clock-cells = <0>; 86 clock-frequency = <32768>; 87 }; 88 }; 89}; 90 91&mdio { 92 ethphy1: ethernet-phy@1 { 93 reg = <0>; 94 }; 95}; 96 97ð1 { 98 status = "okay"; 99 ethernet1-port@0 { 100 phy-handle = <ðphy1>; 101 }; 102}; 103 104 105&i2c0 { 106 g762@3e { 107 compatible = "gmt,g762"; 108 reg = <0x3e>; 109 clocks = <&g762_clk>; 110 }; 111}; 112