1 /*
2 * TI DaVinci serial driver
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/serial_8250.h>
25 #include <linux/serial_reg.h>
26 #include <linux/platform_device.h>
27 #include <linux/delay.h>
28 #include <linux/clk.h>
29 #include <linux/io.h>
30
31 #include <mach/serial.h>
32 #include <mach/cputype.h>
33
serial_read_reg(struct plat_serial8250_port * up,int offset)34 static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
35 int offset)
36 {
37 offset <<= up->regshift;
38
39 WARN_ONCE(!up->membase, "unmapped read: uart[%d]\n", offset);
40
41 return (unsigned int)__raw_readl(up->membase + offset);
42 }
43
serial_write_reg(struct plat_serial8250_port * p,int offset,int value)44 static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
45 int value)
46 {
47 offset <<= p->regshift;
48
49 WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset);
50
51 __raw_writel(value, p->membase + offset);
52 }
53
davinci_serial_reset(struct plat_serial8250_port * p)54 static void __init davinci_serial_reset(struct plat_serial8250_port *p)
55 {
56 unsigned int pwremu = 0;
57
58 serial_write_reg(p, UART_IER, 0); /* disable all interrupts */
59
60 /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
61 serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
62 mdelay(10);
63
64 pwremu |= (0x3 << 13);
65 pwremu |= 0x1;
66 serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
67
68 if (cpu_is_davinci_dm646x())
69 serial_write_reg(p, UART_DM646X_SCR,
70 UART_DM646X_SCR_TX_WATERMARK);
71 }
72
davinci_serial_init(struct platform_device * serial_dev)73 int __init davinci_serial_init(struct platform_device *serial_dev)
74 {
75 int i, ret = 0;
76 struct device *dev;
77 struct plat_serial8250_port *p;
78 struct clk *clk;
79
80 /*
81 * Make sure the serial ports are muxed on at this point.
82 * You have to mux them off in device drivers later on if not needed.
83 */
84 for (i = 0; serial_dev[i].dev.platform_data != NULL; i++) {
85 dev = &serial_dev[i].dev;
86 p = dev->platform_data;
87
88 ret = platform_device_register(&serial_dev[i]);
89 if (ret)
90 continue;
91
92 clk = clk_get(dev, NULL);
93 if (IS_ERR(clk)) {
94 pr_err("%s:%d: failed to get UART%d clock\n",
95 __func__, __LINE__, i);
96 continue;
97 }
98
99 clk_prepare_enable(clk);
100
101 p->uartclk = clk_get_rate(clk);
102
103 if (!p->membase && p->mapbase) {
104 p->membase = ioremap(p->mapbase, SZ_4K);
105
106 if (p->membase)
107 p->flags &= ~UPF_IOREMAP;
108 else
109 pr_err("uart regs ioremap failed\n");
110 }
111
112 if (p->membase && p->type != PORT_AR7)
113 davinci_serial_reset(p);
114 }
115 return ret;
116 }
117