1 /*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13 #include <linux/init.h>
14 #include <linux/smp.h>
15 #include <asm/cacheflush.h>
16 #include <asm/page.h>
17 #include <asm/smp_scu.h>
18 #include <asm/mach/map.h>
19
20 #include "common.h"
21 #include "hardware.h"
22
23 u32 g_diag_reg;
24 static void __iomem *scu_base;
25
26 static struct map_desc scu_io_desc __initdata = {
27 /* .virtual and .pfn are run-time assigned */
28 .length = SZ_4K,
29 .type = MT_DEVICE,
30 };
31
imx_scu_map_io(void)32 void __init imx_scu_map_io(void)
33 {
34 unsigned long base;
35
36 /* Get SCU base */
37 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
38
39 scu_io_desc.virtual = IMX_IO_P2V(base);
40 scu_io_desc.pfn = __phys_to_pfn(base);
41 iotable_init(&scu_io_desc, 1);
42
43 scu_base = IMX_IO_ADDRESS(base);
44 }
45
imx_boot_secondary(unsigned int cpu,struct task_struct * idle)46 static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
47 {
48 imx_set_cpu_jump(cpu, v7_secondary_startup);
49 imx_enable_cpu(cpu, true);
50 return 0;
51 }
52
53 /*
54 * Initialise the CPU possible map early - this describes the CPUs
55 * which may be present or become present in the system.
56 */
imx_smp_init_cpus(void)57 static void __init imx_smp_init_cpus(void)
58 {
59 int i, ncores;
60
61 ncores = scu_get_core_count(scu_base);
62
63 for (i = ncores; i < NR_CPUS; i++)
64 set_cpu_possible(i, false);
65 }
66
imx_smp_prepare(void)67 void imx_smp_prepare(void)
68 {
69 scu_enable(scu_base);
70 }
71
imx_smp_prepare_cpus(unsigned int max_cpus)72 static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
73 {
74 imx_smp_prepare();
75
76 /*
77 * The diagnostic register holds the errata bits. Mostly bootloader
78 * does not bring up secondary cores, so that when errata bits are set
79 * in bootloader, they are set only for boot cpu. But on a SMP
80 * configuration, it should be equally done on every single core.
81 * Read the register from boot cpu here, and will replicate it into
82 * secondary cores when booting them.
83 */
84 asm("mrc p15, 0, %0, c15, c0, 1" : "=r" (g_diag_reg) : : "cc");
85 sync_cache_w(&g_diag_reg);
86 }
87
88 struct smp_operations imx_smp_ops __initdata = {
89 .smp_init_cpus = imx_smp_init_cpus,
90 .smp_prepare_cpus = imx_smp_prepare_cpus,
91 .smp_boot_secondary = imx_boot_secondary,
92 #ifdef CONFIG_HOTPLUG_CPU
93 .cpu_die = imx_cpu_die,
94 .cpu_kill = imx_cpu_kill,
95 #endif
96 };
97