1 /*
2 * Symmetric Multi Processing (SMP) support for Armada XP
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Lior Amsalem <alior@marvell.com>
7 * Yehuda Yitschak <yehuday@marvell.com>
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 *
15 * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
16 * This file implements the routines for preparing the SMP infrastructure
17 * and waking up the secondary CPUs
18 */
19
20 #include <linux/init.h>
21 #include <linux/smp.h>
22 #include <linux/clk.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/mbus.h>
26 #include <asm/cacheflush.h>
27 #include <asm/smp_plat.h>
28 #include "common.h"
29 #include "armada-370-xp.h"
30 #include "pmsu.h"
31 #include "coherency.h"
32
33 #define AXP_BOOTROM_BASE 0xfff00000
34 #define AXP_BOOTROM_SIZE 0x100000
35
get_cpu_clk(int cpu)36 static struct clk *__init get_cpu_clk(int cpu)
37 {
38 struct clk *cpu_clk;
39 struct device_node *np = of_get_cpu_node(cpu, NULL);
40
41 if (WARN(!np, "missing cpu node\n"))
42 return NULL;
43 cpu_clk = of_clk_get(np, 0);
44 if (WARN_ON(IS_ERR(cpu_clk)))
45 return NULL;
46 return cpu_clk;
47 }
48
set_secondary_cpus_clock(void)49 static void __init set_secondary_cpus_clock(void)
50 {
51 int thiscpu, cpu;
52 unsigned long rate;
53 struct clk *cpu_clk;
54
55 thiscpu = smp_processor_id();
56 cpu_clk = get_cpu_clk(thiscpu);
57 if (!cpu_clk)
58 return;
59 clk_prepare_enable(cpu_clk);
60 rate = clk_get_rate(cpu_clk);
61
62 /* set all the other CPU clk to the same rate than the boot CPU */
63 for_each_possible_cpu(cpu) {
64 if (cpu == thiscpu)
65 continue;
66 cpu_clk = get_cpu_clk(cpu);
67 if (!cpu_clk)
68 return;
69 clk_set_rate(cpu_clk, rate);
70 clk_prepare_enable(cpu_clk);
71 }
72 }
73
armada_xp_boot_secondary(unsigned int cpu,struct task_struct * idle)74 static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
75 {
76 int ret, hw_cpu;
77
78 pr_info("Booting CPU %d\n", cpu);
79
80 hw_cpu = cpu_logical_map(cpu);
81 mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
82
83 /*
84 * This is needed to wake up CPUs in the offline state after
85 * using CPU hotplug.
86 */
87 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
88
89 /*
90 * This is needed to take secondary CPUs out of reset on the
91 * initial boot.
92 */
93 ret = mvebu_cpu_reset_deassert(hw_cpu);
94 if (ret) {
95 pr_warn("unable to boot CPU: %d\n", ret);
96 return ret;
97 }
98
99 return 0;
100 }
101
102 /*
103 * When a CPU is brought back online, either through CPU hotplug, or
104 * because of the boot of a kexec'ed kernel, the PMSU configuration
105 * for this CPU might be in the deep idle state, preventing this CPU
106 * from receiving interrupts. Here, we therefore take out the current
107 * CPU from this state, which was entered by armada_xp_cpu_die()
108 * below.
109 */
armada_xp_secondary_init(unsigned int cpu)110 static void armada_xp_secondary_init(unsigned int cpu)
111 {
112 mvebu_v7_pmsu_idle_exit();
113 }
114
armada_xp_smp_init_cpus(void)115 static void __init armada_xp_smp_init_cpus(void)
116 {
117 unsigned int ncores = num_possible_cpus();
118
119 if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
120 panic("Invalid number of CPUs in DT\n");
121 }
122
armada_xp_smp_prepare_cpus(unsigned int max_cpus)123 static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
124 {
125 struct device_node *node;
126 struct resource res;
127 int err;
128
129 set_secondary_cpus_clock();
130 flush_cache_all();
131 set_cpu_coherent();
132
133 /*
134 * In order to boot the secondary CPUs we need to ensure
135 * the bootROM is mapped at the correct address.
136 */
137 node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
138 if (!node)
139 panic("Cannot find 'marvell,bootrom' compatible node");
140
141 err = of_address_to_resource(node, 0, &res);
142 if (err < 0)
143 panic("Cannot get 'bootrom' node address");
144
145 if (res.start != AXP_BOOTROM_BASE ||
146 resource_size(&res) != AXP_BOOTROM_SIZE)
147 panic("The address for the BootROM is incorrect");
148 }
149
150 #ifdef CONFIG_HOTPLUG_CPU
armada_xp_cpu_die(unsigned int cpu)151 static void armada_xp_cpu_die(unsigned int cpu)
152 {
153 /*
154 * CPU hotplug is implemented by putting offline CPUs into the
155 * deep idle sleep state.
156 */
157 armada_370_xp_pmsu_idle_enter(true);
158 }
159
160 /*
161 * We need a dummy function, so that platform_can_cpu_hotplug() knows
162 * we support CPU hotplug. However, the function does not need to do
163 * anything, because CPUs going offline can enter the deep idle state
164 * by themselves, without any help from a still alive CPU.
165 */
armada_xp_cpu_kill(unsigned int cpu)166 static int armada_xp_cpu_kill(unsigned int cpu)
167 {
168 return 1;
169 }
170 #endif
171
172 struct smp_operations armada_xp_smp_ops __initdata = {
173 .smp_init_cpus = armada_xp_smp_init_cpus,
174 .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
175 .smp_boot_secondary = armada_xp_boot_secondary,
176 .smp_secondary_init = armada_xp_secondary_init,
177 #ifdef CONFIG_HOTPLUG_CPU
178 .cpu_die = armada_xp_cpu_die,
179 .cpu_kill = armada_xp_cpu_kill,
180 #endif
181 };
182
183 CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
184 &armada_xp_smp_ops);
185