1 /*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27 #ifndef __ASSEMBLER__
28
29 #include <linux/irq.h>
30 #include <linux/delay.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c/twl.h>
33 #include <linux/i2c-omap.h>
34 #include <linux/reboot.h>
35 #include <linux/irqchip/irq-omap-intc.h>
36
37 #include <asm/proc-fns.h>
38
39 #include "i2c.h"
40 #include "serial.h"
41
42 #include "usb.h"
43
44 #define OMAP_INTC_START NR_IRQS
45
46 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
47 int omap2_pm_init(void);
48 #else
omap2_pm_init(void)49 static inline int omap2_pm_init(void)
50 {
51 return 0;
52 }
53 #endif
54
55 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
56 int omap3_pm_init(void);
57 #else
omap3_pm_init(void)58 static inline int omap3_pm_init(void)
59 {
60 return 0;
61 }
62 #endif
63
64 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
65 int omap4_pm_init(void);
66 int omap4_pm_init_early(void);
67 #else
omap4_pm_init(void)68 static inline int omap4_pm_init(void)
69 {
70 return 0;
71 }
72
omap4_pm_init_early(void)73 static inline int omap4_pm_init_early(void)
74 {
75 return 0;
76 }
77 #endif
78
79 #ifdef CONFIG_OMAP_MUX
80 int omap_mux_late_init(void);
81 #else
omap_mux_late_init(void)82 static inline int omap_mux_late_init(void)
83 {
84 return 0;
85 }
86 #endif
87
88 extern void omap2_init_common_infrastructure(void);
89
90 extern void omap2_sync32k_timer_init(void);
91 extern void omap3_sync32k_timer_init(void);
92 extern void omap3_secure_sync32k_timer_init(void);
93 extern void omap3_gptimer_timer_init(void);
94 extern void omap4_local_timer_init(void);
95 #ifdef CONFIG_CACHE_L2X0
96 int omap_l2_cache_init(void);
97 #else
omap_l2_cache_init(void)98 static inline int omap_l2_cache_init(void)
99 {
100 return 0;
101 }
102 #endif
103 extern void omap5_realtime_timer_init(void);
104
105 void omap2420_init_early(void);
106 void omap2430_init_early(void);
107 void omap3430_init_early(void);
108 void omap35xx_init_early(void);
109 void omap3630_init_early(void);
110 void omap3_init_early(void); /* Do not use this one */
111 void am33xx_init_early(void);
112 void am35xx_init_early(void);
113 void ti81xx_init_early(void);
114 void am33xx_init_early(void);
115 void am43xx_init_early(void);
116 void am43xx_init_late(void);
117 void omap4430_init_early(void);
118 void omap5_init_early(void);
119 void omap3_init_late(void); /* Do not use this one */
120 void omap4430_init_late(void);
121 void omap2420_init_late(void);
122 void omap2430_init_late(void);
123 void omap3430_init_late(void);
124 void omap35xx_init_late(void);
125 void omap3630_init_late(void);
126 void am35xx_init_late(void);
127 void ti81xx_init_late(void);
128 void am33xx_init_late(void);
129 void omap5_init_late(void);
130 int omap2_common_pm_late_init(void);
131 void dra7xx_init_early(void);
132 void dra7xx_init_late(void);
133
134 #ifdef CONFIG_SOC_BUS
135 void omap_soc_device_init(void);
136 #else
omap_soc_device_init(void)137 static inline void omap_soc_device_init(void)
138 {
139 }
140 #endif
141
142 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
143 void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
144 #else
omap2xxx_restart(enum reboot_mode mode,const char * cmd)145 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
146 {
147 }
148 #endif
149
150 #ifdef CONFIG_SOC_AM33XX
151 void am33xx_restart(enum reboot_mode mode, const char *cmd);
152 #else
am33xx_restart(enum reboot_mode mode,const char * cmd)153 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
154 {
155 }
156 #endif
157
158 #ifdef CONFIG_ARCH_OMAP3
159 void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
160 #else
omap3xxx_restart(enum reboot_mode mode,const char * cmd)161 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
162 {
163 }
164 #endif
165
166 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
167 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
168 void omap44xx_restart(enum reboot_mode mode, const char *cmd);
169 #else
omap44xx_restart(enum reboot_mode mode,const char * cmd)170 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
171 {
172 }
173 #endif
174
175 /* This gets called from mach-omap2/io.c, do not call this */
176 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
177
178 void __init omap242x_map_io(void);
179 void __init omap243x_map_io(void);
180 void __init omap3_map_io(void);
181 void __init am33xx_map_io(void);
182 void __init omap4_map_io(void);
183 void __init omap5_map_io(void);
184 void __init ti81xx_map_io(void);
185
186 /* omap_barriers_init() is OMAP4 only */
187 void omap_barriers_init(void);
188
189 /**
190 * omap_test_timeout - busy-loop, testing a condition
191 * @cond: condition to test until it evaluates to true
192 * @timeout: maximum number of microseconds in the timeout
193 * @index: loop index (integer)
194 *
195 * Loop waiting for @cond to become true or until at least @timeout
196 * microseconds have passed. To use, define some integer @index in the
197 * calling code. After running, if @index == @timeout, then the loop has
198 * timed out.
199 */
200 #define omap_test_timeout(cond, timeout, index) \
201 ({ \
202 for (index = 0; index < timeout; index++) { \
203 if (cond) \
204 break; \
205 udelay(1); \
206 } \
207 })
208
209 extern struct device *omap2_get_mpuss_device(void);
210 extern struct device *omap2_get_iva_device(void);
211 extern struct device *omap2_get_l3_device(void);
212 extern struct device *omap4_get_dsp_device(void);
213
214 void omap_gic_of_init(void);
215
216 #ifdef CONFIG_CACHE_L2X0
217 extern void __iomem *omap4_get_l2cache_base(void);
218 #endif
219
220 struct device_node;
221
222 #ifdef CONFIG_SMP
223 extern void __iomem *omap4_get_scu_base(void);
224 #else
omap4_get_scu_base(void)225 static inline void __iomem *omap4_get_scu_base(void)
226 {
227 return NULL;
228 }
229 #endif
230
231 extern void gic_dist_disable(void);
232 extern void gic_dist_enable(void);
233 extern bool gic_dist_disabled(void);
234 extern void gic_timer_retrigger(void);
235 extern void omap_smc1(u32 fn, u32 arg);
236 extern void __iomem *omap4_get_sar_ram_base(void);
237 extern void omap_do_wfi(void);
238
239 #ifdef CONFIG_SMP
240 /* Needed for secondary core boot */
241 extern void omap4_secondary_startup(void);
242 extern void omap4460_secondary_startup(void);
243 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
244 extern void omap_auxcoreboot_addr(u32 cpu_addr);
245 extern u32 omap_read_auxcoreboot0(void);
246
247 extern void omap4_cpu_die(unsigned int cpu);
248
249 extern struct smp_operations omap4_smp_ops;
250
251 extern void omap5_secondary_startup(void);
252 extern void omap5_secondary_hyp_startup(void);
253 #endif
254
255 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
256 extern int omap4_mpuss_init(void);
257 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
258 extern int omap4_finish_suspend(unsigned long cpu_state);
259 extern void omap4_cpu_resume(void);
260 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
261 #else
omap4_enter_lowpower(unsigned int cpu,unsigned int power_state)262 static inline int omap4_enter_lowpower(unsigned int cpu,
263 unsigned int power_state)
264 {
265 cpu_do_idle();
266 return 0;
267 }
268
omap4_hotplug_cpu(unsigned int cpu,unsigned int power_state)269 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
270 {
271 cpu_do_idle();
272 return 0;
273 }
274
omap4_mpuss_init(void)275 static inline int omap4_mpuss_init(void)
276 {
277 return 0;
278 }
279
omap4_finish_suspend(unsigned long cpu_state)280 static inline int omap4_finish_suspend(unsigned long cpu_state)
281 {
282 return 0;
283 }
284
omap4_cpu_resume(void)285 static inline void omap4_cpu_resume(void)
286 {}
287
288 #endif
289
290 void pdata_quirks_init(const struct of_device_id *);
291 void omap_auxdata_legacy_init(struct device *dev);
292 void omap_pcs_legacy_init(int irq, void (*rearm)(void));
293
294 struct omap_sdrc_params;
295 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
296 struct omap_sdrc_params *sdrc_cs1);
297 struct omap2_hsmmc_info;
298 extern void omap_reserve(void);
299
300 struct omap_hwmod;
301 extern int omap_dss_reset(struct omap_hwmod *);
302
303 /* SoC specific clock initializer */
304 int omap_clk_init(void);
305
306 int __init omapdss_init_of(void);
307 void __init omapdss_early_init_of(void);
308
309 #endif /* __ASSEMBLER__ */
310 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
311