1 /* linux/arch/arm/mach-s3c2410/dma.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 DMA selection
7 *
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial_s3c.h>
20
21 #include <mach/map.h>
22 #include <mach/dma.h>
23
24 #include <plat/cpu.h>
25 #include <plat/dma-s3c24xx.h>
26
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-dma.h>
29 #include <mach/regs-lcd.h>
30 #include <plat/regs-spi.h>
31
32 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
33 [DMACH_XD0] = {
34 .name = "xdreq0",
35 .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
36 },
37 [DMACH_XD1] = {
38 .name = "xdreq1",
39 .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
40 },
41 [DMACH_SDI] = {
42 .name = "sdi",
43 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
44 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
45 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
46 },
47 [DMACH_SPI0] = {
48 .name = "spi0",
49 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
50 },
51 [DMACH_SPI1] = {
52 .name = "spi1",
53 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
54 },
55 [DMACH_UART0] = {
56 .name = "uart0",
57 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
58 },
59 [DMACH_UART1] = {
60 .name = "uart1",
61 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
62 },
63 [DMACH_UART2] = {
64 .name = "uart2",
65 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
66 },
67 [DMACH_TIMER] = {
68 .name = "timer",
69 .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
70 .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
71 .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
72 },
73 [DMACH_I2S_IN] = {
74 .name = "i2s-sdi",
75 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
76 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
77 },
78 [DMACH_I2S_OUT] = {
79 .name = "i2s-sdo",
80 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
81 },
82 [DMACH_USB_EP1] = {
83 .name = "usb-ep1",
84 .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
85 },
86 [DMACH_USB_EP2] = {
87 .name = "usb-ep2",
88 .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
89 },
90 [DMACH_USB_EP3] = {
91 .name = "usb-ep3",
92 .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
93 },
94 [DMACH_USB_EP4] = {
95 .name = "usb-ep4",
96 .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
97 },
98 };
99
s3c2410_dma_select(struct s3c2410_dma_chan * chan,struct s3c24xx_dma_map * map)100 static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
101 struct s3c24xx_dma_map *map)
102 {
103 chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
104 }
105
106 static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
107 .select = s3c2410_dma_select,
108 .dcon_mask = 7 << 24,
109 .map = s3c2410_dma_mappings,
110 .map_size = ARRAY_SIZE(s3c2410_dma_mappings),
111 };
112
113 static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
114 .channels = {
115 [DMACH_SDI] = {
116 .list = {
117 [0] = 3 | DMA_CH_VALID,
118 [1] = 2 | DMA_CH_VALID,
119 [2] = 0 | DMA_CH_VALID,
120 },
121 },
122 [DMACH_I2S_IN] = {
123 .list = {
124 [0] = 1 | DMA_CH_VALID,
125 [1] = 2 | DMA_CH_VALID,
126 },
127 },
128 },
129 };
130
s3c2410_dma_add(struct device * dev,struct subsys_interface * sif)131 static int __init s3c2410_dma_add(struct device *dev,
132 struct subsys_interface *sif)
133 {
134 s3c2410_dma_init();
135 s3c24xx_dma_order_set(&s3c2410_dma_order);
136 return s3c24xx_dma_init_map(&s3c2410_dma_sel);
137 }
138
139 #if defined(CONFIG_CPU_S3C2410)
140 static struct subsys_interface s3c2410_dma_interface = {
141 .name = "s3c2410_dma",
142 .subsys = &s3c2410_subsys,
143 .add_dev = s3c2410_dma_add,
144 };
145
s3c2410_dma_drvinit(void)146 static int __init s3c2410_dma_drvinit(void)
147 {
148 return subsys_interface_register(&s3c2410_dma_interface);
149 }
150
151 arch_initcall(s3c2410_dma_drvinit);
152
153 static struct subsys_interface s3c2410a_dma_interface = {
154 .name = "s3c2410a_dma",
155 .subsys = &s3c2410a_subsys,
156 .add_dev = s3c2410_dma_add,
157 };
158
s3c2410a_dma_drvinit(void)159 static int __init s3c2410a_dma_drvinit(void)
160 {
161 return subsys_interface_register(&s3c2410a_dma_interface);
162 }
163
164 arch_initcall(s3c2410a_dma_drvinit);
165 #endif
166
167 #if defined(CONFIG_CPU_S3C2442)
168 /* S3C2442 DMA contains the same selection table as the S3C2410 */
169 static struct subsys_interface s3c2442_dma_interface = {
170 .name = "s3c2442_dma",
171 .subsys = &s3c2442_subsys,
172 .add_dev = s3c2410_dma_add,
173 };
174
s3c2442_dma_drvinit(void)175 static int __init s3c2442_dma_drvinit(void)
176 {
177 return subsys_interface_register(&s3c2442_dma_interface);
178 }
179
180 arch_initcall(s3c2442_dma_drvinit);
181 #endif
182
183