1 /* linux/arch/arm/mach-s3c2412/dma.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2412 DMA selection
7 *
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial_s3c.h>
20 #include <linux/io.h>
21
22 #include <mach/dma.h>
23
24 #include <plat/dma-s3c24xx.h>
25 #include <plat/cpu.h>
26
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-dma.h>
29 #include <mach/regs-lcd.h>
30 #include <plat/regs-spi.h>
31
32 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
33
34 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
35 [DMACH_XD0] = {
36 .name = "xdreq0",
37 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
38 },
39 [DMACH_XD1] = {
40 .name = "xdreq1",
41 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
42 },
43 [DMACH_SDI] = {
44 .name = "sdi",
45 .channels = MAP(S3C2412_DMAREQSEL_SDI),
46 },
47 [DMACH_SPI0_RX] = {
48 .name = "spi0-rx",
49 .channels = MAP(S3C2412_DMAREQSEL_SPI0RX),
50 },
51 [DMACH_SPI0_TX] = {
52 .name = "spi0-tx",
53 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
54 },
55 [DMACH_SPI1_RX] = {
56 .name = "spi1-rx",
57 .channels = MAP(S3C2412_DMAREQSEL_SPI1RX),
58 },
59 [DMACH_SPI1_TX] = {
60 .name = "spi1-tx",
61 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
62 },
63 [DMACH_UART0] = {
64 .name = "uart0",
65 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
66 },
67 [DMACH_UART1] = {
68 .name = "uart1",
69 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
70 },
71 [DMACH_UART2] = {
72 .name = "uart2",
73 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
74 },
75 [DMACH_UART0_SRC2] = {
76 .name = "uart0",
77 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
78 },
79 [DMACH_UART1_SRC2] = {
80 .name = "uart1",
81 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
82 },
83 [DMACH_UART2_SRC2] = {
84 .name = "uart2",
85 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
86 },
87 [DMACH_TIMER] = {
88 .name = "timer",
89 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
90 },
91 [DMACH_I2S_IN] = {
92 .name = "i2s-sdi",
93 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
94 },
95 [DMACH_I2S_OUT] = {
96 .name = "i2s-sdo",
97 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
98 },
99 [DMACH_USB_EP1] = {
100 .name = "usb-ep1",
101 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
102 },
103 [DMACH_USB_EP2] = {
104 .name = "usb-ep2",
105 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
106 },
107 [DMACH_USB_EP3] = {
108 .name = "usb-ep3",
109 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
110 },
111 [DMACH_USB_EP4] = {
112 .name = "usb-ep4",
113 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
114 },
115 };
116
s3c2412_dma_select(struct s3c2410_dma_chan * chan,struct s3c24xx_dma_map * map)117 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
118 struct s3c24xx_dma_map *map)
119 {
120 unsigned long chsel = map->channels[0] & (~DMA_CH_VALID);
121 writel(chsel | S3C2412_DMAREQSEL_HW,
122 chan->regs + S3C2412_DMA_DMAREQSEL);
123 }
124
125 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
126 .select = s3c2412_dma_select,
127 .dcon_mask = 0,
128 .map = s3c2412_dma_mappings,
129 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
130 };
131
s3c2412_dma_add(struct device * dev,struct subsys_interface * sif)132 static int __init s3c2412_dma_add(struct device *dev,
133 struct subsys_interface *sif)
134 {
135 s3c2410_dma_init();
136 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
137 }
138
139 static struct subsys_interface s3c2412_dma_interface = {
140 .name = "s3c2412_dma",
141 .subsys = &s3c2412_subsys,
142 .add_dev = s3c2412_dma_add,
143 };
144
s3c2412_dma_init(void)145 static int __init s3c2412_dma_init(void)
146 {
147 return subsys_interface_register(&s3c2412_dma_interface);
148 }
149
150 arch_initcall(s3c2412_dma_init);
151