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1 /* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
2  *
3  * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4  * Copyright 2008 Openmoko, Inc.
5  * Copyright 2008 Simtec Electronics
6  *	Ben Dooks <ben@simtec.co.uk>
7  *	http://armlinux.simtec.co.uk/
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13 */
14 
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/gpio.h>
19 #include <linux/kernel.h>
20 #include <linux/list.h>
21 #include <linux/dm9000.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/serial_core.h>
25 #include <linux/serial_s3c.h>
26 #include <linux/types.h>
27 
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31 
32 #include <mach/map.h>
33 #include <mach/regs-gpio.h>
34 #include <mach/gpio-samsung.h>
35 
36 #include <plat/adc.h>
37 #include <plat/cpu.h>
38 #include <plat/devs.h>
39 #include <plat/fb.h>
40 #include <linux/platform_data/mtd-nand-s3c2410.h>
41 #include <linux/platform_data/mmc-sdhci-s3c.h>
42 #include <plat/sdhci.h>
43 #include <linux/platform_data/touchscreen-s3c2410.h>
44 
45 #include <video/platform_lcd.h>
46 #include <video/samsung_fimd.h>
47 #include <plat/samsung-time.h>
48 
49 #include "common.h"
50 #include "regs-modem.h"
51 #include "regs-srom.h"
52 
53 #define UCON S3C2410_UCON_DEFAULT
54 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
55 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
56 
57 static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
58 	[0] = {
59 		.hwport	= 0,
60 		.flags	= 0,
61 		.ucon	= UCON,
62 		.ulcon	= ULCON,
63 		.ufcon	= UFCON,
64 	},
65 	[1] = {
66 		.hwport	= 1,
67 		.flags	= 0,
68 		.ucon	= UCON,
69 		.ulcon	= ULCON,
70 		.ufcon	= UFCON,
71 	},
72 	[2] = {
73 		.hwport	= 2,
74 		.flags	= 0,
75 		.ucon	= UCON,
76 		.ulcon	= ULCON,
77 		.ufcon	= UFCON,
78 	},
79 	[3] = {
80 		.hwport	= 3,
81 		.flags	= 0,
82 		.ucon	= UCON,
83 		.ulcon	= ULCON,
84 		.ufcon	= UFCON,
85 	},
86 };
87 
88 /* DM9000AEP 10/100 ethernet controller */
89 
90 static struct resource mini6410_dm9k_resource[] = {
91 	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
92 	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
93 	[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
94 					| IORESOURCE_IRQ_HIGHLEVEL),
95 };
96 
97 static struct dm9000_plat_data mini6410_dm9k_pdata = {
98 	.flags		= (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
99 };
100 
101 static struct platform_device mini6410_device_eth = {
102 	.name		= "dm9000",
103 	.id		= -1,
104 	.num_resources	= ARRAY_SIZE(mini6410_dm9k_resource),
105 	.resource	= mini6410_dm9k_resource,
106 	.dev		= {
107 		.platform_data	= &mini6410_dm9k_pdata,
108 	},
109 };
110 
111 static struct mtd_partition mini6410_nand_part[] = {
112 	[0] = {
113 		.name	= "uboot",
114 		.size	= SZ_1M,
115 		.offset	= 0,
116 	},
117 	[1] = {
118 		.name	= "kernel",
119 		.size	= SZ_2M,
120 		.offset	= SZ_1M,
121 	},
122 	[2] = {
123 		.name	= "rootfs",
124 		.size	= MTDPART_SIZ_FULL,
125 		.offset	= SZ_1M + SZ_2M,
126 	},
127 };
128 
129 static struct s3c2410_nand_set mini6410_nand_sets[] = {
130 	[0] = {
131 		.name		= "nand",
132 		.nr_chips	= 1,
133 		.nr_partitions	= ARRAY_SIZE(mini6410_nand_part),
134 		.partitions	= mini6410_nand_part,
135 	},
136 };
137 
138 static struct s3c2410_platform_nand mini6410_nand_info = {
139 	.tacls		= 25,
140 	.twrph0		= 55,
141 	.twrph1		= 40,
142 	.nr_sets	= ARRAY_SIZE(mini6410_nand_sets),
143 	.sets		= mini6410_nand_sets,
144 };
145 
146 static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
147 	.max_bpp	= 32,
148 	.default_bpp	= 16,
149 	.xres		= 480,
150 	.yres		= 272,
151 };
152 
153 static struct fb_videomode mini6410_lcd_type0_timing = {
154 	/* 4.3" 480x272 */
155 	.left_margin	= 3,
156 	.right_margin	= 2,
157 	.upper_margin	= 1,
158 	.lower_margin	= 1,
159 	.hsync_len	= 40,
160 	.vsync_len	= 1,
161 	.xres		= 480,
162 	.yres		= 272,
163 };
164 
165 static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
166 	.max_bpp	= 32,
167 	.default_bpp	= 16,
168 	.xres		= 800,
169 	.yres		= 480,
170 };
171 
172 static struct fb_videomode mini6410_lcd_type1_timing = {
173 	/* 7.0" 800x480 */
174 	.left_margin	= 8,
175 	.right_margin	= 13,
176 	.upper_margin	= 7,
177 	.lower_margin	= 5,
178 	.hsync_len	= 3,
179 	.vsync_len	= 1,
180 	.xres		= 800,
181 	.yres		= 480,
182 };
183 
184 static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
185 	{
186 		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
187 		.vtiming	= &mini6410_lcd_type0_timing,
188 		.win[0]		= &mini6410_lcd_type0_fb_win,
189 		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
190 		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
191 	}, {
192 		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
193 		.vtiming	= &mini6410_lcd_type1_timing,
194 		.win[0]		= &mini6410_lcd_type1_fb_win,
195 		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
196 		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
197 	},
198 	{ },
199 };
200 
mini6410_lcd_power_set(struct plat_lcd_data * pd,unsigned int power)201 static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
202 				   unsigned int power)
203 {
204 	if (power)
205 		gpio_direction_output(S3C64XX_GPE(0), 1);
206 	else
207 		gpio_direction_output(S3C64XX_GPE(0), 0);
208 }
209 
210 static struct plat_lcd_data mini6410_lcd_power_data = {
211 	.set_power	= mini6410_lcd_power_set,
212 };
213 
214 static struct platform_device mini6410_lcd_powerdev = {
215 	.name			= "platform-lcd",
216 	.dev.parent		= &s3c_device_fb.dev,
217 	.dev.platform_data	= &mini6410_lcd_power_data,
218 };
219 
220 static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
221 	.max_width		= 4,
222 	.cd_type		= S3C_SDHCI_CD_GPIO,
223 	.ext_cd_gpio		= S3C64XX_GPN(10),
224 	.ext_cd_gpio_invert	= true,
225 };
226 
227 static struct platform_device *mini6410_devices[] __initdata = {
228 	&mini6410_device_eth,
229 	&s3c_device_hsmmc0,
230 	&s3c_device_hsmmc1,
231 	&s3c_device_ohci,
232 	&s3c_device_nand,
233 	&s3c_device_fb,
234 	&mini6410_lcd_powerdev,
235 	&s3c_device_adc,
236 	&s3c_device_ts,
237 };
238 
mini6410_map_io(void)239 static void __init mini6410_map_io(void)
240 {
241 	u32 tmp;
242 
243 	s3c64xx_init_io(NULL, 0);
244 	s3c64xx_set_xtal_freq(12000000);
245 	s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs));
246 	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
247 
248 	/* set the LCD type */
249 	tmp = __raw_readl(S3C64XX_SPCON);
250 	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
251 	tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
252 	__raw_writel(tmp, S3C64XX_SPCON);
253 
254 	/* remove the LCD bypass */
255 	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
256 	tmp &= ~MIFPCON_LCD_BYPASS;
257 	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
258 }
259 
260 /*
261  * mini6410_features string
262  *
263  * 0-9 LCD configuration
264  *
265  */
266 static char mini6410_features_str[12] __initdata = "0";
267 
mini6410_features_setup(char * str)268 static int __init mini6410_features_setup(char *str)
269 {
270 	if (str)
271 		strlcpy(mini6410_features_str, str,
272 			sizeof(mini6410_features_str));
273 	return 1;
274 }
275 
276 __setup("mini6410=", mini6410_features_setup);
277 
278 #define FEATURE_SCREEN (1 << 0)
279 
280 struct mini6410_features_t {
281 	int done;
282 	int lcd_index;
283 };
284 
mini6410_parse_features(struct mini6410_features_t * features,const char * features_str)285 static void mini6410_parse_features(
286 		struct mini6410_features_t *features,
287 		const char *features_str)
288 {
289 	const char *fp = features_str;
290 
291 	features->done = 0;
292 	features->lcd_index = 0;
293 
294 	while (*fp) {
295 		char f = *fp++;
296 
297 		switch (f) {
298 		case '0'...'9':	/* tft screen */
299 			if (features->done & FEATURE_SCREEN) {
300 				printk(KERN_INFO "MINI6410: '%c' ignored, "
301 					"screen type already set\n", f);
302 			} else {
303 				int li = f - '0';
304 				if (li >= ARRAY_SIZE(mini6410_lcd_pdata))
305 					printk(KERN_INFO "MINI6410: '%c' out "
306 						"of range LCD mode\n", f);
307 				else {
308 					features->lcd_index = li;
309 				}
310 			}
311 			features->done |= FEATURE_SCREEN;
312 			break;
313 		}
314 	}
315 }
316 
mini6410_machine_init(void)317 static void __init mini6410_machine_init(void)
318 {
319 	u32 cs1;
320 	struct mini6410_features_t features = { 0 };
321 
322 	printk(KERN_INFO "MINI6410: Option string mini6410=%s\n",
323 			mini6410_features_str);
324 
325 	/* Parse the feature string */
326 	mini6410_parse_features(&features, mini6410_features_str);
327 
328 	printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
329 		mini6410_lcd_pdata[features.lcd_index].win[0]->xres,
330 		mini6410_lcd_pdata[features.lcd_index].win[0]->yres);
331 
332 	s3c_nand_set_platdata(&mini6410_nand_info);
333 	s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
334 	s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
335 	s3c24xx_ts_set_platdata(NULL);
336 
337 	/* configure nCS1 width to 16 bits */
338 
339 	cs1 = __raw_readl(S3C64XX_SROM_BW) &
340 		~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
341 	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
342 		(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
343 		(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
344 			S3C64XX_SROM_BW__NCS1__SHIFT;
345 	__raw_writel(cs1, S3C64XX_SROM_BW);
346 
347 	/* set timing for nCS1 suitable for ethernet chip */
348 
349 	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
350 		(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
351 		(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
352 		(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
353 		(13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
354 		(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
355 		(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
356 
357 	gpio_request(S3C64XX_GPF(15), "LCD power");
358 	gpio_request(S3C64XX_GPE(0), "LCD power");
359 
360 	platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
361 }
362 
363 MACHINE_START(MINI6410, "MINI6410")
364 	/* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
365 	.atag_offset	= 0x100,
366 	.init_irq	= s3c6410_init_irq,
367 	.map_io		= mini6410_map_io,
368 	.init_machine	= mini6410_machine_init,
369 	.init_time	= samsung_timer_init,
370 	.restart	= s3c64xx_restart,
371 MACHINE_END
372