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1 /*
2  * Based on arch/arm/kernel/process.c
3  *
4  * Original Copyright (C) 1995  Linus Torvalds
5  * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6  * Copyright (C) 2012 ARM Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #include <stdarg.h>
22 
23 #include <linux/compat.h>
24 #include <linux/export.h>
25 #include <linux/sched.h>
26 #include <linux/kernel.h>
27 #include <linux/mm.h>
28 #include <linux/stddef.h>
29 #include <linux/unistd.h>
30 #include <linux/user.h>
31 #include <linux/delay.h>
32 #include <linux/reboot.h>
33 #include <linux/interrupt.h>
34 #include <linux/kallsyms.h>
35 #include <linux/init.h>
36 #include <linux/cpu.h>
37 #include <linux/elfcore.h>
38 #include <linux/pm.h>
39 #include <linux/tick.h>
40 #include <linux/utsname.h>
41 #include <linux/uaccess.h>
42 #include <linux/random.h>
43 #include <linux/hw_breakpoint.h>
44 #include <linux/personality.h>
45 #include <linux/notifier.h>
46 
47 #include <asm/alternative.h>
48 #include <asm/compat.h>
49 #include <asm/cacheflush.h>
50 #include <asm/fpsimd.h>
51 #include <asm/mmu_context.h>
52 #include <asm/processor.h>
53 #include <asm/stacktrace.h>
54 
55 #ifdef CONFIG_CC_STACKPROTECTOR
56 #include <linux/stackprotector.h>
57 unsigned long __stack_chk_guard __read_mostly;
58 EXPORT_SYMBOL(__stack_chk_guard);
59 #endif
60 
61 /*
62  * Function pointers to optional machine specific functions
63  */
64 void (*pm_power_off)(void);
65 EXPORT_SYMBOL_GPL(pm_power_off);
66 
67 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
68 
69 /*
70  * This is our default idle handler.
71  */
arch_cpu_idle(void)72 void arch_cpu_idle(void)
73 {
74 	/*
75 	 * This should do all the clock switching and wait for interrupt
76 	 * tricks
77 	 */
78 	cpu_do_idle();
79 	local_irq_enable();
80 }
81 
82 #ifdef CONFIG_HOTPLUG_CPU
arch_cpu_idle_dead(void)83 void arch_cpu_idle_dead(void)
84 {
85        cpu_die();
86 }
87 #endif
88 
89 /*
90  * Called by kexec, immediately prior to machine_kexec().
91  *
92  * This must completely disable all secondary CPUs; simply causing those CPUs
93  * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
94  * kexec'd kernel to use any and all RAM as it sees fit, without having to
95  * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
96  * functionality embodied in disable_nonboot_cpus() to achieve this.
97  */
machine_shutdown(void)98 void machine_shutdown(void)
99 {
100 	disable_nonboot_cpus();
101 }
102 
103 /*
104  * Halting simply requires that the secondary CPUs stop performing any
105  * activity (executing tasks, handling interrupts). smp_send_stop()
106  * achieves this.
107  */
machine_halt(void)108 void machine_halt(void)
109 {
110 	local_irq_disable();
111 	smp_send_stop();
112 	while (1);
113 }
114 
115 /*
116  * Power-off simply requires that the secondary CPUs stop performing any
117  * activity (executing tasks, handling interrupts). smp_send_stop()
118  * achieves this. When the system power is turned off, it will take all CPUs
119  * with it.
120  */
machine_power_off(void)121 void machine_power_off(void)
122 {
123 	local_irq_disable();
124 	smp_send_stop();
125 	if (pm_power_off)
126 		pm_power_off();
127 }
128 
129 /*
130  * Restart requires that the secondary CPUs stop performing any activity
131  * while the primary CPU resets the system. Systems with multiple CPUs must
132  * provide a HW restart implementation, to ensure that all CPUs reset at once.
133  * This is required so that any code running after reset on the primary CPU
134  * doesn't have to co-ordinate with other CPUs to ensure they aren't still
135  * executing pre-reset code, and using RAM that the primary CPU's code wishes
136  * to use. Implementing such co-ordination would be essentially impossible.
137  */
machine_restart(char * cmd)138 void machine_restart(char *cmd)
139 {
140 	/* Disable interrupts first */
141 	local_irq_disable();
142 	smp_send_stop();
143 
144 	/* Now call the architecture specific reboot code. */
145 	if (arm_pm_restart)
146 		arm_pm_restart(reboot_mode, cmd);
147 	else
148 		do_kernel_restart(cmd);
149 
150 	/*
151 	 * Whoops - the architecture was unable to reboot.
152 	 */
153 	printk("Reboot failed -- System halted\n");
154 	while (1);
155 }
156 
157 /*
158  * dump a block of kernel memory from around the given address
159  */
show_data(unsigned long addr,int nbytes,const char * name)160 static void show_data(unsigned long addr, int nbytes, const char *name)
161 {
162 	int	i, j;
163 	int	nlines;
164 	u32	*p;
165 
166 	/*
167 	 * don't attempt to dump non-kernel addresses or
168 	 * values that are probably just small negative numbers
169 	 */
170 	if (addr < PAGE_OFFSET || addr > -256UL)
171 		return;
172 
173 	printk("\n%s: %#lx:\n", name, addr);
174 
175 	/*
176 	 * round address down to a 32 bit boundary
177 	 * and always dump a multiple of 32 bytes
178 	 */
179 	p = (u32 *)(addr & ~(sizeof(u32) - 1));
180 	nbytes += (addr & (sizeof(u32) - 1));
181 	nlines = (nbytes + 31) / 32;
182 
183 
184 	for (i = 0; i < nlines; i++) {
185 		/*
186 		 * just display low 16 bits of address to keep
187 		 * each line of the dump < 80 characters
188 		 */
189 		printk("%04lx ", (unsigned long)p & 0xffff);
190 		for (j = 0; j < 8; j++) {
191 			u32	data;
192 			if (probe_kernel_address(p, data)) {
193 				printk(" ********");
194 			} else {
195 				printk(" %08x", data);
196 			}
197 			++p;
198 		}
199 		printk("\n");
200 	}
201 }
202 
show_extra_register_data(struct pt_regs * regs,int nbytes)203 static void show_extra_register_data(struct pt_regs *regs, int nbytes)
204 {
205 	mm_segment_t fs;
206 	unsigned int i;
207 
208 	fs = get_fs();
209 	set_fs(KERNEL_DS);
210 	show_data(regs->pc - nbytes, nbytes * 2, "PC");
211 	show_data(regs->regs[30] - nbytes, nbytes * 2, "LR");
212 	show_data(regs->sp - nbytes, nbytes * 2, "SP");
213 	for (i = 0; i < 30; i++) {
214 		char name[4];
215 		snprintf(name, sizeof(name), "X%u", i);
216 		show_data(regs->regs[i] - nbytes, nbytes * 2, name);
217 	}
218 	set_fs(fs);
219 }
220 
__show_regs(struct pt_regs * regs)221 void __show_regs(struct pt_regs *regs)
222 {
223 	int i, top_reg;
224 	u64 lr, sp;
225 
226 	if (compat_user_mode(regs)) {
227 		lr = regs->compat_lr;
228 		sp = regs->compat_sp;
229 		top_reg = 12;
230 	} else {
231 		lr = regs->regs[30];
232 		sp = regs->sp;
233 		top_reg = 29;
234 	}
235 
236 	show_regs_print_info(KERN_DEFAULT);
237 	print_symbol("PC is at %s\n", instruction_pointer(regs));
238 	print_symbol("LR is at %s\n", lr);
239 	printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
240 	       regs->pc, lr, regs->pstate);
241 	printk("sp : %016llx\n", sp);
242 	for (i = top_reg; i >= 0; i--) {
243 		printk("x%-2d: %016llx ", i, regs->regs[i]);
244 		if (i % 2 == 0)
245 			printk("\n");
246 	}
247 	if (!user_mode(regs))
248 		show_extra_register_data(regs, 128);
249 	printk("\n");
250 }
251 
show_regs(struct pt_regs * regs)252 void show_regs(struct pt_regs * regs)
253 {
254 	printk("\n");
255 	__show_regs(regs);
256 }
257 
tls_thread_flush(void)258 static void tls_thread_flush(void)
259 {
260 	asm ("msr tpidr_el0, xzr");
261 
262 	if (is_compat_task()) {
263 		current->thread.tp_value = 0;
264 
265 		/*
266 		 * We need to ensure ordering between the shadow state and the
267 		 * hardware state, so that we don't corrupt the hardware state
268 		 * with a stale shadow state during context switch.
269 		 */
270 		barrier();
271 		asm ("msr tpidrro_el0, xzr");
272 	}
273 }
274 
flush_thread(void)275 void flush_thread(void)
276 {
277 	fpsimd_flush_thread();
278 	tls_thread_flush();
279 	flush_ptrace_hw_breakpoint(current);
280 }
281 
release_thread(struct task_struct * dead_task)282 void release_thread(struct task_struct *dead_task)
283 {
284 }
285 
arch_dup_task_struct(struct task_struct * dst,struct task_struct * src)286 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
287 {
288 	if (current->mm)
289 		fpsimd_preserve_current_state();
290 	*dst = *src;
291 	return 0;
292 }
293 
294 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
295 
copy_thread(unsigned long clone_flags,unsigned long stack_start,unsigned long stk_sz,struct task_struct * p)296 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
297 		unsigned long stk_sz, struct task_struct *p)
298 {
299 	struct pt_regs *childregs = task_pt_regs(p);
300 	unsigned long tls = p->thread.tp_value;
301 
302 	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
303 
304 	/*
305 	 * In case p was allocated the same task_struct pointer as some
306 	 * other recently-exited task, make sure p is disassociated from
307 	 * any cpu that may have run that now-exited task recently.
308 	 * Otherwise we could erroneously skip reloading the FPSIMD
309 	 * registers for p.
310 	 */
311 	fpsimd_flush_task_state(p);
312 
313 	if (likely(!(p->flags & PF_KTHREAD))) {
314 		*childregs = *current_pt_regs();
315 		childregs->regs[0] = 0;
316 		if (is_compat_thread(task_thread_info(p))) {
317 			if (stack_start)
318 				childregs->compat_sp = stack_start;
319 		} else {
320 			/*
321 			 * Read the current TLS pointer from tpidr_el0 as it may be
322 			 * out-of-sync with the saved value.
323 			 */
324 			asm("mrs %0, tpidr_el0" : "=r" (tls));
325 			if (stack_start) {
326 				/* 16-byte aligned stack mandatory on AArch64 */
327 				if (stack_start & 15)
328 					return -EINVAL;
329 				childregs->sp = stack_start;
330 			}
331 		}
332 		/*
333 		 * If a TLS pointer was passed to clone (4th argument), use it
334 		 * for the new thread.
335 		 */
336 		if (clone_flags & CLONE_SETTLS)
337 			tls = childregs->regs[3];
338 	} else {
339 		memset(childregs, 0, sizeof(struct pt_regs));
340 		childregs->pstate = PSR_MODE_EL1h;
341 		if (IS_ENABLED(CONFIG_ARM64_UAO) &&
342 		    cpus_have_cap(ARM64_HAS_UAO))
343 			childregs->pstate |= PSR_UAO_BIT;
344 		p->thread.cpu_context.x19 = stack_start;
345 		p->thread.cpu_context.x20 = stk_sz;
346 	}
347 	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
348 	p->thread.cpu_context.sp = (unsigned long)childregs;
349 	p->thread.tp_value = tls;
350 
351 	ptrace_hw_copy_thread(p);
352 
353 	return 0;
354 }
355 
tls_thread_switch(struct task_struct * next)356 static void tls_thread_switch(struct task_struct *next)
357 {
358 	if (!is_compat_task()) {
359 		unsigned long tpidr;
360 		asm("mrs %0, tpidr_el0" : "=r" (tpidr));
361 		current->thread.tp_value = tpidr;
362 	}
363 
364 	if (is_compat_thread(task_thread_info(next)))
365 		write_sysreg(next->thread.tp_value, tpidrro_el0);
366 	else if (!arm64_kernel_unmapped_at_el0())
367 		write_sysreg(0, tpidrro_el0);
368 
369 	write_sysreg(next->thread.tp_value, tpidr_el0);
370 }
371 
372 /* Restore the UAO state depending on next's addr_limit */
uao_thread_switch(struct task_struct * next)373 static void uao_thread_switch(struct task_struct *next)
374 {
375 	if (IS_ENABLED(CONFIG_ARM64_UAO)) {
376 		if (task_thread_info(next)->addr_limit == KERNEL_DS)
377 			asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
378 		else
379 			asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
380 	}
381 }
382 
383 /*
384  * Thread switching.
385  */
__switch_to(struct task_struct * prev,struct task_struct * next)386 struct task_struct *__switch_to(struct task_struct *prev,
387 				struct task_struct *next)
388 {
389 	struct task_struct *last;
390 
391 	fpsimd_thread_switch(next);
392 	tls_thread_switch(next);
393 	hw_breakpoint_thread_switch(next);
394 	contextidr_thread_switch(next);
395 	uao_thread_switch(next);
396 
397 	/*
398 	 * Complete any pending TLB or cache maintenance on this CPU in case
399 	 * the thread migrates to a different CPU.
400 	 */
401 	dsb(ish);
402 
403 	/* the actual thread switch */
404 	last = cpu_switch_to(prev, next);
405 
406 	return last;
407 }
408 
get_wchan(struct task_struct * p)409 unsigned long get_wchan(struct task_struct *p)
410 {
411 	struct stackframe frame;
412 	unsigned long stack_page;
413 	int count = 0;
414 	if (!p || p == current || p->state == TASK_RUNNING)
415 		return 0;
416 
417 	frame.fp = thread_saved_fp(p);
418 	frame.sp = thread_saved_sp(p);
419 	frame.pc = thread_saved_pc(p);
420 	stack_page = (unsigned long)task_stack_page(p);
421 	do {
422 		if (frame.sp < stack_page ||
423 		    frame.sp >= stack_page + THREAD_SIZE ||
424 		    unwind_frame(&frame))
425 			return 0;
426 		if (!in_sched_functions(frame.pc))
427 			return frame.pc;
428 	} while (count ++ < 16);
429 	return 0;
430 }
431 
arch_align_stack(unsigned long sp)432 unsigned long arch_align_stack(unsigned long sp)
433 {
434 	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
435 		sp -= get_random_int() & ~PAGE_MASK;
436 	return sp & ~0xf;
437 }
438 
randomize_base(unsigned long base)439 static unsigned long randomize_base(unsigned long base)
440 {
441 	unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
442 	return randomize_range(base, range_end, 0) ? : base;
443 }
444 
arch_randomize_brk(struct mm_struct * mm)445 unsigned long arch_randomize_brk(struct mm_struct *mm)
446 {
447 	return randomize_base(mm->brk);
448 }
449