1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/export.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/mtd/physmap.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #include <linux/etherdevice.h>
19 #include <linux/i2c.h>
20 #include <linux/irq.h>
21 #include <linux/interrupt.h>
22 #include <linux/usb/musb.h>
23 #include <asm/dma.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/reboot.h>
26 #include <asm/nand.h>
27 #include <asm/portmux.h>
28 #include <asm/dpmc.h>
29 #include <linux/spi/ad7877.h>
30
31 /*
32 * Name the Board for the /proc/cpuinfo
33 */
34 const char bfin_board_name[] = "Bluetechnix CM-BF527";
35
36 /*
37 * Driver needs to know address, irq and flag pin.
38 */
39
40 #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
41 #include <linux/usb/isp1760.h>
42 static struct resource bfin_isp1760_resources[] = {
43 [0] = {
44 .start = 0x203C0000,
45 .end = 0x203C0000 + 0x000fffff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = IRQ_PF7,
50 .end = IRQ_PF7,
51 .flags = IORESOURCE_IRQ,
52 },
53 };
54
55 static struct isp1760_platform_data isp1760_priv = {
56 .is_isp1761 = 0,
57 .bus_width_16 = 1,
58 .port1_otg = 0,
59 .analog_oc = 0,
60 .dack_polarity_high = 0,
61 .dreq_polarity_high = 0,
62 };
63
64 static struct platform_device bfin_isp1760_device = {
65 .name = "isp1760",
66 .id = 0,
67 .dev = {
68 .platform_data = &isp1760_priv,
69 },
70 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
71 .resource = bfin_isp1760_resources,
72 };
73 #endif
74
75 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
76 static struct resource musb_resources[] = {
77 [0] = {
78 .start = 0xffc03800,
79 .end = 0xffc03cff,
80 .flags = IORESOURCE_MEM,
81 },
82 [1] = { /* general IRQ */
83 .start = IRQ_USB_INT0,
84 .end = IRQ_USB_INT0,
85 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
86 .name = "mc"
87 },
88 [2] = { /* DMA IRQ */
89 .start = IRQ_USB_DMA,
90 .end = IRQ_USB_DMA,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
92 .name = "dma"
93 },
94 };
95
96 static struct musb_hdrc_config musb_config = {
97 .multipoint = 0,
98 .dyn_fifo = 0,
99 .soft_con = 1,
100 .dma = 1,
101 .num_eps = 8,
102 .dma_channels = 8,
103 .gpio_vrsel = GPIO_PF11,
104 /* Some custom boards need to be active low, just set it to "0"
105 * if it is the case.
106 */
107 .gpio_vrsel_active = 1,
108 .clkin = 24, /* musb CLKIN in MHZ */
109 };
110
111 static struct musb_hdrc_platform_data musb_plat = {
112 #if defined(CONFIG_USB_MUSB_OTG)
113 .mode = MUSB_OTG,
114 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
115 .mode = MUSB_HOST,
116 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
117 .mode = MUSB_PERIPHERAL,
118 #endif
119 .config = &musb_config,
120 };
121
122 static u64 musb_dmamask = ~(u32)0;
123
124 static struct platform_device musb_device = {
125 .name = "musb-blackfin",
126 .id = 0,
127 .dev = {
128 .dma_mask = &musb_dmamask,
129 .coherent_dma_mask = 0xffffffff,
130 .platform_data = &musb_plat,
131 },
132 .num_resources = ARRAY_SIZE(musb_resources),
133 .resource = musb_resources,
134 };
135 #endif
136
137 #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
138 static struct mtd_partition partition_info[] = {
139 {
140 .name = "linux kernel(nand)",
141 .offset = 0,
142 .size = 4 * 1024 * 1024,
143 },
144 {
145 .name = "file system(nand)",
146 .offset = MTDPART_OFS_APPEND,
147 .size = MTDPART_SIZ_FULL,
148 },
149 };
150
151 static struct bf5xx_nand_platform bf5xx_nand_platform = {
152 .data_width = NFC_NWIDTH_8,
153 .partitions = partition_info,
154 .nr_partitions = ARRAY_SIZE(partition_info),
155 .rd_dly = 3,
156 .wr_dly = 3,
157 };
158
159 static struct resource bf5xx_nand_resources[] = {
160 {
161 .start = NFC_CTL,
162 .end = NFC_DATA_RD + 2,
163 .flags = IORESOURCE_MEM,
164 },
165 {
166 .start = CH_NFC,
167 .end = CH_NFC,
168 .flags = IORESOURCE_IRQ,
169 },
170 };
171
172 static struct platform_device bf5xx_nand_device = {
173 .name = "bf5xx-nand",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
176 .resource = bf5xx_nand_resources,
177 .dev = {
178 .platform_data = &bf5xx_nand_platform,
179 },
180 };
181 #endif
182
183 #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
184 static struct resource bfin_pcmcia_cf_resources[] = {
185 {
186 .start = 0x20310000, /* IO PORT */
187 .end = 0x20312000,
188 .flags = IORESOURCE_MEM,
189 }, {
190 .start = 0x20311000, /* Attribute Memory */
191 .end = 0x20311FFF,
192 .flags = IORESOURCE_MEM,
193 }, {
194 .start = IRQ_PF4,
195 .end = IRQ_PF4,
196 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
197 }, {
198 .start = 6, /* Card Detect PF6 */
199 .end = 6,
200 .flags = IORESOURCE_IRQ,
201 },
202 };
203
204 static struct platform_device bfin_pcmcia_cf_device = {
205 .name = "bfin_cf_pcmcia",
206 .id = -1,
207 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
208 .resource = bfin_pcmcia_cf_resources,
209 };
210 #endif
211
212 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
213 static struct platform_device rtc_device = {
214 .name = "rtc-bfin",
215 .id = -1,
216 };
217 #endif
218
219 #if IS_ENABLED(CONFIG_SMC91X)
220 #include <linux/smc91x.h>
221
222 static struct smc91x_platdata smc91x_info = {
223 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
224 .leda = RPC_LED_100_10,
225 .ledb = RPC_LED_TX_RX,
226 };
227
228 static struct resource smc91x_resources[] = {
229 {
230 .name = "smc91x-regs",
231 .start = 0x20300300,
232 .end = 0x20300300 + 16,
233 .flags = IORESOURCE_MEM,
234 }, {
235
236 .start = IRQ_PF7,
237 .end = IRQ_PF7,
238 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
239 },
240 };
241 static struct platform_device smc91x_device = {
242 .name = "smc91x",
243 .id = 0,
244 .num_resources = ARRAY_SIZE(smc91x_resources),
245 .resource = smc91x_resources,
246 .dev = {
247 .platform_data = &smc91x_info,
248 },
249 };
250 #endif
251
252 #if IS_ENABLED(CONFIG_DM9000)
253 static struct resource dm9000_resources[] = {
254 [0] = {
255 .start = 0x203FB800,
256 .end = 0x203FB800 + 1,
257 .flags = IORESOURCE_MEM,
258 },
259 [1] = {
260 .start = 0x203FB804,
261 .end = 0x203FB804 + 1,
262 .flags = IORESOURCE_MEM,
263 },
264 [2] = {
265 .start = IRQ_PF9,
266 .end = IRQ_PF9,
267 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
268 },
269 };
270
271 static struct platform_device dm9000_device = {
272 .name = "dm9000",
273 .id = -1,
274 .num_resources = ARRAY_SIZE(dm9000_resources),
275 .resource = dm9000_resources,
276 };
277 #endif
278
279 #if IS_ENABLED(CONFIG_BFIN_MAC)
280 #include <linux/bfin_mac.h>
281 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
282
283 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
284 {
285 .addr = 1,
286 .irq = IRQ_MAC_PHYINT,
287 },
288 };
289
290 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
291 .phydev_number = 1,
292 .phydev_data = bfin_phydev_data,
293 .phy_mode = PHY_INTERFACE_MODE_RMII,
294 .mac_peripherals = bfin_mac_peripherals,
295 };
296
297 static struct platform_device bfin_mii_bus = {
298 .name = "bfin_mii_bus",
299 .dev = {
300 .platform_data = &bfin_mii_bus_data,
301 }
302 };
303
304 static struct platform_device bfin_mac_device = {
305 .name = "bfin_mac",
306 .dev = {
307 .platform_data = &bfin_mii_bus,
308 }
309 };
310 #endif
311
312 #if IS_ENABLED(CONFIG_USB_NET2272)
313 static struct resource net2272_bfin_resources[] = {
314 {
315 .start = 0x20300000,
316 .end = 0x20300000 + 0x100,
317 .flags = IORESOURCE_MEM,
318 }, {
319 .start = IRQ_PF7,
320 .end = IRQ_PF7,
321 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
322 },
323 };
324
325 static struct platform_device net2272_bfin_device = {
326 .name = "net2272",
327 .id = -1,
328 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
329 .resource = net2272_bfin_resources,
330 };
331 #endif
332
333 #if IS_ENABLED(CONFIG_MTD_M25P80)
334 static struct mtd_partition bfin_spi_flash_partitions[] = {
335 {
336 .name = "bootloader(spi)",
337 .size = 0x00040000,
338 .offset = 0,
339 .mask_flags = MTD_CAP_ROM
340 }, {
341 .name = "linux kernel(spi)",
342 .size = MTDPART_SIZ_FULL,
343 .offset = MTDPART_OFS_APPEND,
344 }
345 };
346
347 static struct flash_platform_data bfin_spi_flash_data = {
348 .name = "m25p80",
349 .parts = bfin_spi_flash_partitions,
350 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
351 .type = "m25p16",
352 };
353
354 /* SPI flash chip (m25p64) */
355 static struct bfin5xx_spi_chip spi_flash_chip_info = {
356 .enable_dma = 0, /* use dma transfer with this chip*/
357 };
358 #endif
359
360 #if IS_ENABLED(CONFIG_MMC_SPI)
361 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
362 .enable_dma = 0,
363 };
364 #endif
365
366 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
367 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
368 .model = 7877,
369 .vref_delay_usecs = 50, /* internal, no capacitor */
370 .x_plate_ohms = 419,
371 .y_plate_ohms = 486,
372 .pressure_max = 1000,
373 .pressure_min = 0,
374 .stopacq_polarity = 1,
375 .first_conversion_delay = 3,
376 .acquisition_time = 1,
377 .averaging = 1,
378 .pen_down_acc_interval = 1,
379 };
380 #endif
381
382 static struct spi_board_info bfin_spi_board_info[] __initdata = {
383 #if IS_ENABLED(CONFIG_MTD_M25P80)
384 {
385 /* the modalias must be the same as spi device driver name */
386 .modalias = "m25p80", /* Name of spi_driver for this device */
387 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
388 .bus_num = 0, /* Framework bus number */
389 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
390 .platform_data = &bfin_spi_flash_data,
391 .controller_data = &spi_flash_chip_info,
392 .mode = SPI_MODE_3,
393 },
394 #endif
395
396 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
397 {
398 .modalias = "ad183x",
399 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
400 .bus_num = 0,
401 .chip_select = 4,
402 },
403 #endif
404 #if IS_ENABLED(CONFIG_MMC_SPI)
405 {
406 .modalias = "mmc_spi",
407 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
408 .bus_num = 0,
409 .chip_select = 5,
410 .controller_data = &mmc_spi_chip_info,
411 .mode = SPI_MODE_3,
412 },
413 #endif
414 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
415 {
416 .modalias = "ad7877",
417 .platform_data = &bfin_ad7877_ts_info,
418 .irq = IRQ_PF8,
419 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
420 .bus_num = 0,
421 .chip_select = 2,
422 },
423 #endif
424 #if IS_ENABLED(CONFIG_SND_SOC_WM8731) \
425 && defined(CONFIG_SND_SOC_WM8731_SPI)
426 {
427 .modalias = "wm8731",
428 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
429 .bus_num = 0,
430 .chip_select = 5,
431 .mode = SPI_MODE_0,
432 },
433 #endif
434 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
435 {
436 .modalias = "spidev",
437 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
438 .bus_num = 0,
439 .chip_select = 1,
440 },
441 #endif
442 };
443
444 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
445 /* SPI controller data */
446 static struct bfin5xx_spi_master bfin_spi0_info = {
447 .num_chipselect = 8,
448 .enable_dma = 1, /* master has the ability to do dma transfer */
449 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
450 };
451
452 /* SPI (0) */
453 static struct resource bfin_spi0_resource[] = {
454 [0] = {
455 .start = SPI0_REGBASE,
456 .end = SPI0_REGBASE + 0xFF,
457 .flags = IORESOURCE_MEM,
458 },
459 [1] = {
460 .start = CH_SPI,
461 .end = CH_SPI,
462 .flags = IORESOURCE_DMA,
463 },
464 [2] = {
465 .start = IRQ_SPI,
466 .end = IRQ_SPI,
467 .flags = IORESOURCE_IRQ,
468 },
469 };
470
471 static struct platform_device bfin_spi0_device = {
472 .name = "bfin-spi",
473 .id = 0, /* Bus number */
474 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
475 .resource = bfin_spi0_resource,
476 .dev = {
477 .platform_data = &bfin_spi0_info, /* Passed to driver */
478 },
479 };
480 #endif /* spi master and devices */
481
482 #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
483 static struct mtd_partition cm_partitions[] = {
484 {
485 .name = "bootloader(nor)",
486 .size = 0x40000,
487 .offset = 0,
488 }, {
489 .name = "linux kernel(nor)",
490 .size = 0x100000,
491 .offset = MTDPART_OFS_APPEND,
492 }, {
493 .name = "file system(nor)",
494 .size = MTDPART_SIZ_FULL,
495 .offset = MTDPART_OFS_APPEND,
496 }
497 };
498
499 static struct physmap_flash_data cm_flash_data = {
500 .width = 2,
501 .parts = cm_partitions,
502 .nr_parts = ARRAY_SIZE(cm_partitions),
503 };
504
505 static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
506
507 static struct resource cm_flash_resource[] = {
508 {
509 .name = "cfi_probe",
510 .start = 0x20000000,
511 .end = 0x201fffff,
512 .flags = IORESOURCE_MEM,
513 }, {
514 .start = (unsigned long)cm_flash_gpios,
515 .end = ARRAY_SIZE(cm_flash_gpios),
516 .flags = IORESOURCE_IRQ,
517 }
518 };
519
520 static struct platform_device cm_flash_device = {
521 .name = "gpio-addr-flash",
522 .id = 0,
523 .dev = {
524 .platform_data = &cm_flash_data,
525 },
526 .num_resources = ARRAY_SIZE(cm_flash_resource),
527 .resource = cm_flash_resource,
528 };
529 #endif
530
531 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
532 #ifdef CONFIG_SERIAL_BFIN_UART0
533 static struct resource bfin_uart0_resources[] = {
534 {
535 .start = UART0_THR,
536 .end = UART0_GCTL+2,
537 .flags = IORESOURCE_MEM,
538 },
539 {
540 .start = IRQ_UART0_TX,
541 .end = IRQ_UART0_TX,
542 .flags = IORESOURCE_IRQ,
543 },
544 {
545 .start = IRQ_UART0_RX,
546 .end = IRQ_UART0_RX,
547 .flags = IORESOURCE_IRQ,
548 },
549 {
550 .start = IRQ_UART0_ERROR,
551 .end = IRQ_UART0_ERROR,
552 .flags = IORESOURCE_IRQ,
553 },
554 {
555 .start = CH_UART0_TX,
556 .end = CH_UART0_TX,
557 .flags = IORESOURCE_DMA,
558 },
559 {
560 .start = CH_UART0_RX,
561 .end = CH_UART0_RX,
562 .flags = IORESOURCE_DMA,
563 },
564 };
565
566 static unsigned short bfin_uart0_peripherals[] = {
567 P_UART0_TX, P_UART0_RX, 0
568 };
569
570 static struct platform_device bfin_uart0_device = {
571 .name = "bfin-uart",
572 .id = 0,
573 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
574 .resource = bfin_uart0_resources,
575 .dev = {
576 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
577 },
578 };
579 #endif
580 #ifdef CONFIG_SERIAL_BFIN_UART1
581 static struct resource bfin_uart1_resources[] = {
582 {
583 .start = UART1_THR,
584 .end = UART1_GCTL+2,
585 .flags = IORESOURCE_MEM,
586 },
587 {
588 .start = IRQ_UART1_TX,
589 .end = IRQ_UART1_TX,
590 .flags = IORESOURCE_IRQ,
591 },
592 {
593 .start = IRQ_UART1_RX,
594 .end = IRQ_UART1_RX,
595 .flags = IORESOURCE_IRQ,
596 },
597 {
598 .start = IRQ_UART1_ERROR,
599 .end = IRQ_UART1_ERROR,
600 .flags = IORESOURCE_IRQ,
601 },
602 {
603 .start = CH_UART1_TX,
604 .end = CH_UART1_TX,
605 .flags = IORESOURCE_DMA,
606 },
607 {
608 .start = CH_UART1_RX,
609 .end = CH_UART1_RX,
610 .flags = IORESOURCE_DMA,
611 },
612 #ifdef CONFIG_BFIN_UART1_CTSRTS
613 { /* CTS pin */
614 .start = GPIO_PF9,
615 .end = GPIO_PF9,
616 .flags = IORESOURCE_IO,
617 },
618 { /* RTS pin */
619 .start = GPIO_PF10,
620 .end = GPIO_PF10,
621 .flags = IORESOURCE_IO,
622 },
623 #endif
624 };
625
626 static unsigned short bfin_uart1_peripherals[] = {
627 P_UART1_TX, P_UART1_RX, 0
628 };
629
630 static struct platform_device bfin_uart1_device = {
631 .name = "bfin-uart",
632 .id = 1,
633 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
634 .resource = bfin_uart1_resources,
635 .dev = {
636 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
637 },
638 };
639 #endif
640 #endif
641
642 #if IS_ENABLED(CONFIG_BFIN_SIR)
643 #ifdef CONFIG_BFIN_SIR0
644 static struct resource bfin_sir0_resources[] = {
645 {
646 .start = 0xFFC00400,
647 .end = 0xFFC004FF,
648 .flags = IORESOURCE_MEM,
649 },
650 {
651 .start = IRQ_UART0_RX,
652 .end = IRQ_UART0_RX+1,
653 .flags = IORESOURCE_IRQ,
654 },
655 {
656 .start = CH_UART0_RX,
657 .end = CH_UART0_RX+1,
658 .flags = IORESOURCE_DMA,
659 },
660 };
661
662 static struct platform_device bfin_sir0_device = {
663 .name = "bfin_sir",
664 .id = 0,
665 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
666 .resource = bfin_sir0_resources,
667 };
668 #endif
669 #ifdef CONFIG_BFIN_SIR1
670 static struct resource bfin_sir1_resources[] = {
671 {
672 .start = 0xFFC02000,
673 .end = 0xFFC020FF,
674 .flags = IORESOURCE_MEM,
675 },
676 {
677 .start = IRQ_UART1_RX,
678 .end = IRQ_UART1_RX+1,
679 .flags = IORESOURCE_IRQ,
680 },
681 {
682 .start = CH_UART1_RX,
683 .end = CH_UART1_RX+1,
684 .flags = IORESOURCE_DMA,
685 },
686 };
687
688 static struct platform_device bfin_sir1_device = {
689 .name = "bfin_sir",
690 .id = 1,
691 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
692 .resource = bfin_sir1_resources,
693 };
694 #endif
695 #endif
696
697 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
698 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
699
700 static struct resource bfin_twi0_resource[] = {
701 [0] = {
702 .start = TWI0_REGBASE,
703 .end = TWI0_REGBASE,
704 .flags = IORESOURCE_MEM,
705 },
706 [1] = {
707 .start = IRQ_TWI,
708 .end = IRQ_TWI,
709 .flags = IORESOURCE_IRQ,
710 },
711 };
712
713 static struct platform_device i2c_bfin_twi_device = {
714 .name = "i2c-bfin-twi",
715 .id = 0,
716 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
717 .resource = bfin_twi0_resource,
718 .dev = {
719 .platform_data = &bfin_twi0_pins,
720 },
721 };
722 #endif
723
724 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
725 #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
726 {
727 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
728 },
729 #endif
730 #if IS_ENABLED(CONFIG_INPUT_PCF8574)
731 {
732 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
733 .irq = IRQ_PF8,
734 },
735 #endif
736 #if IS_ENABLED(CONFIG_FB_BFIN_7393)
737 {
738 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
739 },
740 #endif
741 };
742
743 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
744 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
745 static struct resource bfin_sport0_uart_resources[] = {
746 {
747 .start = SPORT0_TCR1,
748 .end = SPORT0_MRCS3+4,
749 .flags = IORESOURCE_MEM,
750 },
751 {
752 .start = IRQ_SPORT0_RX,
753 .end = IRQ_SPORT0_RX+1,
754 .flags = IORESOURCE_IRQ,
755 },
756 {
757 .start = IRQ_SPORT0_ERROR,
758 .end = IRQ_SPORT0_ERROR,
759 .flags = IORESOURCE_IRQ,
760 },
761 };
762
763 static unsigned short bfin_sport0_peripherals[] = {
764 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
765 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
766 };
767
768 static struct platform_device bfin_sport0_uart_device = {
769 .name = "bfin-sport-uart",
770 .id = 0,
771 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
772 .resource = bfin_sport0_uart_resources,
773 .dev = {
774 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
775 },
776 };
777 #endif
778 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
779 static struct resource bfin_sport1_uart_resources[] = {
780 {
781 .start = SPORT1_TCR1,
782 .end = SPORT1_MRCS3+4,
783 .flags = IORESOURCE_MEM,
784 },
785 {
786 .start = IRQ_SPORT1_RX,
787 .end = IRQ_SPORT1_RX+1,
788 .flags = IORESOURCE_IRQ,
789 },
790 {
791 .start = IRQ_SPORT1_ERROR,
792 .end = IRQ_SPORT1_ERROR,
793 .flags = IORESOURCE_IRQ,
794 },
795 };
796
797 static unsigned short bfin_sport1_peripherals[] = {
798 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
799 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
800 };
801
802 static struct platform_device bfin_sport1_uart_device = {
803 .name = "bfin-sport-uart",
804 .id = 1,
805 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
806 .resource = bfin_sport1_uart_resources,
807 .dev = {
808 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
809 },
810 };
811 #endif
812 #endif
813
814 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
815 #include <linux/input.h>
816 #include <linux/gpio_keys.h>
817
818 static struct gpio_keys_button bfin_gpio_keys_table[] = {
819 {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
820 };
821
822 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
823 .buttons = bfin_gpio_keys_table,
824 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
825 };
826
827 static struct platform_device bfin_device_gpiokeys = {
828 .name = "gpio-keys",
829 .dev = {
830 .platform_data = &bfin_gpio_keys_data,
831 },
832 };
833 #endif
834
835 static const unsigned int cclk_vlev_datasheet[] =
836 {
837 VRPAIR(VLEV_100, 400000000),
838 VRPAIR(VLEV_105, 426000000),
839 VRPAIR(VLEV_110, 500000000),
840 VRPAIR(VLEV_115, 533000000),
841 VRPAIR(VLEV_120, 600000000),
842 };
843
844 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
845 .tuple_tab = cclk_vlev_datasheet,
846 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
847 .vr_settling_time = 25 /* us */,
848 };
849
850 static struct platform_device bfin_dpmc = {
851 .name = "bfin dpmc",
852 .dev = {
853 .platform_data = &bfin_dmpc_vreg_data,
854 },
855 };
856
857 static struct platform_device *cmbf527_devices[] __initdata = {
858
859 &bfin_dpmc,
860
861 #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
862 &bf5xx_nand_device,
863 #endif
864
865 #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
866 &bfin_pcmcia_cf_device,
867 #endif
868
869 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
870 &rtc_device,
871 #endif
872
873 #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
874 &bfin_isp1760_device,
875 #endif
876
877 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
878 &musb_device,
879 #endif
880
881 #if IS_ENABLED(CONFIG_SMC91X)
882 &smc91x_device,
883 #endif
884
885 #if IS_ENABLED(CONFIG_DM9000)
886 &dm9000_device,
887 #endif
888
889 #if IS_ENABLED(CONFIG_BFIN_MAC)
890 &bfin_mii_bus,
891 &bfin_mac_device,
892 #endif
893
894 #if IS_ENABLED(CONFIG_USB_NET2272)
895 &net2272_bfin_device,
896 #endif
897
898 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
899 &bfin_spi0_device,
900 #endif
901
902 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
903 #ifdef CONFIG_SERIAL_BFIN_UART0
904 &bfin_uart0_device,
905 #endif
906 #ifdef CONFIG_SERIAL_BFIN_UART1
907 &bfin_uart1_device,
908 #endif
909 #endif
910
911 #if IS_ENABLED(CONFIG_BFIN_SIR)
912 #ifdef CONFIG_BFIN_SIR0
913 &bfin_sir0_device,
914 #endif
915 #ifdef CONFIG_BFIN_SIR1
916 &bfin_sir1_device,
917 #endif
918 #endif
919
920 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
921 &i2c_bfin_twi_device,
922 #endif
923
924 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
925 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
926 &bfin_sport0_uart_device,
927 #endif
928 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
929 &bfin_sport1_uart_device,
930 #endif
931 #endif
932
933 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
934 &bfin_device_gpiokeys,
935 #endif
936
937 #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
938 &cm_flash_device,
939 #endif
940 };
941
cm_init(void)942 static int __init cm_init(void)
943 {
944 printk(KERN_INFO "%s(): registering device resources\n", __func__);
945 i2c_register_board_info(0, bfin_i2c_board_info,
946 ARRAY_SIZE(bfin_i2c_board_info));
947 platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
948 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
949 return 0;
950 }
951
952 arch_initcall(cm_init);
953
954 static struct platform_device *cmbf527_early_devices[] __initdata = {
955 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
956 #ifdef CONFIG_SERIAL_BFIN_UART0
957 &bfin_uart0_device,
958 #endif
959 #ifdef CONFIG_SERIAL_BFIN_UART1
960 &bfin_uart1_device,
961 #endif
962 #endif
963
964 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
965 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
966 &bfin_sport0_uart_device,
967 #endif
968 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
969 &bfin_sport1_uart_device,
970 #endif
971 #endif
972 };
973
native_machine_early_platform_add_devices(void)974 void __init native_machine_early_platform_add_devices(void)
975 {
976 printk(KERN_INFO "register early platform devices\n");
977 early_platform_add_devices(cmbf527_early_devices,
978 ARRAY_SIZE(cmbf527_early_devices));
979 }
980
native_machine_restart(char * cmd)981 void native_machine_restart(char *cmd)
982 {
983 /* workaround reboot hang when booting from SPI */
984 if ((bfin_read_SYSCR() & 0x7) == 0x3)
985 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
986 }
987
bfin_get_ether_addr(char * addr)988 int bfin_get_ether_addr(char *addr)
989 {
990 return 1;
991 }
992 EXPORT_SYMBOL(bfin_get_ether_addr);
993