1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/spi/mmc_spi.h>
18 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
19 #include <linux/usb/isp1362.h>
20 #endif
21 #include <linux/irq.h>
22 #include <asm/dma.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/portmux.h>
25 #include <asm/dpmc.h>
26
27 /*
28 * Name the Board for the /proc/cpuinfo
29 */
30 const char bfin_board_name[] = "Bluetechnix CM BF533";
31
32 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
33 /* all SPI peripherals info goes here */
34 #if IS_ENABLED(CONFIG_MTD_M25P80)
35 static struct mtd_partition bfin_spi_flash_partitions[] = {
36 {
37 .name = "bootloader(spi)",
38 .size = 0x00020000,
39 .offset = 0,
40 .mask_flags = MTD_CAP_ROM
41 }, {
42 .name = "linux kernel(spi)",
43 .size = 0xe0000,
44 .offset = 0x20000
45 }, {
46 .name = "file system(spi)",
47 .size = 0x700000,
48 .offset = 0x00100000,
49 }
50 };
51
52 static struct flash_platform_data bfin_spi_flash_data = {
53 .name = "m25p80",
54 .parts = bfin_spi_flash_partitions,
55 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
56 .type = "m25p64",
57 };
58
59 /* SPI flash chip (m25p64) */
60 static struct bfin5xx_spi_chip spi_flash_chip_info = {
61 .enable_dma = 0, /* use dma transfer with this chip*/
62 };
63 #endif
64
65 #if IS_ENABLED(CONFIG_MMC_SPI)
66 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
67 .enable_dma = 0,
68 };
69 #endif
70
71 static struct spi_board_info bfin_spi_board_info[] __initdata = {
72 #if IS_ENABLED(CONFIG_MTD_M25P80)
73 {
74 /* the modalias must be the same as spi device driver name */
75 .modalias = "m25p80", /* Name of spi_driver for this device */
76 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
77 .bus_num = 0, /* Framework bus number */
78 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
79 .platform_data = &bfin_spi_flash_data,
80 .controller_data = &spi_flash_chip_info,
81 .mode = SPI_MODE_3,
82 },
83 #endif
84
85 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
86 {
87 .modalias = "ad183x",
88 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
89 .bus_num = 0,
90 .chip_select = 4,
91 },
92 #endif
93
94 #if IS_ENABLED(CONFIG_MMC_SPI)
95 {
96 .modalias = "mmc_spi",
97 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
98 .bus_num = 0,
99 .chip_select = 1,
100 .controller_data = &mmc_spi_chip_info,
101 .mode = SPI_MODE_3,
102 },
103 #endif
104 };
105
106 /* SPI (0) */
107 static struct resource bfin_spi0_resource[] = {
108 [0] = {
109 .start = SPI0_REGBASE,
110 .end = SPI0_REGBASE + 0xFF,
111 .flags = IORESOURCE_MEM,
112 },
113 [1] = {
114 .start = CH_SPI,
115 .end = CH_SPI,
116 .flags = IORESOURCE_DMA,
117 },
118 [2] = {
119 .start = IRQ_SPI,
120 .end = IRQ_SPI,
121 .flags = IORESOURCE_IRQ,
122 }
123 };
124
125 /* SPI controller data */
126 static struct bfin5xx_spi_master bfin_spi0_info = {
127 .num_chipselect = 8,
128 .enable_dma = 1, /* master has the ability to do dma transfer */
129 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
130 };
131
132 static struct platform_device bfin_spi0_device = {
133 .name = "bfin-spi",
134 .id = 0, /* Bus number */
135 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
136 .resource = bfin_spi0_resource,
137 .dev = {
138 .platform_data = &bfin_spi0_info, /* Passed to driver */
139 },
140 };
141 #endif /* spi master and devices */
142
143 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
144 static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147 };
148 #endif
149
150 #if IS_ENABLED(CONFIG_SMC91X)
151 #include <linux/smc91x.h>
152
153 static struct smc91x_platdata smc91x_info = {
154 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155 .leda = RPC_LED_100_10,
156 .ledb = RPC_LED_TX_RX,
157 };
158
159 static struct resource smc91x_resources[] = {
160 {
161 .start = 0x20200300,
162 .end = 0x20200300 + 16,
163 .flags = IORESOURCE_MEM,
164 }, {
165 .start = IRQ_PF0,
166 .end = IRQ_PF0,
167 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
168 },
169 };
170 static struct platform_device smc91x_device = {
171 .name = "smc91x",
172 .id = 0,
173 .num_resources = ARRAY_SIZE(smc91x_resources),
174 .resource = smc91x_resources,
175 .dev = {
176 .platform_data = &smc91x_info,
177 },
178 };
179 #endif
180
181 #if IS_ENABLED(CONFIG_SMSC911X)
182 #include <linux/smsc911x.h>
183
184 static struct resource smsc911x_resources[] = {
185 {
186 .name = "smsc911x-memory",
187 .start = 0x20308000,
188 .end = 0x20308000 + 0xFF,
189 .flags = IORESOURCE_MEM,
190 }, {
191 .start = IRQ_PF8,
192 .end = IRQ_PF8,
193 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
194 },
195 };
196
197 static struct smsc911x_platform_config smsc911x_config = {
198 .flags = SMSC911X_USE_16BIT,
199 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
200 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
201 .phy_interface = PHY_INTERFACE_MODE_MII,
202 };
203
204 static struct platform_device smsc911x_device = {
205 .name = "smsc911x",
206 .id = 0,
207 .num_resources = ARRAY_SIZE(smsc911x_resources),
208 .resource = smsc911x_resources,
209 .dev = {
210 .platform_data = &smsc911x_config,
211 },
212 };
213 #endif
214
215 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
216 #ifdef CONFIG_SERIAL_BFIN_UART0
217 static struct resource bfin_uart0_resources[] = {
218 {
219 .start = BFIN_UART_THR,
220 .end = BFIN_UART_GCTL+2,
221 .flags = IORESOURCE_MEM,
222 },
223 {
224 .start = IRQ_UART0_TX,
225 .end = IRQ_UART0_TX,
226 .flags = IORESOURCE_IRQ,
227 },
228 {
229 .start = IRQ_UART0_RX,
230 .end = IRQ_UART0_RX,
231 .flags = IORESOURCE_IRQ,
232 },
233 {
234 .start = IRQ_UART0_ERROR,
235 .end = IRQ_UART0_ERROR,
236 .flags = IORESOURCE_IRQ,
237 },
238 {
239 .start = CH_UART0_TX,
240 .end = CH_UART0_TX,
241 .flags = IORESOURCE_DMA,
242 },
243 {
244 .start = CH_UART0_RX,
245 .end = CH_UART0_RX,
246 .flags = IORESOURCE_DMA,
247 },
248 };
249
250 static unsigned short bfin_uart0_peripherals[] = {
251 P_UART0_TX, P_UART0_RX, 0
252 };
253
254 static struct platform_device bfin_uart0_device = {
255 .name = "bfin-uart",
256 .id = 0,
257 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
258 .resource = bfin_uart0_resources,
259 .dev = {
260 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
261 },
262 };
263 #endif
264 #endif
265
266 #if IS_ENABLED(CONFIG_BFIN_SIR)
267 #ifdef CONFIG_BFIN_SIR0
268 static struct resource bfin_sir0_resources[] = {
269 {
270 .start = 0xFFC00400,
271 .end = 0xFFC004FF,
272 .flags = IORESOURCE_MEM,
273 },
274 {
275 .start = IRQ_UART0_RX,
276 .end = IRQ_UART0_RX+1,
277 .flags = IORESOURCE_IRQ,
278 },
279 {
280 .start = CH_UART0_RX,
281 .end = CH_UART0_RX+1,
282 .flags = IORESOURCE_DMA,
283 },
284 };
285
286 static struct platform_device bfin_sir0_device = {
287 .name = "bfin_sir",
288 .id = 0,
289 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
290 .resource = bfin_sir0_resources,
291 };
292 #endif
293 #endif
294
295 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
296 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
297 static struct resource bfin_sport0_uart_resources[] = {
298 {
299 .start = SPORT0_TCR1,
300 .end = SPORT0_MRCS3+4,
301 .flags = IORESOURCE_MEM,
302 },
303 {
304 .start = IRQ_SPORT0_RX,
305 .end = IRQ_SPORT0_RX+1,
306 .flags = IORESOURCE_IRQ,
307 },
308 {
309 .start = IRQ_SPORT0_ERROR,
310 .end = IRQ_SPORT0_ERROR,
311 .flags = IORESOURCE_IRQ,
312 },
313 };
314
315 static unsigned short bfin_sport0_peripherals[] = {
316 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
317 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
318 };
319
320 static struct platform_device bfin_sport0_uart_device = {
321 .name = "bfin-sport-uart",
322 .id = 0,
323 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
324 .resource = bfin_sport0_uart_resources,
325 .dev = {
326 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
327 },
328 };
329 #endif
330 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
331 static struct resource bfin_sport1_uart_resources[] = {
332 {
333 .start = SPORT1_TCR1,
334 .end = SPORT1_MRCS3+4,
335 .flags = IORESOURCE_MEM,
336 },
337 {
338 .start = IRQ_SPORT1_RX,
339 .end = IRQ_SPORT1_RX+1,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .start = IRQ_SPORT1_ERROR,
344 .end = IRQ_SPORT1_ERROR,
345 .flags = IORESOURCE_IRQ,
346 },
347 };
348
349 static unsigned short bfin_sport1_peripherals[] = {
350 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
351 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
352 };
353
354 static struct platform_device bfin_sport1_uart_device = {
355 .name = "bfin-sport-uart",
356 .id = 1,
357 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
358 .resource = bfin_sport1_uart_resources,
359 .dev = {
360 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
361 },
362 };
363 #endif
364 #endif
365
366 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
367 static struct resource isp1362_hcd_resources[] = {
368 {
369 .start = 0x20308000,
370 .end = 0x20308000,
371 .flags = IORESOURCE_MEM,
372 }, {
373 .start = 0x20308004,
374 .end = 0x20308004,
375 .flags = IORESOURCE_MEM,
376 }, {
377 .start = IRQ_PF4,
378 .end = IRQ_PF4,
379 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
380 },
381 };
382
383 static struct isp1362_platform_data isp1362_priv = {
384 .sel15Kres = 1,
385 .clknotstop = 0,
386 .oc_enable = 0,
387 .int_act_high = 0,
388 .int_edge_triggered = 0,
389 .remote_wakeup_connected = 0,
390 .no_power_switching = 1,
391 .power_switching_mode = 0,
392 };
393
394 static struct platform_device isp1362_hcd_device = {
395 .name = "isp1362-hcd",
396 .id = 0,
397 .dev = {
398 .platform_data = &isp1362_priv,
399 },
400 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
401 .resource = isp1362_hcd_resources,
402 };
403 #endif
404
405
406 #if IS_ENABLED(CONFIG_USB_NET2272)
407 static struct resource net2272_bfin_resources[] = {
408 {
409 .start = 0x20300000,
410 .end = 0x20300000 + 0x100,
411 .flags = IORESOURCE_MEM,
412 }, {
413 .start = IRQ_PF6,
414 .end = IRQ_PF6,
415 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
416 },
417 };
418
419 static struct platform_device net2272_bfin_device = {
420 .name = "net2272",
421 .id = -1,
422 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
423 .resource = net2272_bfin_resources,
424 };
425 #endif
426
427
428
429 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
430 static struct mtd_partition para_partitions[] = {
431 {
432 .name = "bootloader(nor)",
433 .size = 0x40000,
434 .offset = 0,
435 }, {
436 .name = "linux+rootfs(nor)",
437 .size = MTDPART_SIZ_FULL,
438 .offset = MTDPART_OFS_APPEND,
439 },
440 };
441
442 static struct physmap_flash_data para_flash_data = {
443 .width = 2,
444 .parts = para_partitions,
445 .nr_parts = ARRAY_SIZE(para_partitions),
446 };
447
448 static struct resource para_flash_resource = {
449 .start = 0x20000000,
450 .end = 0x201fffff,
451 .flags = IORESOURCE_MEM,
452 };
453
454 static struct platform_device para_flash_device = {
455 .name = "physmap-flash",
456 .id = 0,
457 .dev = {
458 .platform_data = ¶_flash_data,
459 },
460 .num_resources = 1,
461 .resource = ¶_flash_resource,
462 };
463 #endif
464
465
466
467 static const unsigned int cclk_vlev_datasheet[] =
468 {
469 VRPAIR(VLEV_085, 250000000),
470 VRPAIR(VLEV_090, 376000000),
471 VRPAIR(VLEV_095, 426000000),
472 VRPAIR(VLEV_100, 426000000),
473 VRPAIR(VLEV_105, 476000000),
474 VRPAIR(VLEV_110, 476000000),
475 VRPAIR(VLEV_115, 476000000),
476 VRPAIR(VLEV_120, 600000000),
477 VRPAIR(VLEV_125, 600000000),
478 VRPAIR(VLEV_130, 600000000),
479 };
480
481 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
482 .tuple_tab = cclk_vlev_datasheet,
483 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
484 .vr_settling_time = 25 /* us */,
485 };
486
487 static struct platform_device bfin_dpmc = {
488 .name = "bfin dpmc",
489 .dev = {
490 .platform_data = &bfin_dmpc_vreg_data,
491 },
492 };
493
494 static struct platform_device *cm_bf533_devices[] __initdata = {
495
496 &bfin_dpmc,
497
498 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
499 #ifdef CONFIG_SERIAL_BFIN_UART0
500 &bfin_uart0_device,
501 #endif
502 #endif
503
504 #if IS_ENABLED(CONFIG_BFIN_SIR)
505 #ifdef CONFIG_BFIN_SIR0
506 &bfin_sir0_device,
507 #endif
508 #endif
509
510 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
511 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
512 &bfin_sport0_uart_device,
513 #endif
514 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
515 &bfin_sport1_uart_device,
516 #endif
517 #endif
518
519 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
520 &rtc_device,
521 #endif
522
523 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
524 &isp1362_hcd_device,
525 #endif
526
527 #if IS_ENABLED(CONFIG_SMC91X)
528 &smc91x_device,
529 #endif
530
531 #if IS_ENABLED(CONFIG_SMSC911X)
532 &smsc911x_device,
533 #endif
534
535 #if IS_ENABLED(CONFIG_USB_NET2272)
536 &net2272_bfin_device,
537 #endif
538
539 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
540 &bfin_spi0_device,
541 #endif
542
543 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
544 ¶_flash_device,
545 #endif
546 };
547
cm_bf533_init(void)548 static int __init cm_bf533_init(void)
549 {
550 printk(KERN_INFO "%s(): registering device resources\n", __func__);
551 platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
552 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
553 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
554 #endif
555 return 0;
556 }
557
558 arch_initcall(cm_bf533_init);
559
560 static struct platform_device *cm_bf533_early_devices[] __initdata = {
561 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
562 #ifdef CONFIG_SERIAL_BFIN_UART0
563 &bfin_uart0_device,
564 #endif
565 #endif
566
567 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
568 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
569 &bfin_sport0_uart_device,
570 #endif
571 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
572 &bfin_sport1_uart_device,
573 #endif
574 #endif
575 };
576
native_machine_early_platform_add_devices(void)577 void __init native_machine_early_platform_add_devices(void)
578 {
579 printk(KERN_INFO "register early platform devices\n");
580 early_platform_add_devices(cm_bf533_early_devices,
581 ARRAY_SIZE(cm_bf533_early_devices));
582 }
583