1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/spi/mmc_spi.h>
17 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
18 #include <linux/usb/isp1362.h>
19 #endif
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/i2c.h>
23 #include <asm/dma.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/reboot.h>
26 #include <asm/portmux.h>
27 #include <asm/dpmc.h>
28
29 /*
30 * Name the Board for the /proc/cpuinfo
31 */
32 const char bfin_board_name[] = "ADI BF533-STAMP";
33
34 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
35 static struct platform_device rtc_device = {
36 .name = "rtc-bfin",
37 .id = -1,
38 };
39 #endif
40
41 /*
42 * Driver needs to know address, irq and flag pin.
43 */
44 #if IS_ENABLED(CONFIG_SMC91X)
45 #include <linux/smc91x.h>
46
47 static struct smc91x_platdata smc91x_info = {
48 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
49 .leda = RPC_LED_100_10,
50 .ledb = RPC_LED_TX_RX,
51 };
52
53 static struct resource smc91x_resources[] = {
54 {
55 .name = "smc91x-regs",
56 .start = 0x20300300,
57 .end = 0x20300300 + 16,
58 .flags = IORESOURCE_MEM,
59 }, {
60 .start = IRQ_PF7,
61 .end = IRQ_PF7,
62 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
63 },
64 };
65
66 static struct platform_device smc91x_device = {
67 .name = "smc91x",
68 .id = 0,
69 .num_resources = ARRAY_SIZE(smc91x_resources),
70 .resource = smc91x_resources,
71 .dev = {
72 .platform_data = &smc91x_info,
73 },
74 };
75 #endif
76
77 #if IS_ENABLED(CONFIG_USB_NET2272)
78 static struct resource net2272_bfin_resources[] = {
79 {
80 .start = 0x20300000,
81 .end = 0x20300000 + 0x100,
82 .flags = IORESOURCE_MEM,
83 }, {
84 .start = 1,
85 .flags = IORESOURCE_BUS,
86 }, {
87 .start = IRQ_PF10,
88 .end = IRQ_PF10,
89 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
90 },
91 };
92
93 static struct platform_device net2272_bfin_device = {
94 .name = "net2272",
95 .id = -1,
96 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
97 .resource = net2272_bfin_resources,
98 };
99 #endif
100
101 #if IS_ENABLED(CONFIG_MTD_BFIN_ASYNC)
102 static struct mtd_partition stamp_partitions[] = {
103 {
104 .name = "bootloader(nor)",
105 .size = 0x40000,
106 .offset = 0,
107 }, {
108 .name = "linux kernel(nor)",
109 .size = 0x180000,
110 .offset = MTDPART_OFS_APPEND,
111 }, {
112 .name = "file system(nor)",
113 .size = MTDPART_SIZ_FULL,
114 .offset = MTDPART_OFS_APPEND,
115 }
116 };
117
118 static struct physmap_flash_data stamp_flash_data = {
119 .width = 2,
120 .parts = stamp_partitions,
121 .nr_parts = ARRAY_SIZE(stamp_partitions),
122 };
123
124 static struct resource stamp_flash_resource[] = {
125 {
126 .name = "cfi_probe",
127 .start = 0x20000000,
128 .end = 0x203fffff,
129 .flags = IORESOURCE_MEM,
130 }, {
131 .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */
132 .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */
133 .flags = IORESOURCE_MEM,
134 }, {
135 .start = GPIO_PF0,
136 .flags = IORESOURCE_IRQ,
137 }
138 };
139
140 static struct platform_device stamp_flash_device = {
141 .name = "bfin-async-flash",
142 .id = 0,
143 .dev = {
144 .platform_data = &stamp_flash_data,
145 },
146 .num_resources = ARRAY_SIZE(stamp_flash_resource),
147 .resource = stamp_flash_resource,
148 };
149 #endif
150
151 #if IS_ENABLED(CONFIG_MTD_M25P80)
152 static struct mtd_partition bfin_spi_flash_partitions[] = {
153 {
154 .name = "bootloader(spi)",
155 .size = 0x00040000,
156 .offset = 0,
157 .mask_flags = MTD_CAP_ROM
158 }, {
159 .name = "linux kernel(spi)",
160 .size = 0x180000,
161 .offset = MTDPART_OFS_APPEND,
162 }, {
163 .name = "file system(spi)",
164 .size = MTDPART_SIZ_FULL,
165 .offset = MTDPART_OFS_APPEND,
166 }
167 };
168
169 static struct flash_platform_data bfin_spi_flash_data = {
170 .name = "m25p80",
171 .parts = bfin_spi_flash_partitions,
172 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
173 .type = "m25p64",
174 };
175
176 /* SPI flash chip (m25p64) */
177 static struct bfin5xx_spi_chip spi_flash_chip_info = {
178 .enable_dma = 0, /* use dma transfer with this chip*/
179 };
180 #endif
181
182 #if IS_ENABLED(CONFIG_MMC_SPI)
183 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
bfin_mmc_spi_init(struct device * dev,irqreturn_t (* detect_int)(int,void *),void * data)184 static int bfin_mmc_spi_init(struct device *dev,
185 irqreturn_t (*detect_int)(int, void *), void *data)
186 {
187 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
188 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
189 "mmc-spi-detect", data);
190 }
191
bfin_mmc_spi_exit(struct device * dev,void * data)192 static void bfin_mmc_spi_exit(struct device *dev, void *data)
193 {
194 free_irq(MMC_SPI_CARD_DETECT_INT, data);
195 }
196
197 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
198 .init = bfin_mmc_spi_init,
199 .exit = bfin_mmc_spi_exit,
200 .detect_delay = 100, /* msecs */
201 };
202
203 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
204 .enable_dma = 0,
205 .pio_interrupt = 0,
206 };
207 #endif
208
209 static struct spi_board_info bfin_spi_board_info[] __initdata = {
210 #if IS_ENABLED(CONFIG_MTD_M25P80)
211 {
212 /* the modalias must be the same as spi device driver name */
213 .modalias = "m25p80", /* Name of spi_driver for this device */
214 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
215 .bus_num = 0, /* Framework bus number */
216 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
217 .platform_data = &bfin_spi_flash_data,
218 .controller_data = &spi_flash_chip_info,
219 .mode = SPI_MODE_3,
220 },
221 #endif
222
223 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
224 {
225 .modalias = "ad1836",
226 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
227 .bus_num = 0,
228 .chip_select = 4,
229 .platform_data = "ad1836", /* only includes chip name for the moment */
230 .mode = SPI_MODE_3,
231 },
232 #endif
233
234 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
235 {
236 .modalias = "spidev",
237 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
238 .bus_num = 0,
239 .chip_select = 1,
240 },
241 #endif
242 #if IS_ENABLED(CONFIG_MMC_SPI)
243 {
244 .modalias = "mmc_spi",
245 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
246 .bus_num = 0,
247 .chip_select = 4,
248 .platform_data = &bfin_mmc_spi_pdata,
249 .controller_data = &mmc_spi_chip_info,
250 .mode = SPI_MODE_3,
251 },
252 #endif
253 };
254
255 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
256 /* SPI (0) */
257 static struct resource bfin_spi0_resource[] = {
258 [0] = {
259 .start = SPI0_REGBASE,
260 .end = SPI0_REGBASE + 0xFF,
261 .flags = IORESOURCE_MEM,
262 },
263 [1] = {
264 .start = CH_SPI,
265 .end = CH_SPI,
266 .flags = IORESOURCE_DMA,
267 },
268 [2] = {
269 .start = IRQ_SPI,
270 .end = IRQ_SPI,
271 .flags = IORESOURCE_IRQ,
272 }
273 };
274
275 /* SPI controller data */
276 static struct bfin5xx_spi_master bfin_spi0_info = {
277 .num_chipselect = 8,
278 .enable_dma = 1, /* master has the ability to do dma transfer */
279 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
280 };
281
282 static struct platform_device bfin_spi0_device = {
283 .name = "bfin-spi",
284 .id = 0, /* Bus number */
285 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
286 .resource = bfin_spi0_resource,
287 .dev = {
288 .platform_data = &bfin_spi0_info, /* Passed to driver */
289 },
290 };
291 #endif /* spi master and devices */
292
293 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
294 #ifdef CONFIG_SERIAL_BFIN_UART0
295 static struct resource bfin_uart0_resources[] = {
296 {
297 .start = BFIN_UART_THR,
298 .end = BFIN_UART_GCTL+2,
299 .flags = IORESOURCE_MEM,
300 },
301 {
302 .start = IRQ_UART0_TX,
303 .end = IRQ_UART0_TX,
304 .flags = IORESOURCE_IRQ,
305 },
306 {
307 .start = IRQ_UART0_RX,
308 .end = IRQ_UART0_RX,
309 .flags = IORESOURCE_IRQ,
310 },
311 {
312 .start = IRQ_UART0_ERROR,
313 .end = IRQ_UART0_ERROR,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
317 .start = CH_UART0_TX,
318 .end = CH_UART0_TX,
319 .flags = IORESOURCE_DMA,
320 },
321 {
322 .start = CH_UART0_RX,
323 .end = CH_UART0_RX,
324 .flags = IORESOURCE_DMA,
325 },
326 };
327
328 static unsigned short bfin_uart0_peripherals[] = {
329 P_UART0_TX, P_UART0_RX, 0
330 };
331
332 static struct platform_device bfin_uart0_device = {
333 .name = "bfin-uart",
334 .id = 0,
335 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
336 .resource = bfin_uart0_resources,
337 .dev = {
338 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
339 },
340 };
341 #endif
342 #endif
343
344 #if IS_ENABLED(CONFIG_BFIN_SIR)
345 #ifdef CONFIG_BFIN_SIR0
346 static struct resource bfin_sir0_resources[] = {
347 {
348 .start = 0xFFC00400,
349 .end = 0xFFC004FF,
350 .flags = IORESOURCE_MEM,
351 },
352 {
353 .start = IRQ_UART0_RX,
354 .end = IRQ_UART0_RX+1,
355 .flags = IORESOURCE_IRQ,
356 },
357 {
358 .start = CH_UART0_RX,
359 .end = CH_UART0_RX+1,
360 .flags = IORESOURCE_DMA,
361 },
362 };
363
364 static struct platform_device bfin_sir0_device = {
365 .name = "bfin_sir",
366 .id = 0,
367 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
368 .resource = bfin_sir0_resources,
369 };
370 #endif
371 #endif
372
373 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
374 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
375 static struct resource bfin_sport0_uart_resources[] = {
376 {
377 .start = SPORT0_TCR1,
378 .end = SPORT0_MRCS3+4,
379 .flags = IORESOURCE_MEM,
380 },
381 {
382 .start = IRQ_SPORT0_RX,
383 .end = IRQ_SPORT0_RX+1,
384 .flags = IORESOURCE_IRQ,
385 },
386 {
387 .start = IRQ_SPORT0_ERROR,
388 .end = IRQ_SPORT0_ERROR,
389 .flags = IORESOURCE_IRQ,
390 },
391 };
392
393 static unsigned short bfin_sport0_peripherals[] = {
394 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
395 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
396 };
397
398 static struct platform_device bfin_sport0_uart_device = {
399 .name = "bfin-sport-uart",
400 .id = 0,
401 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
402 .resource = bfin_sport0_uart_resources,
403 .dev = {
404 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
405 },
406 };
407 #endif
408 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
409 static struct resource bfin_sport1_uart_resources[] = {
410 {
411 .start = SPORT1_TCR1,
412 .end = SPORT1_MRCS3+4,
413 .flags = IORESOURCE_MEM,
414 },
415 {
416 .start = IRQ_SPORT1_RX,
417 .end = IRQ_SPORT1_RX+1,
418 .flags = IORESOURCE_IRQ,
419 },
420 {
421 .start = IRQ_SPORT1_ERROR,
422 .end = IRQ_SPORT1_ERROR,
423 .flags = IORESOURCE_IRQ,
424 },
425 };
426
427 static unsigned short bfin_sport1_peripherals[] = {
428 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
429 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
430 };
431
432 static struct platform_device bfin_sport1_uart_device = {
433 .name = "bfin-sport-uart",
434 .id = 1,
435 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
436 .resource = bfin_sport1_uart_resources,
437 .dev = {
438 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
439 },
440 };
441 #endif
442 #endif
443
444 #if IS_ENABLED(CONFIG_BFIN_SPORT)
445 static struct resource bfin_sport0_resources[] = {
446 {
447 .start = SPORT0_TCR1,
448 .end = SPORT0_MRCS3+4,
449 .flags = IORESOURCE_MEM,
450 },
451 {
452 .start = IRQ_SPORT0_TX,
453 .end = IRQ_SPORT0_TX+1,
454 .flags = IORESOURCE_IRQ,
455 },
456 {
457 .start = IRQ_SPORT0_RX,
458 .end = IRQ_SPORT0_RX+1,
459 .flags = IORESOURCE_IRQ,
460 },
461 {
462 .start = IRQ_SPORT0_ERROR,
463 .end = IRQ_SPORT0_ERROR,
464 .flags = IORESOURCE_IRQ,
465 },
466 {
467 .start = CH_SPORT0_TX,
468 .end = CH_SPORT0_TX,
469 .flags = IORESOURCE_DMA,
470 },
471 {
472 .start = CH_SPORT0_RX,
473 .end = CH_SPORT0_RX,
474 .flags = IORESOURCE_DMA,
475 },
476 };
477 static struct platform_device bfin_sport0_device = {
478 .name = "bfin_sport_raw",
479 .id = 0,
480 .num_resources = ARRAY_SIZE(bfin_sport0_resources),
481 .resource = bfin_sport0_resources,
482 .dev = {
483 .platform_data = &bfin_sport0_peripherals,
484 },
485 };
486 #endif
487
488 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
489 #include <linux/input.h>
490 #include <linux/gpio_keys.h>
491
492 static struct gpio_keys_button bfin_gpio_keys_table[] = {
493 {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
494 {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
495 {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
496 };
497
498 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
499 .buttons = bfin_gpio_keys_table,
500 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
501 };
502
503 static struct platform_device bfin_device_gpiokeys = {
504 .name = "gpio-keys",
505 .dev = {
506 .platform_data = &bfin_gpio_keys_data,
507 },
508 };
509 #endif
510
511 #if IS_ENABLED(CONFIG_I2C_GPIO)
512 #include <linux/i2c-gpio.h>
513
514 static struct i2c_gpio_platform_data i2c_gpio_data = {
515 .sda_pin = GPIO_PF2,
516 .scl_pin = GPIO_PF3,
517 .sda_is_open_drain = 0,
518 .scl_is_open_drain = 0,
519 .udelay = 10,
520 };
521
522 static struct platform_device i2c_gpio_device = {
523 .name = "i2c-gpio",
524 .id = 0,
525 .dev = {
526 .platform_data = &i2c_gpio_data,
527 },
528 };
529 #endif
530
531 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
532 #if IS_ENABLED(CONFIG_JOYSTICK_AD7142)
533 {
534 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
535 .irq = 39,
536 },
537 #endif
538 #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
539 {
540 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
541 },
542 #endif
543 #if IS_ENABLED(CONFIG_INPUT_PCF8574)
544 {
545 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
546 .irq = 39,
547 },
548 #endif
549 #if IS_ENABLED(CONFIG_FB_BFIN_7393)
550 {
551 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
552 },
553 #endif
554 #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
555 {
556 I2C_BOARD_INFO("ad5252", 0x2f),
557 },
558 #endif
559 };
560
561 static const unsigned int cclk_vlev_datasheet[] =
562 {
563 VRPAIR(VLEV_085, 250000000),
564 VRPAIR(VLEV_090, 376000000),
565 VRPAIR(VLEV_095, 426000000),
566 VRPAIR(VLEV_100, 426000000),
567 VRPAIR(VLEV_105, 476000000),
568 VRPAIR(VLEV_110, 476000000),
569 VRPAIR(VLEV_115, 476000000),
570 VRPAIR(VLEV_120, 600000000),
571 VRPAIR(VLEV_125, 600000000),
572 VRPAIR(VLEV_130, 600000000),
573 };
574
575 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
576 .tuple_tab = cclk_vlev_datasheet,
577 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
578 .vr_settling_time = 25 /* us */,
579 };
580
581 static struct platform_device bfin_dpmc = {
582 .name = "bfin dpmc",
583 .dev = {
584 .platform_data = &bfin_dmpc_vreg_data,
585 },
586 };
587
588 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S) || \
589 IS_ENABLED(CONFIG_SND_BF5XX_AC97)
590
591 #include <asm/bfin_sport.h>
592
593 #define SPORT_REQ(x) \
594 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
595 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
596
597 static const u16 bfin_snd_pin[][7] = {
598 SPORT_REQ(0),
599 SPORT_REQ(1),
600 };
601
602 static struct bfin_snd_platform_data bfin_snd_data[] = {
603 {
604 .pin_req = &bfin_snd_pin[0][0],
605 },
606 {
607 .pin_req = &bfin_snd_pin[1][0],
608 },
609 };
610
611 #define BFIN_SND_RES(x) \
612 [x] = { \
613 { \
614 .start = SPORT##x##_TCR1, \
615 .end = SPORT##x##_TCR1, \
616 .flags = IORESOURCE_MEM \
617 }, \
618 { \
619 .start = CH_SPORT##x##_RX, \
620 .end = CH_SPORT##x##_RX, \
621 .flags = IORESOURCE_DMA, \
622 }, \
623 { \
624 .start = CH_SPORT##x##_TX, \
625 .end = CH_SPORT##x##_TX, \
626 .flags = IORESOURCE_DMA, \
627 }, \
628 { \
629 .start = IRQ_SPORT##x##_ERROR, \
630 .end = IRQ_SPORT##x##_ERROR, \
631 .flags = IORESOURCE_IRQ, \
632 } \
633 }
634
635 static struct resource bfin_snd_resources[][4] = {
636 BFIN_SND_RES(0),
637 BFIN_SND_RES(1),
638 };
639 #endif
640
641 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
642 static struct platform_device bfin_i2s_pcm = {
643 .name = "bfin-i2s-pcm-audio",
644 .id = -1,
645 };
646 #endif
647
648 #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
649 static struct platform_device bfin_ac97_pcm = {
650 .name = "bfin-ac97-pcm-audio",
651 .id = -1,
652 };
653 #endif
654
655 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
656 static const char * const ad1836_link[] = {
657 "bfin-i2s.0",
658 "spi0.4",
659 };
660 static struct platform_device bfin_ad1836_machine = {
661 .name = "bfin-snd-ad1836",
662 .id = -1,
663 .dev = {
664 .platform_data = (void *)ad1836_link,
665 },
666 };
667 #endif
668
669 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
670 static const unsigned ad73311_gpio[] = {
671 GPIO_PF4,
672 };
673
674 static struct platform_device bfin_ad73311_machine = {
675 .name = "bfin-snd-ad73311",
676 .id = 1,
677 .dev = {
678 .platform_data = (void *)ad73311_gpio,
679 },
680 };
681 #endif
682
683 #if IS_ENABLED(CONFIG_SND_SOC_AD73311)
684 static struct platform_device bfin_ad73311_codec_device = {
685 .name = "ad73311",
686 .id = -1,
687 };
688 #endif
689
690 #if IS_ENABLED(CONFIG_SND_SOC_AD74111)
691 static struct platform_device bfin_ad74111_codec_device = {
692 .name = "ad74111",
693 .id = -1,
694 };
695 #endif
696
697 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
698 static struct platform_device bfin_i2s = {
699 .name = "bfin-i2s",
700 .id = CONFIG_SND_BF5XX_SPORT_NUM,
701 .num_resources =
702 ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
703 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
704 .dev = {
705 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
706 },
707 };
708 #endif
709
710 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
711 static struct platform_device bfin_ac97 = {
712 .name = "bfin-ac97",
713 .id = CONFIG_SND_BF5XX_SPORT_NUM,
714 .num_resources =
715 ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
716 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
717 .dev = {
718 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
719 },
720 };
721 #endif
722
723 static struct platform_device *stamp_devices[] __initdata = {
724
725 &bfin_dpmc,
726
727 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
728 &rtc_device,
729 #endif
730
731 #if IS_ENABLED(CONFIG_SMC91X)
732 &smc91x_device,
733 #endif
734
735 #if IS_ENABLED(CONFIG_USB_NET2272)
736 &net2272_bfin_device,
737 #endif
738
739 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
740 &bfin_spi0_device,
741 #endif
742
743 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
744 #ifdef CONFIG_SERIAL_BFIN_UART0
745 &bfin_uart0_device,
746 #endif
747 #endif
748
749 #if IS_ENABLED(CONFIG_BFIN_SIR)
750 #ifdef CONFIG_BFIN_SIR0
751 &bfin_sir0_device,
752 #endif
753 #endif
754
755 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
756 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
757 &bfin_sport0_uart_device,
758 #endif
759 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
760 &bfin_sport1_uart_device,
761 #endif
762 #endif
763
764 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
765 &bfin_device_gpiokeys,
766 #endif
767
768 #if IS_ENABLED(CONFIG_I2C_GPIO)
769 &i2c_gpio_device,
770 #endif
771
772 #if IS_ENABLED(CONFIG_MTD_BFIN_ASYNC)
773 &stamp_flash_device,
774 #endif
775
776 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
777 &bfin_i2s_pcm,
778 #endif
779
780 #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
781 &bfin_ac97_pcm,
782 #endif
783
784 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
785 &bfin_ad1836_machine,
786 #endif
787
788 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
789 &bfin_ad73311_machine,
790 #endif
791
792 #if IS_ENABLED(CONFIG_SND_SOC_AD73311)
793 &bfin_ad73311_codec_device,
794 #endif
795
796 #if IS_ENABLED(CONFIG_SND_SOC_AD74111)
797 &bfin_ad74111_codec_device,
798 #endif
799
800 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
801 &bfin_i2s,
802 #endif
803
804 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
805 &bfin_ac97,
806 #endif
807 };
808
net2272_init(void)809 static int __init net2272_init(void)
810 {
811 #if IS_ENABLED(CONFIG_USB_NET2272)
812 int ret;
813
814 /* Set PF0 to 0, PF1 to 1 make /AMS3 work properly */
815 ret = gpio_request(GPIO_PF0, "net2272");
816 if (ret)
817 return ret;
818
819 ret = gpio_request(GPIO_PF1, "net2272");
820 if (ret) {
821 gpio_free(GPIO_PF0);
822 return ret;
823 }
824
825 ret = gpio_request(GPIO_PF11, "net2272");
826 if (ret) {
827 gpio_free(GPIO_PF0);
828 gpio_free(GPIO_PF1);
829 return ret;
830 }
831
832 gpio_direction_output(GPIO_PF0, 0);
833 gpio_direction_output(GPIO_PF1, 1);
834
835 /* Reset the USB chip */
836 gpio_direction_output(GPIO_PF11, 0);
837 mdelay(2);
838 gpio_set_value(GPIO_PF11, 1);
839 #endif
840
841 return 0;
842 }
843
stamp_init(void)844 static int __init stamp_init(void)
845 {
846 int ret;
847
848 printk(KERN_INFO "%s(): registering device resources\n", __func__);
849
850 i2c_register_board_info(0, bfin_i2c_board_info,
851 ARRAY_SIZE(bfin_i2c_board_info));
852
853 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
854 if (ret < 0)
855 return ret;
856
857 #if IS_ENABLED(CONFIG_SMC91X)
858 /*
859 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
860 * the bfin-async-map driver takes care of flipping between
861 * flash and ethernet when necessary.
862 */
863 ret = gpio_request(GPIO_PF0, "enet_cpld");
864 if (!ret) {
865 gpio_direction_output(GPIO_PF0, 1);
866 gpio_free(GPIO_PF0);
867 }
868 #endif
869
870 if (net2272_init())
871 pr_warning("unable to configure net2272; it probably won't work\n");
872
873 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
874 return 0;
875 }
876
877 arch_initcall(stamp_init);
878
879 static struct platform_device *stamp_early_devices[] __initdata = {
880 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
881 #ifdef CONFIG_SERIAL_BFIN_UART0
882 &bfin_uart0_device,
883 #endif
884 #endif
885
886 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
887 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
888 &bfin_sport0_uart_device,
889 #endif
890 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
891 &bfin_sport1_uart_device,
892 #endif
893 #endif
894 };
895
native_machine_early_platform_add_devices(void)896 void __init native_machine_early_platform_add_devices(void)
897 {
898 printk(KERN_INFO "register early platform devices\n");
899 early_platform_add_devices(stamp_early_devices,
900 ARRAY_SIZE(stamp_early_devices));
901 }
902
native_machine_restart(char * cmd)903 void native_machine_restart(char *cmd)
904 {
905 /* workaround pull up on cpld / flash pin not being strong enough */
906 gpio_request(GPIO_PF0, "flash_cpld");
907 gpio_direction_output(GPIO_PF0, 0);
908 }
909