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1 /*
2  * Copyright 2004-2009 Analog Devices Inc.
3  *           2008-2009 Bluetechnix
4  *                2005 National ICT Australia (NICTA)
5  *                      Aidan Williams <aidan@nicta.com.au>
6  *
7  * Licensed under the GPL-2 or later.
8  */
9 
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/irq.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <asm/bfin5xx_spi.h>
21 #include <asm/dma.h>
22 #include <asm/gpio.h>
23 #include <asm/nand.h>
24 #include <asm/portmux.h>
25 #include <asm/bfin_sdh.h>
26 #include <mach/bf54x_keys.h>
27 #include <asm/dpmc.h>
28 #include <linux/input.h>
29 #include <linux/spi/ad7877.h>
30 
31 /*
32  * Name the Board for the /proc/cpuinfo
33  */
34 const char bfin_board_name[] = "Bluetechnix CM-BF548";
35 
36 /*
37  *  Driver needs to know address, irq and flag pin.
38  */
39 
40 #if IS_ENABLED(CONFIG_FB_BF54X_LQ043)
41 
42 #include <mach/bf54x-lq043.h>
43 
44 static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
45 	.width =	480,
46 	.height =	272,
47 	.xres =		{480, 480, 480},
48 	.yres =		{272, 272, 272},
49 	.bpp =		{24, 24, 24},
50 	.disp =		GPIO_PE3,
51 };
52 
53 static struct resource bf54x_lq043_resources[] = {
54 	{
55 		.start = IRQ_EPPI0_ERR,
56 		.end = IRQ_EPPI0_ERR,
57 		.flags = IORESOURCE_IRQ,
58 	},
59 };
60 
61 static struct platform_device bf54x_lq043_device = {
62 	.name		= "bf54x-lq043",
63 	.id		= -1,
64 	.num_resources 	= ARRAY_SIZE(bf54x_lq043_resources),
65 	.resource 	= bf54x_lq043_resources,
66 	.dev		= {
67 		.platform_data = &bf54x_lq043_data,
68 	},
69 };
70 #endif
71 
72 #if IS_ENABLED(CONFIG_KEYBOARD_BFIN)
73 static unsigned int bf548_keymap[] = {
74 	KEYVAL(0, 0, KEY_ENTER),
75 	KEYVAL(0, 1, KEY_HELP),
76 	KEYVAL(0, 2, KEY_0),
77 	KEYVAL(0, 3, KEY_BACKSPACE),
78 	KEYVAL(1, 0, KEY_TAB),
79 	KEYVAL(1, 1, KEY_9),
80 	KEYVAL(1, 2, KEY_8),
81 	KEYVAL(1, 3, KEY_7),
82 	KEYVAL(2, 0, KEY_DOWN),
83 	KEYVAL(2, 1, KEY_6),
84 	KEYVAL(2, 2, KEY_5),
85 	KEYVAL(2, 3, KEY_4),
86 	KEYVAL(3, 0, KEY_UP),
87 	KEYVAL(3, 1, KEY_3),
88 	KEYVAL(3, 2, KEY_2),
89 	KEYVAL(3, 3, KEY_1),
90 };
91 
92 static struct bfin_kpad_platform_data bf54x_kpad_data = {
93 	.rows			= 4,
94 	.cols			= 4,
95 	.keymap 		= bf548_keymap,
96 	.keymapsize 		= ARRAY_SIZE(bf548_keymap),
97 	.repeat			= 0,
98 	.debounce_time		= 5000,	/* ns (5ms) */
99 	.coldrive_time		= 1000, /* ns (1ms) */
100 	.keyup_test_interval	= 50, /* ms (50ms) */
101 };
102 
103 static struct resource bf54x_kpad_resources[] = {
104 	{
105 		.start = IRQ_KEY,
106 		.end = IRQ_KEY,
107 		.flags = IORESOURCE_IRQ,
108 	},
109 };
110 
111 static struct platform_device bf54x_kpad_device = {
112 	.name		= "bf54x-keys",
113 	.id		= -1,
114 	.num_resources 	= ARRAY_SIZE(bf54x_kpad_resources),
115 	.resource 	= bf54x_kpad_resources,
116 	.dev		= {
117 		.platform_data = &bf54x_kpad_data,
118 	},
119 };
120 #endif
121 
122 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
123 static struct platform_device rtc_device = {
124 	.name = "rtc-bfin",
125 	.id   = -1,
126 };
127 #endif
128 
129 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
130 #ifdef CONFIG_SERIAL_BFIN_UART0
131 static struct resource bfin_uart0_resources[] = {
132 	{
133 		.start = UART0_DLL,
134 		.end = UART0_RBR+2,
135 		.flags = IORESOURCE_MEM,
136 	},
137 	{
138 		.start = IRQ_UART0_TX,
139 		.end = IRQ_UART0_TX,
140 		.flags = IORESOURCE_IRQ,
141 	},
142 	{
143 		.start = IRQ_UART0_RX,
144 		.end = IRQ_UART0_RX,
145 		.flags = IORESOURCE_IRQ,
146 	},
147 	{
148 		.start = IRQ_UART0_ERROR,
149 		.end = IRQ_UART0_ERROR,
150 		.flags = IORESOURCE_IRQ,
151 	},
152 	{
153 		.start = CH_UART0_TX,
154 		.end = CH_UART0_TX,
155 		.flags = IORESOURCE_DMA,
156 	},
157 	{
158 		.start = CH_UART0_RX,
159 		.end = CH_UART0_RX,
160 		.flags = IORESOURCE_DMA,
161 	},
162 };
163 
164 static unsigned short bfin_uart0_peripherals[] = {
165 	P_UART0_TX, P_UART0_RX, 0
166 };
167 
168 static struct platform_device bfin_uart0_device = {
169 	.name = "bfin-uart",
170 	.id = 0,
171 	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
172 	.resource = bfin_uart0_resources,
173 	.dev = {
174 		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
175 	},
176 };
177 #endif
178 #ifdef CONFIG_SERIAL_BFIN_UART1
179 static struct resource bfin_uart1_resources[] = {
180 	{
181 		.start = UART1_DLL,
182 		.end = UART1_RBR+2,
183 		.flags = IORESOURCE_MEM,
184 	},
185 	{
186 		.start = IRQ_UART1_TX,
187 		.end = IRQ_UART1_TX,
188 		.flags = IORESOURCE_IRQ,
189 	},
190 	{
191 		.start = IRQ_UART1_RX,
192 		.end = IRQ_UART1_RX,
193 		.flags = IORESOURCE_IRQ,
194 	},
195 	{
196 		.start = IRQ_UART1_ERROR,
197 		.end = IRQ_UART1_ERROR,
198 		.flags = IORESOURCE_IRQ,
199 	},
200 	{
201 		.start = CH_UART1_TX,
202 		.end = CH_UART1_TX,
203 		.flags = IORESOURCE_DMA,
204 	},
205 	{
206 		.start = CH_UART1_RX,
207 		.end = CH_UART1_RX,
208 		.flags = IORESOURCE_DMA,
209 	},
210 #ifdef CONFIG_BFIN_UART1_CTSRTS
211 	{	/* CTS pin -- 0 means not supported */
212 		.start = GPIO_PE10,
213 		.end = GPIO_PE10,
214 		.flags = IORESOURCE_IO,
215 	},
216 	{	/* RTS pin -- 0 means not supported */
217 		.start = GPIO_PE9,
218 		.end = GPIO_PE9,
219 		.flags = IORESOURCE_IO,
220 	},
221 #endif
222 };
223 
224 static unsigned short bfin_uart1_peripherals[] = {
225 	P_UART1_TX, P_UART1_RX,
226 #ifdef CONFIG_BFIN_UART1_CTSRTS
227 	P_UART1_RTS, P_UART1_CTS,
228 #endif
229 	0
230 };
231 
232 static struct platform_device bfin_uart1_device = {
233 	.name = "bfin-uart",
234 	.id = 1,
235 	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
236 	.resource = bfin_uart1_resources,
237 	.dev = {
238 		.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
239 	},
240 };
241 #endif
242 #ifdef CONFIG_SERIAL_BFIN_UART2
243 static struct resource bfin_uart2_resources[] = {
244 	{
245 		.start = UART2_DLL,
246 		.end = UART2_RBR+2,
247 		.flags = IORESOURCE_MEM,
248 	},
249 	{
250 		.start = IRQ_UART2_TX,
251 		.end = IRQ_UART2_TX,
252 		.flags = IORESOURCE_IRQ,
253 	},
254 	{
255 		.start = IRQ_UART2_RX,
256 		.end = IRQ_UART2_RX,
257 		.flags = IORESOURCE_IRQ,
258 	},
259 	{
260 		.start = IRQ_UART2_ERROR,
261 		.end = IRQ_UART2_ERROR,
262 		.flags = IORESOURCE_IRQ,
263 	},
264 	{
265 		.start = CH_UART2_TX,
266 		.end = CH_UART2_TX,
267 		.flags = IORESOURCE_DMA,
268 	},
269 	{
270 		.start = CH_UART2_RX,
271 		.end = CH_UART2_RX,
272 		.flags = IORESOURCE_DMA,
273 	},
274 };
275 
276 static unsigned short bfin_uart2_peripherals[] = {
277 	P_UART2_TX, P_UART2_RX, 0
278 };
279 
280 static struct platform_device bfin_uart2_device = {
281 	.name = "bfin-uart",
282 	.id = 2,
283 	.num_resources = ARRAY_SIZE(bfin_uart2_resources),
284 	.resource = bfin_uart2_resources,
285 	.dev = {
286 		.platform_data = &bfin_uart2_peripherals, /* Passed to driver */
287 	},
288 };
289 #endif
290 #ifdef CONFIG_SERIAL_BFIN_UART3
291 static struct resource bfin_uart3_resources[] = {
292 	{
293 		.start = UART3_DLL,
294 		.end = UART3_RBR+2,
295 		.flags = IORESOURCE_MEM,
296 	},
297 	{
298 		.start = IRQ_UART3_TX,
299 		.end = IRQ_UART3_TX,
300 		.flags = IORESOURCE_IRQ,
301 	},
302 	{
303 		.start = IRQ_UART3_RX,
304 		.end = IRQ_UART3_RX,
305 		.flags = IORESOURCE_IRQ,
306 	},
307 	{
308 		.start = IRQ_UART3_ERROR,
309 		.end = IRQ_UART3_ERROR,
310 		.flags = IORESOURCE_IRQ,
311 	},
312 	{
313 		.start = CH_UART3_TX,
314 		.end = CH_UART3_TX,
315 		.flags = IORESOURCE_DMA,
316 	},
317 	{
318 		.start = CH_UART3_RX,
319 		.end = CH_UART3_RX,
320 		.flags = IORESOURCE_DMA,
321 	},
322 #ifdef CONFIG_BFIN_UART3_CTSRTS
323 	{	/* CTS pin -- 0 means not supported */
324 		.start = GPIO_PB3,
325 		.end = GPIO_PB3,
326 		.flags = IORESOURCE_IO,
327 	},
328 	{	/* RTS pin -- 0 means not supported */
329 		.start = GPIO_PB2,
330 		.end = GPIO_PB2,
331 		.flags = IORESOURCE_IO,
332 	},
333 #endif
334 };
335 
336 static unsigned short bfin_uart3_peripherals[] = {
337 	P_UART3_TX, P_UART3_RX,
338 #ifdef CONFIG_BFIN_UART3_CTSRTS
339 	P_UART3_RTS, P_UART3_CTS,
340 #endif
341 	0
342 };
343 
344 static struct platform_device bfin_uart3_device = {
345 	.name = "bfin-uart",
346 	.id = 3,
347 	.num_resources = ARRAY_SIZE(bfin_uart3_resources),
348 	.resource = bfin_uart3_resources,
349 	.dev = {
350 		.platform_data = &bfin_uart3_peripherals, /* Passed to driver */
351 	},
352 };
353 #endif
354 #endif
355 
356 #if IS_ENABLED(CONFIG_BFIN_SIR)
357 #ifdef CONFIG_BFIN_SIR0
358 static struct resource bfin_sir0_resources[] = {
359 	{
360 		.start = 0xFFC00400,
361 		.end = 0xFFC004FF,
362 		.flags = IORESOURCE_MEM,
363 	},
364 	{
365 		.start = IRQ_UART0_RX,
366 		.end = IRQ_UART0_RX+1,
367 		.flags = IORESOURCE_IRQ,
368 	},
369 	{
370 		.start = CH_UART0_RX,
371 		.end = CH_UART0_RX+1,
372 		.flags = IORESOURCE_DMA,
373 	},
374 };
375 static struct platform_device bfin_sir0_device = {
376 	.name = "bfin_sir",
377 	.id = 0,
378 	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
379 	.resource = bfin_sir0_resources,
380 };
381 #endif
382 #ifdef CONFIG_BFIN_SIR1
383 static struct resource bfin_sir1_resources[] = {
384 	{
385 		.start = 0xFFC02000,
386 		.end = 0xFFC020FF,
387 		.flags = IORESOURCE_MEM,
388 	},
389 	{
390 		.start = IRQ_UART1_RX,
391 		.end = IRQ_UART1_RX+1,
392 		.flags = IORESOURCE_IRQ,
393 	},
394 	{
395 		.start = CH_UART1_RX,
396 		.end = CH_UART1_RX+1,
397 		.flags = IORESOURCE_DMA,
398 	},
399 };
400 static struct platform_device bfin_sir1_device = {
401 	.name = "bfin_sir",
402 	.id = 1,
403 	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
404 	.resource = bfin_sir1_resources,
405 };
406 #endif
407 #ifdef CONFIG_BFIN_SIR2
408 static struct resource bfin_sir2_resources[] = {
409 	{
410 		.start = 0xFFC02100,
411 		.end = 0xFFC021FF,
412 		.flags = IORESOURCE_MEM,
413 	},
414 	{
415 		.start = IRQ_UART2_RX,
416 		.end = IRQ_UART2_RX+1,
417 		.flags = IORESOURCE_IRQ,
418 	},
419 	{
420 		.start = CH_UART2_RX,
421 		.end = CH_UART2_RX+1,
422 		.flags = IORESOURCE_DMA,
423 	},
424 };
425 static struct platform_device bfin_sir2_device = {
426 	.name = "bfin_sir",
427 	.id = 2,
428 	.num_resources = ARRAY_SIZE(bfin_sir2_resources),
429 	.resource = bfin_sir2_resources,
430 };
431 #endif
432 #ifdef CONFIG_BFIN_SIR3
433 static struct resource bfin_sir3_resources[] = {
434 	{
435 		.start = 0xFFC03100,
436 		.end = 0xFFC031FF,
437 		.flags = IORESOURCE_MEM,
438 	},
439 	{
440 		.start = IRQ_UART3_RX,
441 		.end = IRQ_UART3_RX+1,
442 		.flags = IORESOURCE_IRQ,
443 	},
444 	{
445 		.start = CH_UART3_RX,
446 		.end = CH_UART3_RX+1,
447 		.flags = IORESOURCE_DMA,
448 	},
449 };
450 static struct platform_device bfin_sir3_device = {
451 	.name = "bfin_sir",
452 	.id = 3,
453 	.num_resources = ARRAY_SIZE(bfin_sir3_resources),
454 	.resource = bfin_sir3_resources,
455 };
456 #endif
457 #endif
458 
459 #if IS_ENABLED(CONFIG_SMSC911X)
460 #include <linux/smsc911x.h>
461 
462 static struct resource smsc911x_resources[] = {
463 	{
464 		.name = "smsc911x-memory",
465 		.start = 0x24000000,
466 		.end = 0x24000000 + 0xFF,
467 		.flags = IORESOURCE_MEM,
468 	},
469 	{
470 		.start = IRQ_PE6,
471 		.end = IRQ_PE6,
472 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
473 	},
474 };
475 
476 static struct smsc911x_platform_config smsc911x_config = {
477 	.flags = SMSC911X_USE_16BIT,
478 	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
479 	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
480 	.phy_interface = PHY_INTERFACE_MODE_MII,
481 };
482 
483 static struct platform_device smsc911x_device = {
484 	.name = "smsc911x",
485 	.id = 0,
486 	.num_resources = ARRAY_SIZE(smsc911x_resources),
487 	.resource = smsc911x_resources,
488 	.dev = {
489 		.platform_data = &smsc911x_config,
490 	},
491 };
492 #endif
493 
494 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
495 static struct resource musb_resources[] = {
496 	[0] = {
497 		.start	= 0xFFC03C00,
498 		.end	= 0xFFC040FF,
499 		.flags	= IORESOURCE_MEM,
500 	},
501 	[1] = {	/* general IRQ */
502 		.start	= IRQ_USB_INT0,
503 		.end	= IRQ_USB_INT0,
504 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
505 		.name	= "mc"
506 	},
507 	[2] = {	/* DMA IRQ */
508 		.start	= IRQ_USB_DMA,
509 		.end	= IRQ_USB_DMA,
510 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
511 		.name	= "dma"
512 	},
513 };
514 
515 static struct musb_hdrc_config musb_config = {
516 	.multipoint	= 0,
517 	.dyn_fifo	= 0,
518 	.soft_con	= 1,
519 	.dma		= 1,
520 	.num_eps	= 8,
521 	.dma_channels	= 8,
522 	.gpio_vrsel	= GPIO_PH6,
523 	/* Some custom boards need to be active low, just set it to "0"
524 	 * if it is the case.
525 	 */
526 	.gpio_vrsel_active	= 1,
527 	.clkin          = 24,           /* musb CLKIN in MHZ */
528 };
529 
530 static struct musb_hdrc_platform_data musb_plat = {
531 #if defined(CONFIG_USB_MUSB_OTG)
532 	.mode		= MUSB_OTG,
533 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
534 	.mode		= MUSB_HOST,
535 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
536 	.mode		= MUSB_PERIPHERAL,
537 #endif
538 	.config		= &musb_config,
539 };
540 
541 static u64 musb_dmamask = ~(u32)0;
542 
543 static struct platform_device musb_device = {
544 	.name		= "musb-blackfin",
545 	.id		= 0,
546 	.dev = {
547 		.dma_mask		= &musb_dmamask,
548 		.coherent_dma_mask	= 0xffffffff,
549 		.platform_data		= &musb_plat,
550 	},
551 	.num_resources	= ARRAY_SIZE(musb_resources),
552 	.resource	= musb_resources,
553 };
554 #endif
555 
556 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
557 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
558 static struct resource bfin_sport0_uart_resources[] = {
559 	{
560 		.start = SPORT0_TCR1,
561 		.end = SPORT0_MRCS3+4,
562 		.flags = IORESOURCE_MEM,
563 	},
564 	{
565 		.start = IRQ_SPORT0_RX,
566 		.end = IRQ_SPORT0_RX+1,
567 		.flags = IORESOURCE_IRQ,
568 	},
569 	{
570 		.start = IRQ_SPORT0_ERROR,
571 		.end = IRQ_SPORT0_ERROR,
572 		.flags = IORESOURCE_IRQ,
573 	},
574 };
575 
576 static unsigned short bfin_sport0_peripherals[] = {
577 	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
578 	P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
579 };
580 
581 static struct platform_device bfin_sport0_uart_device = {
582 	.name = "bfin-sport-uart",
583 	.id = 0,
584 	.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
585 	.resource = bfin_sport0_uart_resources,
586 	.dev = {
587 		.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
588 	},
589 };
590 #endif
591 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
592 static struct resource bfin_sport1_uart_resources[] = {
593 	{
594 		.start = SPORT1_TCR1,
595 		.end = SPORT1_MRCS3+4,
596 		.flags = IORESOURCE_MEM,
597 	},
598 	{
599 		.start = IRQ_SPORT1_RX,
600 		.end = IRQ_SPORT1_RX+1,
601 		.flags = IORESOURCE_IRQ,
602 	},
603 	{
604 		.start = IRQ_SPORT1_ERROR,
605 		.end = IRQ_SPORT1_ERROR,
606 		.flags = IORESOURCE_IRQ,
607 	},
608 };
609 
610 static unsigned short bfin_sport1_peripherals[] = {
611 	P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
612 	P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
613 };
614 
615 static struct platform_device bfin_sport1_uart_device = {
616 	.name = "bfin-sport-uart",
617 	.id = 1,
618 	.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
619 	.resource = bfin_sport1_uart_resources,
620 	.dev = {
621 		.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
622 	},
623 };
624 #endif
625 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
626 static struct resource bfin_sport2_uart_resources[] = {
627 	{
628 		.start = SPORT2_TCR1,
629 		.end = SPORT2_MRCS3+4,
630 		.flags = IORESOURCE_MEM,
631 	},
632 	{
633 		.start = IRQ_SPORT2_RX,
634 		.end = IRQ_SPORT2_RX+1,
635 		.flags = IORESOURCE_IRQ,
636 	},
637 	{
638 		.start = IRQ_SPORT2_ERROR,
639 		.end = IRQ_SPORT2_ERROR,
640 		.flags = IORESOURCE_IRQ,
641 	},
642 };
643 
644 static unsigned short bfin_sport2_peripherals[] = {
645 	P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
646 	P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
647 };
648 
649 static struct platform_device bfin_sport2_uart_device = {
650 	.name = "bfin-sport-uart",
651 	.id = 2,
652 	.num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
653 	.resource = bfin_sport2_uart_resources,
654 	.dev = {
655 		.platform_data = &bfin_sport2_peripherals, /* Passed to driver */
656 	},
657 };
658 #endif
659 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
660 static struct resource bfin_sport3_uart_resources[] = {
661 	{
662 		.start = SPORT3_TCR1,
663 		.end = SPORT3_MRCS3+4,
664 		.flags = IORESOURCE_MEM,
665 	},
666 	{
667 		.start = IRQ_SPORT3_RX,
668 		.end = IRQ_SPORT3_RX+1,
669 		.flags = IORESOURCE_IRQ,
670 	},
671 	{
672 		.start = IRQ_SPORT3_ERROR,
673 		.end = IRQ_SPORT3_ERROR,
674 		.flags = IORESOURCE_IRQ,
675 	},
676 };
677 
678 static unsigned short bfin_sport3_peripherals[] = {
679 	P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
680 	P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
681 };
682 
683 static struct platform_device bfin_sport3_uart_device = {
684 	.name = "bfin-sport-uart",
685 	.id = 3,
686 	.num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
687 	.resource = bfin_sport3_uart_resources,
688 	.dev = {
689 		.platform_data = &bfin_sport3_peripherals, /* Passed to driver */
690 	},
691 };
692 #endif
693 #endif
694 
695 #if IS_ENABLED(CONFIG_PATA_BF54X)
696 static struct resource bfin_atapi_resources[] = {
697 	{
698 		.start = 0xFFC03800,
699 		.end = 0xFFC0386F,
700 		.flags = IORESOURCE_MEM,
701 	},
702 	{
703 		.start = IRQ_ATAPI_ERR,
704 		.end = IRQ_ATAPI_ERR,
705 		.flags = IORESOURCE_IRQ,
706 	},
707 };
708 
709 static struct platform_device bfin_atapi_device = {
710 	.name = "pata-bf54x",
711 	.id = -1,
712 	.num_resources = ARRAY_SIZE(bfin_atapi_resources),
713 	.resource = bfin_atapi_resources,
714 };
715 #endif
716 
717 #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
718 static struct mtd_partition partition_info[] = {
719 	{
720 		.name = "linux kernel(nand)",
721 		.offset = 0,
722 		.size = 4 * 1024 * 1024,
723 	},
724 	{
725 		.name = "file system(nand)",
726 		.offset = 4 * 1024 * 1024,
727 		.size = (256 - 4) * 1024 * 1024,
728 	},
729 };
730 
731 static struct bf5xx_nand_platform bf5xx_nand_platform = {
732 	.data_width = NFC_NWIDTH_8,
733 	.partitions = partition_info,
734 	.nr_partitions = ARRAY_SIZE(partition_info),
735 	.rd_dly = 3,
736 	.wr_dly = 3,
737 };
738 
739 static struct resource bf5xx_nand_resources[] = {
740 	{
741 		.start = 0xFFC03B00,
742 		.end = 0xFFC03B4F,
743 		.flags = IORESOURCE_MEM,
744 	},
745 	{
746 		.start = CH_NFC,
747 		.end = CH_NFC,
748 		.flags = IORESOURCE_IRQ,
749 	},
750 };
751 
752 static struct platform_device bf5xx_nand_device = {
753 	.name = "bf5xx-nand",
754 	.id = 0,
755 	.num_resources = ARRAY_SIZE(bf5xx_nand_resources),
756 	.resource = bf5xx_nand_resources,
757 	.dev = {
758 		.platform_data = &bf5xx_nand_platform,
759 	},
760 };
761 #endif
762 
763 #if IS_ENABLED(CONFIG_SDH_BFIN)
764 static struct bfin_sd_host bfin_sdh_data = {
765 	.dma_chan = CH_SDH,
766 	.irq_int0 = IRQ_SDH_MASK0,
767 	.pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
768 };
769 
770 static struct platform_device bf54x_sdh_device = {
771 	.name = "bfin-sdh",
772 	.id = 0,
773 	.dev = {
774 		.platform_data = &bfin_sdh_data,
775 	},
776 };
777 #endif
778 
779 #if IS_ENABLED(CONFIG_CAN_BFIN)
780 static unsigned short bfin_can_peripherals[] = {
781 	P_CAN0_RX, P_CAN0_TX, 0
782 };
783 
784 static struct resource bfin_can_resources[] = {
785 	{
786 		.start = 0xFFC02A00,
787 		.end = 0xFFC02FFF,
788 		.flags = IORESOURCE_MEM,
789 	},
790 	{
791 		.start = IRQ_CAN0_RX,
792 		.end = IRQ_CAN0_RX,
793 		.flags = IORESOURCE_IRQ,
794 	},
795 	{
796 		.start = IRQ_CAN0_TX,
797 		.end = IRQ_CAN0_TX,
798 		.flags = IORESOURCE_IRQ,
799 	},
800 	{
801 		.start = IRQ_CAN0_ERROR,
802 		.end = IRQ_CAN0_ERROR,
803 		.flags = IORESOURCE_IRQ,
804 	},
805 };
806 
807 static struct platform_device bfin_can_device = {
808 	.name = "bfin_can",
809 	.num_resources = ARRAY_SIZE(bfin_can_resources),
810 	.resource = bfin_can_resources,
811 	.dev = {
812 		.platform_data = &bfin_can_peripherals, /* Passed to driver */
813 	},
814 };
815 #endif
816 
817 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
818 static struct mtd_partition para_partitions[] = {
819 	{
820 		.name       = "bootloader(nor)",
821 		.size       = 0x40000,
822 		.offset     = 0,
823 	}, {
824 		.name       = "linux kernel(nor)",
825 		.size       = 0x100000,
826 		.offset     = MTDPART_OFS_APPEND,
827 	}, {
828 		.name       = "file system(nor)",
829 		.size       = MTDPART_SIZ_FULL,
830 		.offset     = MTDPART_OFS_APPEND,
831 	}
832 };
833 
834 static struct physmap_flash_data para_flash_data = {
835 	.width      = 2,
836 	.parts      = para_partitions,
837 	.nr_parts   = ARRAY_SIZE(para_partitions),
838 };
839 
840 static struct resource para_flash_resource = {
841 	.start = 0x20000000,
842 	.end   = 0x207fffff,
843 	.flags = IORESOURCE_MEM,
844 };
845 
846 static struct platform_device para_flash_device = {
847 	.name          = "physmap-flash",
848 	.id            = 0,
849 	.dev = {
850 		.platform_data = &para_flash_data,
851 	},
852 	.num_resources = 1,
853 	.resource      = &para_flash_resource,
854 };
855 #endif
856 
857 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
858 /* all SPI peripherals info goes here */
859 #if IS_ENABLED(CONFIG_MTD_M25P80)
860 /* SPI flash chip (m25p16) */
861 static struct mtd_partition bfin_spi_flash_partitions[] = {
862 	{
863 		.name = "bootloader(spi)",
864 		.size = 0x00040000,
865 		.offset = 0,
866 		.mask_flags = MTD_CAP_ROM
867 	}, {
868 		.name = "linux kernel(spi)",
869 		.size = 0x1c0000,
870 		.offset = 0x40000
871 	}
872 };
873 
874 static struct flash_platform_data bfin_spi_flash_data = {
875 	.name = "m25p80",
876 	.parts = bfin_spi_flash_partitions,
877 	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
878 	.type = "m25p16",
879 };
880 
881 static struct bfin5xx_spi_chip spi_flash_chip_info = {
882 	.enable_dma = 0,         /* use dma transfer with this chip*/
883 };
884 #endif
885 
886 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
887 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
888 	.model			= 7877,
889 	.vref_delay_usecs	= 50,	/* internal, no capacitor */
890 	.x_plate_ohms		= 419,
891 	.y_plate_ohms		= 486,
892 	.pressure_max		= 1000,
893 	.pressure_min		= 0,
894 	.stopacq_polarity 	= 1,
895 	.first_conversion_delay = 3,
896 	.acquisition_time 	= 1,
897 	.averaging 		= 1,
898 	.pen_down_acc_interval 	= 1,
899 };
900 #endif
901 
902 static struct spi_board_info bf54x_spi_board_info[] __initdata = {
903 #if IS_ENABLED(CONFIG_MTD_M25P80)
904 	{
905 		/* the modalias must be the same as spi device driver name */
906 		.modalias = "m25p80", /* Name of spi_driver for this device */
907 		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
908 		.bus_num = 0, /* Framework bus number */
909 		.chip_select = 1, /* SPI_SSEL1*/
910 		.platform_data = &bfin_spi_flash_data,
911 		.controller_data = &spi_flash_chip_info,
912 		.mode = SPI_MODE_3,
913 	},
914 #endif
915 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
916 {
917 	.modalias		= "ad7877",
918 	.platform_data		= &bfin_ad7877_ts_info,
919 	.irq			= IRQ_PJ11,
920 	.max_speed_hz		= 12500000,     /* max spi clock (SCK) speed in HZ */
921 	.bus_num		= 0,
922 	.chip_select  		= 2,
923 },
924 #endif
925 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
926 	{
927 		.modalias = "spidev",
928 		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
929 		.bus_num = 0,
930 		.chip_select = 1,
931 	},
932 #endif
933 };
934 
935 /* SPI (0) */
936 static struct resource bfin_spi0_resource[] = {
937 	[0] = {
938 		.start = SPI0_REGBASE,
939 		.end   = SPI0_REGBASE + 0xFF,
940 		.flags = IORESOURCE_MEM,
941 	},
942 	[1] = {
943 		.start = CH_SPI0,
944 		.end   = CH_SPI0,
945 		.flags = IORESOURCE_DMA,
946 	},
947 	[2] = {
948 		.start = IRQ_SPI0,
949 		.end   = IRQ_SPI0,
950 		.flags = IORESOURCE_IRQ,
951 	}
952 };
953 
954 /* SPI (1) */
955 static struct resource bfin_spi1_resource[] = {
956 	[0] = {
957 		.start = SPI1_REGBASE,
958 		.end   = SPI1_REGBASE + 0xFF,
959 		.flags = IORESOURCE_MEM,
960 	},
961 	[1] = {
962 		.start = CH_SPI1,
963 		.end   = CH_SPI1,
964 		.flags = IORESOURCE_DMA,
965 	},
966 	[2] = {
967 		.start = IRQ_SPI1,
968 		.end   = IRQ_SPI1,
969 		.flags = IORESOURCE_IRQ,
970 	}
971 };
972 
973 /* SPI controller data */
974 static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
975 	.num_chipselect = 4,
976 	.enable_dma = 1,  /* master has the ability to do dma transfer */
977 	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
978 };
979 
980 static struct platform_device bf54x_spi_master0 = {
981 	.name = "bfin-spi",
982 	.id = 0, /* Bus number */
983 	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
984 	.resource = bfin_spi0_resource,
985 	.dev = {
986 		.platform_data = &bf54x_spi_master_info0, /* Passed to driver */
987 		},
988 };
989 
990 static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
991 	.num_chipselect = 4,
992 	.enable_dma = 1,  /* master has the ability to do dma transfer */
993 	.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
994 };
995 
996 static struct platform_device bf54x_spi_master1 = {
997 	.name = "bfin-spi",
998 	.id = 1, /* Bus number */
999 	.num_resources = ARRAY_SIZE(bfin_spi1_resource),
1000 	.resource = bfin_spi1_resource,
1001 	.dev = {
1002 		.platform_data = &bf54x_spi_master_info1, /* Passed to driver */
1003 		},
1004 };
1005 #endif  /* spi master and devices */
1006 
1007 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
1008 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1009 
1010 static struct resource bfin_twi0_resource[] = {
1011 	[0] = {
1012 		.start = TWI0_REGBASE,
1013 		.end   = TWI0_REGBASE + 0xFF,
1014 		.flags = IORESOURCE_MEM,
1015 	},
1016 	[1] = {
1017 		.start = IRQ_TWI0,
1018 		.end   = IRQ_TWI0,
1019 		.flags = IORESOURCE_IRQ,
1020 	},
1021 };
1022 
1023 static struct platform_device i2c_bfin_twi0_device = {
1024 	.name = "i2c-bfin-twi",
1025 	.id = 0,
1026 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
1027 	.resource = bfin_twi0_resource,
1028 	.dev = {
1029 		.platform_data = &bfin_twi0_pins,
1030 	},
1031 };
1032 
1033 #if !defined(CONFIG_BF542)	/* The BF542 only has 1 TWI */
1034 static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1035 
1036 static struct resource bfin_twi1_resource[] = {
1037 	[0] = {
1038 		.start = TWI1_REGBASE,
1039 		.end   = TWI1_REGBASE + 0xFF,
1040 		.flags = IORESOURCE_MEM,
1041 	},
1042 	[1] = {
1043 		.start = IRQ_TWI1,
1044 		.end   = IRQ_TWI1,
1045 		.flags = IORESOURCE_IRQ,
1046 	},
1047 };
1048 
1049 static struct platform_device i2c_bfin_twi1_device = {
1050 	.name = "i2c-bfin-twi",
1051 	.id = 1,
1052 	.num_resources = ARRAY_SIZE(bfin_twi1_resource),
1053 	.resource = bfin_twi1_resource,
1054 	.dev = {
1055 		.platform_data = &bfin_twi1_pins,
1056 	},
1057 };
1058 #endif
1059 #endif
1060 
1061 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
1062 #include <linux/gpio_keys.h>
1063 
1064 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1065 	{BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
1066 };
1067 
1068 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1069 	.buttons        = bfin_gpio_keys_table,
1070 	.nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
1071 };
1072 
1073 static struct platform_device bfin_device_gpiokeys = {
1074 	.name      = "gpio-keys",
1075 	.dev = {
1076 		.platform_data = &bfin_gpio_keys_data,
1077 	},
1078 };
1079 #endif
1080 
1081 static const unsigned int cclk_vlev_datasheet[] =
1082 {
1083 /*
1084  * Internal VLEV BF54XSBBC1533
1085  ****temporarily using these values until data sheet is updated
1086  */
1087 	VRPAIR(VLEV_085, 150000000),
1088 	VRPAIR(VLEV_090, 250000000),
1089 	VRPAIR(VLEV_110, 276000000),
1090 	VRPAIR(VLEV_115, 301000000),
1091 	VRPAIR(VLEV_120, 525000000),
1092 	VRPAIR(VLEV_125, 550000000),
1093 	VRPAIR(VLEV_130, 600000000),
1094 };
1095 
1096 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1097 	.tuple_tab = cclk_vlev_datasheet,
1098 	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1099 	.vr_settling_time = 25 /* us */,
1100 };
1101 
1102 static struct platform_device bfin_dpmc = {
1103 	.name = "bfin dpmc",
1104 	.dev = {
1105 		.platform_data = &bfin_dmpc_vreg_data,
1106 	},
1107 };
1108 
1109 static struct platform_device *cm_bf548_devices[] __initdata = {
1110 
1111 	&bfin_dpmc,
1112 
1113 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
1114 	&rtc_device,
1115 #endif
1116 
1117 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
1118 #ifdef CONFIG_SERIAL_BFIN_UART0
1119 	&bfin_uart0_device,
1120 #endif
1121 #ifdef CONFIG_SERIAL_BFIN_UART1
1122 	&bfin_uart1_device,
1123 #endif
1124 #ifdef CONFIG_SERIAL_BFIN_UART2
1125 	&bfin_uart2_device,
1126 #endif
1127 #ifdef CONFIG_SERIAL_BFIN_UART3
1128 	&bfin_uart3_device,
1129 #endif
1130 #endif
1131 
1132 #if IS_ENABLED(CONFIG_BFIN_SIR)
1133 #ifdef CONFIG_BFIN_SIR0
1134 	&bfin_sir0_device,
1135 #endif
1136 #ifdef CONFIG_BFIN_SIR1
1137 	&bfin_sir1_device,
1138 #endif
1139 #ifdef CONFIG_BFIN_SIR2
1140 	&bfin_sir2_device,
1141 #endif
1142 #ifdef CONFIG_BFIN_SIR3
1143 	&bfin_sir3_device,
1144 #endif
1145 #endif
1146 
1147 #if IS_ENABLED(CONFIG_FB_BF54X_LQ043)
1148 	&bf54x_lq043_device,
1149 #endif
1150 
1151 #if IS_ENABLED(CONFIG_SMSC911X)
1152 	&smsc911x_device,
1153 #endif
1154 
1155 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
1156 	&musb_device,
1157 #endif
1158 
1159 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
1160 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1161 	&bfin_sport0_uart_device,
1162 #endif
1163 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1164 	&bfin_sport1_uart_device,
1165 #endif
1166 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1167 	&bfin_sport2_uart_device,
1168 #endif
1169 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1170 	&bfin_sport3_uart_device,
1171 #endif
1172 #endif
1173 
1174 #if IS_ENABLED(CONFIG_PATA_BF54X)
1175 	&bfin_atapi_device,
1176 #endif
1177 
1178 #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
1179 	&bf5xx_nand_device,
1180 #endif
1181 
1182 #if IS_ENABLED(CONFIG_SDH_BFIN)
1183 	&bf54x_sdh_device,
1184 #endif
1185 
1186 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
1187 	&bf54x_spi_master0,
1188 	&bf54x_spi_master1,
1189 #endif
1190 
1191 #if IS_ENABLED(CONFIG_KEYBOARD_BFIN)
1192 	&bf54x_kpad_device,
1193 #endif
1194 
1195 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
1196 	&i2c_bfin_twi0_device,
1197 #if !defined(CONFIG_BF542)
1198 	&i2c_bfin_twi1_device,
1199 #endif
1200 #endif
1201 
1202 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
1203 	&bfin_device_gpiokeys,
1204 #endif
1205 
1206 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
1207 	&para_flash_device,
1208 #endif
1209 
1210 #if IS_ENABLED(CONFIG_CAN_BFIN)
1211 	&bfin_can_device,
1212 #endif
1213 
1214 };
1215 
cm_bf548_init(void)1216 static int __init cm_bf548_init(void)
1217 {
1218 	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1219 	platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
1220 
1221 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
1222 	spi_register_board_info(bf54x_spi_board_info,
1223 			ARRAY_SIZE(bf54x_spi_board_info));
1224 #endif
1225 
1226 	return 0;
1227 }
1228 
1229 arch_initcall(cm_bf548_init);
1230 
1231 static struct platform_device *cm_bf548_early_devices[] __initdata = {
1232 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1233 #ifdef CONFIG_SERIAL_BFIN_UART0
1234 	&bfin_uart0_device,
1235 #endif
1236 #ifdef CONFIG_SERIAL_BFIN_UART1
1237 	&bfin_uart1_device,
1238 #endif
1239 #ifdef CONFIG_SERIAL_BFIN_UART2
1240 	&bfin_uart2_device,
1241 #endif
1242 #ifdef CONFIG_SERIAL_BFIN_UART3
1243 	&bfin_uart3_device,
1244 #endif
1245 #endif
1246 
1247 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1248 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1249 	&bfin_sport0_uart_device,
1250 #endif
1251 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1252 	&bfin_sport1_uart_device,
1253 #endif
1254 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1255 	&bfin_sport2_uart_device,
1256 #endif
1257 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1258 	&bfin_sport3_uart_device,
1259 #endif
1260 #endif
1261 };
1262 
native_machine_early_platform_add_devices(void)1263 void __init native_machine_early_platform_add_devices(void)
1264 {
1265 	printk(KERN_INFO "register early platform devices\n");
1266 	early_platform_add_devices(cm_bf548_early_devices,
1267 		ARRAY_SIZE(cm_bf548_early_devices));
1268 }
1269