1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10 */
11
12 #include <linux/errno.h>
13 #include <linux/err.h>
14 #include <linux/module.h>
15 #include <linux/vmalloc.h>
16 #include <linux/fs.h>
17 #include <linux/bootmem.h>
18 #include <asm/fpu.h>
19 #include <asm/page.h>
20 #include <asm/cacheflush.h>
21 #include <asm/mmu_context.h>
22 #include <asm/pgtable.h>
23
24 #include <linux/kvm_host.h>
25
26 #include "interrupt.h"
27 #include "commpage.h"
28
29 #define CREATE_TRACE_POINTS
30 #include "trace.h"
31
32 #ifndef VECTORSPACING
33 #define VECTORSPACING 0x100 /* for EI/VI mode */
34 #endif
35
36 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x)
37 struct kvm_stats_debugfs_item debugfs_entries[] = {
38 { "wait", VCPU_STAT(wait_exits), KVM_STAT_VCPU },
39 { "cache", VCPU_STAT(cache_exits), KVM_STAT_VCPU },
40 { "signal", VCPU_STAT(signal_exits), KVM_STAT_VCPU },
41 { "interrupt", VCPU_STAT(int_exits), KVM_STAT_VCPU },
42 { "cop_unsuable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
43 { "tlbmod", VCPU_STAT(tlbmod_exits), KVM_STAT_VCPU },
44 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits), KVM_STAT_VCPU },
45 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits), KVM_STAT_VCPU },
46 { "addrerr_st", VCPU_STAT(addrerr_st_exits), KVM_STAT_VCPU },
47 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits), KVM_STAT_VCPU },
48 { "syscall", VCPU_STAT(syscall_exits), KVM_STAT_VCPU },
49 { "resvd_inst", VCPU_STAT(resvd_inst_exits), KVM_STAT_VCPU },
50 { "break_inst", VCPU_STAT(break_inst_exits), KVM_STAT_VCPU },
51 { "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
52 { "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU },
53 {NULL}
54 };
55
kvm_mips_reset_vcpu(struct kvm_vcpu * vcpu)56 static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
57 {
58 int i;
59
60 for_each_possible_cpu(i) {
61 vcpu->arch.guest_kernel_asid[i] = 0;
62 vcpu->arch.guest_user_asid[i] = 0;
63 }
64
65 return 0;
66 }
67
68 /*
69 * XXXKYMA: We are simulatoring a processor that has the WII bit set in
70 * Config7, so we are "runnable" if interrupts are pending
71 */
kvm_arch_vcpu_runnable(struct kvm_vcpu * vcpu)72 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
73 {
74 return !!(vcpu->arch.pending_exceptions);
75 }
76
kvm_arch_vcpu_should_kick(struct kvm_vcpu * vcpu)77 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
78 {
79 return 1;
80 }
81
kvm_arch_hardware_enable(void)82 int kvm_arch_hardware_enable(void)
83 {
84 return 0;
85 }
86
kvm_arch_hardware_setup(void)87 int kvm_arch_hardware_setup(void)
88 {
89 return 0;
90 }
91
kvm_arch_check_processor_compat(void * rtn)92 void kvm_arch_check_processor_compat(void *rtn)
93 {
94 *(int *)rtn = 0;
95 }
96
kvm_mips_init_tlbs(struct kvm * kvm)97 static void kvm_mips_init_tlbs(struct kvm *kvm)
98 {
99 unsigned long wired;
100
101 /*
102 * Add a wired entry to the TLB, it is used to map the commpage to
103 * the Guest kernel
104 */
105 wired = read_c0_wired();
106 write_c0_wired(wired + 1);
107 mtc0_tlbw_hazard();
108 kvm->arch.commpage_tlb = wired;
109
110 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
111 kvm->arch.commpage_tlb);
112 }
113
kvm_mips_init_vm_percpu(void * arg)114 static void kvm_mips_init_vm_percpu(void *arg)
115 {
116 struct kvm *kvm = (struct kvm *)arg;
117
118 kvm_mips_init_tlbs(kvm);
119 kvm_mips_callbacks->vm_init(kvm);
120
121 }
122
kvm_arch_init_vm(struct kvm * kvm,unsigned long type)123 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
124 {
125 if (atomic_inc_return(&kvm_mips_instance) == 1) {
126 kvm_debug("%s: 1st KVM instance, setup host TLB parameters\n",
127 __func__);
128 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
129 }
130
131 return 0;
132 }
133
kvm_mips_free_vcpus(struct kvm * kvm)134 void kvm_mips_free_vcpus(struct kvm *kvm)
135 {
136 unsigned int i;
137 struct kvm_vcpu *vcpu;
138
139 /* Put the pages we reserved for the guest pmap */
140 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
141 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
142 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
143 }
144 kfree(kvm->arch.guest_pmap);
145
146 kvm_for_each_vcpu(i, vcpu, kvm) {
147 kvm_arch_vcpu_free(vcpu);
148 }
149
150 mutex_lock(&kvm->lock);
151
152 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
153 kvm->vcpus[i] = NULL;
154
155 atomic_set(&kvm->online_vcpus, 0);
156
157 mutex_unlock(&kvm->lock);
158 }
159
kvm_mips_uninit_tlbs(void * arg)160 static void kvm_mips_uninit_tlbs(void *arg)
161 {
162 /* Restore wired count */
163 write_c0_wired(0);
164 mtc0_tlbw_hazard();
165 /* Clear out all the TLBs */
166 kvm_local_flush_tlb_all();
167 }
168
kvm_arch_destroy_vm(struct kvm * kvm)169 void kvm_arch_destroy_vm(struct kvm *kvm)
170 {
171 kvm_mips_free_vcpus(kvm);
172
173 /* If this is the last instance, restore wired count */
174 if (atomic_dec_return(&kvm_mips_instance) == 0) {
175 kvm_debug("%s: last KVM instance, restoring TLB parameters\n",
176 __func__);
177 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
178 }
179 }
180
kvm_arch_dev_ioctl(struct file * filp,unsigned int ioctl,unsigned long arg)181 long kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl,
182 unsigned long arg)
183 {
184 return -ENOIOCTLCMD;
185 }
186
kvm_arch_create_memslot(struct kvm * kvm,struct kvm_memory_slot * slot,unsigned long npages)187 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
188 unsigned long npages)
189 {
190 return 0;
191 }
192
kvm_arch_prepare_memory_region(struct kvm * kvm,struct kvm_memory_slot * memslot,struct kvm_userspace_memory_region * mem,enum kvm_mr_change change)193 int kvm_arch_prepare_memory_region(struct kvm *kvm,
194 struct kvm_memory_slot *memslot,
195 struct kvm_userspace_memory_region *mem,
196 enum kvm_mr_change change)
197 {
198 return 0;
199 }
200
kvm_arch_commit_memory_region(struct kvm * kvm,struct kvm_userspace_memory_region * mem,const struct kvm_memory_slot * old,enum kvm_mr_change change)201 void kvm_arch_commit_memory_region(struct kvm *kvm,
202 struct kvm_userspace_memory_region *mem,
203 const struct kvm_memory_slot *old,
204 enum kvm_mr_change change)
205 {
206 unsigned long npages = 0;
207 int i;
208
209 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
210 __func__, kvm, mem->slot, mem->guest_phys_addr,
211 mem->memory_size, mem->userspace_addr);
212
213 /* Setup Guest PMAP table */
214 if (!kvm->arch.guest_pmap) {
215 if (mem->slot == 0)
216 npages = mem->memory_size >> PAGE_SHIFT;
217
218 if (npages) {
219 kvm->arch.guest_pmap_npages = npages;
220 kvm->arch.guest_pmap =
221 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
222
223 if (!kvm->arch.guest_pmap) {
224 kvm_err("Failed to allocate guest PMAP");
225 return;
226 }
227
228 kvm_debug("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
229 npages, kvm->arch.guest_pmap);
230
231 /* Now setup the page table */
232 for (i = 0; i < npages; i++)
233 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
234 }
235 }
236 }
237
kvm_arch_vcpu_create(struct kvm * kvm,unsigned int id)238 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
239 {
240 int err, size, offset;
241 void *gebase;
242 int i;
243
244 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
245
246 if (!vcpu) {
247 err = -ENOMEM;
248 goto out;
249 }
250
251 err = kvm_vcpu_init(vcpu, kvm, id);
252
253 if (err)
254 goto out_free_cpu;
255
256 kvm_debug("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
257
258 /*
259 * Allocate space for host mode exception handlers that handle
260 * guest mode exits
261 */
262 if (cpu_has_veic || cpu_has_vint)
263 size = 0x200 + VECTORSPACING * 64;
264 else
265 size = 0x4000;
266
267 /* Save Linux EBASE */
268 vcpu->arch.host_ebase = (void *)read_c0_ebase();
269
270 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
271
272 if (!gebase) {
273 err = -ENOMEM;
274 goto out_free_cpu;
275 }
276 kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",
277 ALIGN(size, PAGE_SIZE), gebase);
278
279 /* Save new ebase */
280 vcpu->arch.guest_ebase = gebase;
281
282 /* Copy L1 Guest Exception handler to correct offset */
283
284 /* TLB Refill, EXL = 0 */
285 memcpy(gebase, mips32_exception,
286 mips32_exceptionEnd - mips32_exception);
287
288 /* General Exception Entry point */
289 memcpy(gebase + 0x180, mips32_exception,
290 mips32_exceptionEnd - mips32_exception);
291
292 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
293 for (i = 0; i < 8; i++) {
294 kvm_debug("L1 Vectored handler @ %p\n",
295 gebase + 0x200 + (i * VECTORSPACING));
296 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
297 mips32_exceptionEnd - mips32_exception);
298 }
299
300 /* General handler, relocate to unmapped space for sanity's sake */
301 offset = 0x2000;
302 kvm_debug("Installing KVM Exception handlers @ %p, %#x bytes\n",
303 gebase + offset,
304 mips32_GuestExceptionEnd - mips32_GuestException);
305
306 memcpy(gebase + offset, mips32_GuestException,
307 mips32_GuestExceptionEnd - mips32_GuestException);
308
309 #ifdef MODULE
310 offset += mips32_GuestExceptionEnd - mips32_GuestException;
311 memcpy(gebase + offset, (char *)__kvm_mips_vcpu_run,
312 __kvm_mips_vcpu_run_end - (char *)__kvm_mips_vcpu_run);
313 vcpu->arch.vcpu_run = gebase + offset;
314 #else
315 vcpu->arch.vcpu_run = __kvm_mips_vcpu_run;
316 #endif
317
318 /* Invalidate the icache for these ranges */
319 local_flush_icache_range((unsigned long)gebase,
320 (unsigned long)gebase + ALIGN(size, PAGE_SIZE));
321
322 /*
323 * Allocate comm page for guest kernel, a TLB will be reserved for
324 * mapping GVA @ 0xFFFF8000 to this page
325 */
326 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
327
328 if (!vcpu->arch.kseg0_commpage) {
329 err = -ENOMEM;
330 goto out_free_gebase;
331 }
332
333 kvm_debug("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
334 kvm_mips_commpage_init(vcpu);
335
336 /* Init */
337 vcpu->arch.last_sched_cpu = -1;
338
339 /* Start off the timer */
340 kvm_mips_init_count(vcpu);
341
342 return vcpu;
343
344 out_free_gebase:
345 kfree(gebase);
346
347 out_free_cpu:
348 kfree(vcpu);
349
350 out:
351 return ERR_PTR(err);
352 }
353
kvm_arch_vcpu_free(struct kvm_vcpu * vcpu)354 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
355 {
356 hrtimer_cancel(&vcpu->arch.comparecount_timer);
357
358 kvm_vcpu_uninit(vcpu);
359
360 kvm_mips_dump_stats(vcpu);
361
362 kfree(vcpu->arch.guest_ebase);
363 kfree(vcpu->arch.kseg0_commpage);
364 kfree(vcpu);
365 }
366
kvm_arch_vcpu_destroy(struct kvm_vcpu * vcpu)367 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
368 {
369 kvm_arch_vcpu_free(vcpu);
370 }
371
kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu * vcpu,struct kvm_guest_debug * dbg)372 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
373 struct kvm_guest_debug *dbg)
374 {
375 return -ENOIOCTLCMD;
376 }
377
kvm_arch_vcpu_ioctl_run(struct kvm_vcpu * vcpu,struct kvm_run * run)378 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
379 {
380 int r = 0;
381 sigset_t sigsaved;
382
383 if (vcpu->sigset_active)
384 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
385
386 if (vcpu->mmio_needed) {
387 if (!vcpu->mmio_is_write)
388 kvm_mips_complete_mmio_load(vcpu, run);
389 vcpu->mmio_needed = 0;
390 }
391
392 lose_fpu(1);
393
394 local_irq_disable();
395 /* Check if we have any exceptions/interrupts pending */
396 kvm_mips_deliver_interrupts(vcpu,
397 kvm_read_c0_guest_cause(vcpu->arch.cop0));
398
399 kvm_guest_enter();
400
401 /* Disable hardware page table walking while in guest */
402 htw_stop();
403
404 r = vcpu->arch.vcpu_run(run, vcpu);
405
406 /* Re-enable HTW before enabling interrupts */
407 htw_start();
408
409 kvm_guest_exit();
410 local_irq_enable();
411
412 if (vcpu->sigset_active)
413 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
414
415 return r;
416 }
417
kvm_vcpu_ioctl_interrupt(struct kvm_vcpu * vcpu,struct kvm_mips_interrupt * irq)418 int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
419 struct kvm_mips_interrupt *irq)
420 {
421 int intr = (int)irq->irq;
422 struct kvm_vcpu *dvcpu = NULL;
423
424 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
425 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
426 (int)intr);
427
428 if (irq->cpu == -1)
429 dvcpu = vcpu;
430 else
431 dvcpu = vcpu->kvm->vcpus[irq->cpu];
432
433 if (intr == 2 || intr == 3 || intr == 4) {
434 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
435
436 } else if (intr == -2 || intr == -3 || intr == -4) {
437 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
438 } else {
439 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
440 irq->cpu, irq->irq);
441 return -EINVAL;
442 }
443
444 dvcpu->arch.wait = 0;
445
446 if (waitqueue_active(&dvcpu->wq))
447 wake_up_interruptible(&dvcpu->wq);
448
449 return 0;
450 }
451
kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu * vcpu,struct kvm_mp_state * mp_state)452 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
453 struct kvm_mp_state *mp_state)
454 {
455 return -ENOIOCTLCMD;
456 }
457
kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu * vcpu,struct kvm_mp_state * mp_state)458 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
459 struct kvm_mp_state *mp_state)
460 {
461 return -ENOIOCTLCMD;
462 }
463
464 static u64 kvm_mips_get_one_regs[] = {
465 KVM_REG_MIPS_R0,
466 KVM_REG_MIPS_R1,
467 KVM_REG_MIPS_R2,
468 KVM_REG_MIPS_R3,
469 KVM_REG_MIPS_R4,
470 KVM_REG_MIPS_R5,
471 KVM_REG_MIPS_R6,
472 KVM_REG_MIPS_R7,
473 KVM_REG_MIPS_R8,
474 KVM_REG_MIPS_R9,
475 KVM_REG_MIPS_R10,
476 KVM_REG_MIPS_R11,
477 KVM_REG_MIPS_R12,
478 KVM_REG_MIPS_R13,
479 KVM_REG_MIPS_R14,
480 KVM_REG_MIPS_R15,
481 KVM_REG_MIPS_R16,
482 KVM_REG_MIPS_R17,
483 KVM_REG_MIPS_R18,
484 KVM_REG_MIPS_R19,
485 KVM_REG_MIPS_R20,
486 KVM_REG_MIPS_R21,
487 KVM_REG_MIPS_R22,
488 KVM_REG_MIPS_R23,
489 KVM_REG_MIPS_R24,
490 KVM_REG_MIPS_R25,
491 KVM_REG_MIPS_R26,
492 KVM_REG_MIPS_R27,
493 KVM_REG_MIPS_R28,
494 KVM_REG_MIPS_R29,
495 KVM_REG_MIPS_R30,
496 KVM_REG_MIPS_R31,
497
498 KVM_REG_MIPS_HI,
499 KVM_REG_MIPS_LO,
500 KVM_REG_MIPS_PC,
501
502 KVM_REG_MIPS_CP0_INDEX,
503 KVM_REG_MIPS_CP0_CONTEXT,
504 KVM_REG_MIPS_CP0_USERLOCAL,
505 KVM_REG_MIPS_CP0_PAGEMASK,
506 KVM_REG_MIPS_CP0_WIRED,
507 KVM_REG_MIPS_CP0_HWRENA,
508 KVM_REG_MIPS_CP0_BADVADDR,
509 KVM_REG_MIPS_CP0_COUNT,
510 KVM_REG_MIPS_CP0_ENTRYHI,
511 KVM_REG_MIPS_CP0_COMPARE,
512 KVM_REG_MIPS_CP0_STATUS,
513 KVM_REG_MIPS_CP0_CAUSE,
514 KVM_REG_MIPS_CP0_EPC,
515 KVM_REG_MIPS_CP0_CONFIG,
516 KVM_REG_MIPS_CP0_CONFIG1,
517 KVM_REG_MIPS_CP0_CONFIG2,
518 KVM_REG_MIPS_CP0_CONFIG3,
519 KVM_REG_MIPS_CP0_CONFIG7,
520 KVM_REG_MIPS_CP0_ERROREPC,
521
522 KVM_REG_MIPS_COUNT_CTL,
523 KVM_REG_MIPS_COUNT_RESUME,
524 KVM_REG_MIPS_COUNT_HZ,
525 };
526
kvm_mips_get_reg(struct kvm_vcpu * vcpu,const struct kvm_one_reg * reg)527 static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
528 const struct kvm_one_reg *reg)
529 {
530 struct mips_coproc *cop0 = vcpu->arch.cop0;
531 int ret;
532 s64 v;
533
534 switch (reg->id) {
535 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
536 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
537 break;
538 case KVM_REG_MIPS_HI:
539 v = (long)vcpu->arch.hi;
540 break;
541 case KVM_REG_MIPS_LO:
542 v = (long)vcpu->arch.lo;
543 break;
544 case KVM_REG_MIPS_PC:
545 v = (long)vcpu->arch.pc;
546 break;
547
548 case KVM_REG_MIPS_CP0_INDEX:
549 v = (long)kvm_read_c0_guest_index(cop0);
550 break;
551 case KVM_REG_MIPS_CP0_CONTEXT:
552 v = (long)kvm_read_c0_guest_context(cop0);
553 break;
554 case KVM_REG_MIPS_CP0_USERLOCAL:
555 v = (long)kvm_read_c0_guest_userlocal(cop0);
556 break;
557 case KVM_REG_MIPS_CP0_PAGEMASK:
558 v = (long)kvm_read_c0_guest_pagemask(cop0);
559 break;
560 case KVM_REG_MIPS_CP0_WIRED:
561 v = (long)kvm_read_c0_guest_wired(cop0);
562 break;
563 case KVM_REG_MIPS_CP0_HWRENA:
564 v = (long)kvm_read_c0_guest_hwrena(cop0);
565 break;
566 case KVM_REG_MIPS_CP0_BADVADDR:
567 v = (long)kvm_read_c0_guest_badvaddr(cop0);
568 break;
569 case KVM_REG_MIPS_CP0_ENTRYHI:
570 v = (long)kvm_read_c0_guest_entryhi(cop0);
571 break;
572 case KVM_REG_MIPS_CP0_COMPARE:
573 v = (long)kvm_read_c0_guest_compare(cop0);
574 break;
575 case KVM_REG_MIPS_CP0_STATUS:
576 v = (long)kvm_read_c0_guest_status(cop0);
577 break;
578 case KVM_REG_MIPS_CP0_CAUSE:
579 v = (long)kvm_read_c0_guest_cause(cop0);
580 break;
581 case KVM_REG_MIPS_CP0_EPC:
582 v = (long)kvm_read_c0_guest_epc(cop0);
583 break;
584 case KVM_REG_MIPS_CP0_ERROREPC:
585 v = (long)kvm_read_c0_guest_errorepc(cop0);
586 break;
587 case KVM_REG_MIPS_CP0_CONFIG:
588 v = (long)kvm_read_c0_guest_config(cop0);
589 break;
590 case KVM_REG_MIPS_CP0_CONFIG1:
591 v = (long)kvm_read_c0_guest_config1(cop0);
592 break;
593 case KVM_REG_MIPS_CP0_CONFIG2:
594 v = (long)kvm_read_c0_guest_config2(cop0);
595 break;
596 case KVM_REG_MIPS_CP0_CONFIG3:
597 v = (long)kvm_read_c0_guest_config3(cop0);
598 break;
599 case KVM_REG_MIPS_CP0_CONFIG7:
600 v = (long)kvm_read_c0_guest_config7(cop0);
601 break;
602 /* registers to be handled specially */
603 case KVM_REG_MIPS_CP0_COUNT:
604 case KVM_REG_MIPS_COUNT_CTL:
605 case KVM_REG_MIPS_COUNT_RESUME:
606 case KVM_REG_MIPS_COUNT_HZ:
607 ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
608 if (ret)
609 return ret;
610 break;
611 default:
612 return -EINVAL;
613 }
614 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
615 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
616
617 return put_user(v, uaddr64);
618 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
619 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
620 u32 v32 = (u32)v;
621
622 return put_user(v32, uaddr32);
623 } else {
624 return -EINVAL;
625 }
626 }
627
kvm_mips_set_reg(struct kvm_vcpu * vcpu,const struct kvm_one_reg * reg)628 static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
629 const struct kvm_one_reg *reg)
630 {
631 struct mips_coproc *cop0 = vcpu->arch.cop0;
632 u64 v;
633
634 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
635 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
636
637 if (get_user(v, uaddr64) != 0)
638 return -EFAULT;
639 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
640 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
641 s32 v32;
642
643 if (get_user(v32, uaddr32) != 0)
644 return -EFAULT;
645 v = (s64)v32;
646 } else {
647 return -EINVAL;
648 }
649
650 switch (reg->id) {
651 case KVM_REG_MIPS_R0:
652 /* Silently ignore requests to set $0 */
653 break;
654 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
655 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
656 break;
657 case KVM_REG_MIPS_HI:
658 vcpu->arch.hi = v;
659 break;
660 case KVM_REG_MIPS_LO:
661 vcpu->arch.lo = v;
662 break;
663 case KVM_REG_MIPS_PC:
664 vcpu->arch.pc = v;
665 break;
666
667 case KVM_REG_MIPS_CP0_INDEX:
668 kvm_write_c0_guest_index(cop0, v);
669 break;
670 case KVM_REG_MIPS_CP0_CONTEXT:
671 kvm_write_c0_guest_context(cop0, v);
672 break;
673 case KVM_REG_MIPS_CP0_USERLOCAL:
674 kvm_write_c0_guest_userlocal(cop0, v);
675 break;
676 case KVM_REG_MIPS_CP0_PAGEMASK:
677 kvm_write_c0_guest_pagemask(cop0, v);
678 break;
679 case KVM_REG_MIPS_CP0_WIRED:
680 kvm_write_c0_guest_wired(cop0, v);
681 break;
682 case KVM_REG_MIPS_CP0_HWRENA:
683 kvm_write_c0_guest_hwrena(cop0, v);
684 break;
685 case KVM_REG_MIPS_CP0_BADVADDR:
686 kvm_write_c0_guest_badvaddr(cop0, v);
687 break;
688 case KVM_REG_MIPS_CP0_ENTRYHI:
689 kvm_write_c0_guest_entryhi(cop0, v);
690 break;
691 case KVM_REG_MIPS_CP0_STATUS:
692 kvm_write_c0_guest_status(cop0, v);
693 break;
694 case KVM_REG_MIPS_CP0_EPC:
695 kvm_write_c0_guest_epc(cop0, v);
696 break;
697 case KVM_REG_MIPS_CP0_ERROREPC:
698 kvm_write_c0_guest_errorepc(cop0, v);
699 break;
700 /* registers to be handled specially */
701 case KVM_REG_MIPS_CP0_COUNT:
702 case KVM_REG_MIPS_CP0_COMPARE:
703 case KVM_REG_MIPS_CP0_CAUSE:
704 case KVM_REG_MIPS_COUNT_CTL:
705 case KVM_REG_MIPS_COUNT_RESUME:
706 case KVM_REG_MIPS_COUNT_HZ:
707 return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
708 default:
709 return -EINVAL;
710 }
711 return 0;
712 }
713
kvm_arch_vcpu_ioctl(struct file * filp,unsigned int ioctl,unsigned long arg)714 long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl,
715 unsigned long arg)
716 {
717 struct kvm_vcpu *vcpu = filp->private_data;
718 void __user *argp = (void __user *)arg;
719 long r;
720
721 switch (ioctl) {
722 case KVM_SET_ONE_REG:
723 case KVM_GET_ONE_REG: {
724 struct kvm_one_reg reg;
725
726 if (copy_from_user(®, argp, sizeof(reg)))
727 return -EFAULT;
728 if (ioctl == KVM_SET_ONE_REG)
729 return kvm_mips_set_reg(vcpu, ®);
730 else
731 return kvm_mips_get_reg(vcpu, ®);
732 }
733 case KVM_GET_REG_LIST: {
734 struct kvm_reg_list __user *user_list = argp;
735 u64 __user *reg_dest;
736 struct kvm_reg_list reg_list;
737 unsigned n;
738
739 if (copy_from_user(®_list, user_list, sizeof(reg_list)))
740 return -EFAULT;
741 n = reg_list.n;
742 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
743 if (copy_to_user(user_list, ®_list, sizeof(reg_list)))
744 return -EFAULT;
745 if (n < reg_list.n)
746 return -E2BIG;
747 reg_dest = user_list->reg;
748 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
749 sizeof(kvm_mips_get_one_regs)))
750 return -EFAULT;
751 return 0;
752 }
753 case KVM_NMI:
754 /* Treat the NMI as a CPU reset */
755 r = kvm_mips_reset_vcpu(vcpu);
756 break;
757 case KVM_INTERRUPT:
758 {
759 struct kvm_mips_interrupt irq;
760
761 r = -EFAULT;
762 if (copy_from_user(&irq, argp, sizeof(irq)))
763 goto out;
764
765 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
766 irq.irq);
767
768 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
769 break;
770 }
771 default:
772 r = -ENOIOCTLCMD;
773 }
774
775 out:
776 return r;
777 }
778
779 /* Get (and clear) the dirty memory log for a memory slot. */
kvm_vm_ioctl_get_dirty_log(struct kvm * kvm,struct kvm_dirty_log * log)780 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
781 {
782 struct kvm_memory_slot *memslot;
783 unsigned long ga, ga_end;
784 int is_dirty = 0;
785 int r;
786 unsigned long n;
787
788 mutex_lock(&kvm->slots_lock);
789
790 r = kvm_get_dirty_log(kvm, log, &is_dirty);
791 if (r)
792 goto out;
793
794 /* If nothing is dirty, don't bother messing with page tables. */
795 if (is_dirty) {
796 memslot = id_to_memslot(kvm->memslots, log->slot);
797
798 ga = memslot->base_gfn << PAGE_SHIFT;
799 ga_end = ga + (memslot->npages << PAGE_SHIFT);
800
801 kvm_info("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
802 ga_end);
803
804 n = kvm_dirty_bitmap_bytes(memslot);
805 memset(memslot->dirty_bitmap, 0, n);
806 }
807
808 r = 0;
809 out:
810 mutex_unlock(&kvm->slots_lock);
811 return r;
812
813 }
814
kvm_arch_vm_ioctl(struct file * filp,unsigned int ioctl,unsigned long arg)815 long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
816 {
817 long r;
818
819 switch (ioctl) {
820 default:
821 r = -ENOIOCTLCMD;
822 }
823
824 return r;
825 }
826
kvm_arch_init(void * opaque)827 int kvm_arch_init(void *opaque)
828 {
829 if (kvm_mips_callbacks) {
830 kvm_err("kvm: module already exists\n");
831 return -EEXIST;
832 }
833
834 return kvm_mips_emulation_init(&kvm_mips_callbacks);
835 }
836
kvm_arch_exit(void)837 void kvm_arch_exit(void)
838 {
839 kvm_mips_callbacks = NULL;
840 }
841
kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)842 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
843 struct kvm_sregs *sregs)
844 {
845 return -ENOIOCTLCMD;
846 }
847
kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)848 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
849 struct kvm_sregs *sregs)
850 {
851 return -ENOIOCTLCMD;
852 }
853
kvm_arch_vcpu_postcreate(struct kvm_vcpu * vcpu)854 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
855 {
856 return 0;
857 }
858
kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu * vcpu,struct kvm_fpu * fpu)859 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
860 {
861 return -ENOIOCTLCMD;
862 }
863
kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu * vcpu,struct kvm_fpu * fpu)864 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
865 {
866 return -ENOIOCTLCMD;
867 }
868
kvm_arch_vcpu_fault(struct kvm_vcpu * vcpu,struct vm_fault * vmf)869 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
870 {
871 return VM_FAULT_SIGBUS;
872 }
873
kvm_vm_ioctl_check_extension(struct kvm * kvm,long ext)874 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
875 {
876 int r;
877
878 switch (ext) {
879 case KVM_CAP_ONE_REG:
880 r = 1;
881 break;
882 case KVM_CAP_COALESCED_MMIO:
883 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
884 break;
885 default:
886 r = 0;
887 break;
888 }
889 return r;
890 }
891
kvm_cpu_has_pending_timer(struct kvm_vcpu * vcpu)892 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
893 {
894 return kvm_mips_pending_timer(vcpu);
895 }
896
kvm_arch_vcpu_dump_regs(struct kvm_vcpu * vcpu)897 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
898 {
899 int i;
900 struct mips_coproc *cop0;
901
902 if (!vcpu)
903 return -1;
904
905 kvm_debug("VCPU Register Dump:\n");
906 kvm_debug("\tpc = 0x%08lx\n", vcpu->arch.pc);
907 kvm_debug("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
908
909 for (i = 0; i < 32; i += 4) {
910 kvm_debug("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
911 vcpu->arch.gprs[i],
912 vcpu->arch.gprs[i + 1],
913 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
914 }
915 kvm_debug("\thi: 0x%08lx\n", vcpu->arch.hi);
916 kvm_debug("\tlo: 0x%08lx\n", vcpu->arch.lo);
917
918 cop0 = vcpu->arch.cop0;
919 kvm_debug("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
920 kvm_read_c0_guest_status(cop0),
921 kvm_read_c0_guest_cause(cop0));
922
923 kvm_debug("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
924
925 return 0;
926 }
927
kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu * vcpu,struct kvm_regs * regs)928 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
929 {
930 int i;
931
932 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
933 vcpu->arch.gprs[i] = regs->gpr[i];
934 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
935 vcpu->arch.hi = regs->hi;
936 vcpu->arch.lo = regs->lo;
937 vcpu->arch.pc = regs->pc;
938
939 return 0;
940 }
941
kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu * vcpu,struct kvm_regs * regs)942 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
943 {
944 int i;
945
946 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
947 regs->gpr[i] = vcpu->arch.gprs[i];
948
949 regs->hi = vcpu->arch.hi;
950 regs->lo = vcpu->arch.lo;
951 regs->pc = vcpu->arch.pc;
952
953 return 0;
954 }
955
kvm_mips_comparecount_func(unsigned long data)956 static void kvm_mips_comparecount_func(unsigned long data)
957 {
958 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
959
960 kvm_mips_callbacks->queue_timer_int(vcpu);
961
962 vcpu->arch.wait = 0;
963 if (waitqueue_active(&vcpu->wq))
964 wake_up_interruptible(&vcpu->wq);
965 }
966
967 /* low level hrtimer wake routine */
kvm_mips_comparecount_wakeup(struct hrtimer * timer)968 static enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
969 {
970 struct kvm_vcpu *vcpu;
971
972 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
973 kvm_mips_comparecount_func((unsigned long) vcpu);
974 return kvm_mips_count_timeout(vcpu);
975 }
976
kvm_arch_vcpu_init(struct kvm_vcpu * vcpu)977 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
978 {
979 kvm_mips_callbacks->vcpu_init(vcpu);
980 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
981 HRTIMER_MODE_REL);
982 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
983 return 0;
984 }
985
kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu * vcpu,struct kvm_translation * tr)986 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
987 struct kvm_translation *tr)
988 {
989 return 0;
990 }
991
992 /* Initial guest state */
kvm_arch_vcpu_setup(struct kvm_vcpu * vcpu)993 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
994 {
995 return kvm_mips_callbacks->vcpu_setup(vcpu);
996 }
997
kvm_mips_set_c0_status(void)998 static void kvm_mips_set_c0_status(void)
999 {
1000 uint32_t status = read_c0_status();
1001
1002 if (cpu_has_dsp)
1003 status |= (ST0_MX);
1004
1005 write_c0_status(status);
1006 ehb();
1007 }
1008
1009 /*
1010 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1011 */
kvm_mips_handle_exit(struct kvm_run * run,struct kvm_vcpu * vcpu)1012 int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1013 {
1014 uint32_t cause = vcpu->arch.host_cp0_cause;
1015 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1016 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1017 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1018 enum emulation_result er = EMULATE_DONE;
1019 int ret = RESUME_GUEST;
1020
1021 /* re-enable HTW before enabling interrupts */
1022 htw_start();
1023
1024 /* Set a default exit reason */
1025 run->exit_reason = KVM_EXIT_UNKNOWN;
1026 run->ready_for_interrupt_injection = 1;
1027
1028 /*
1029 * Set the appropriate status bits based on host CPU features,
1030 * before we hit the scheduler
1031 */
1032 kvm_mips_set_c0_status();
1033
1034 local_irq_enable();
1035
1036 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1037 cause, opc, run, vcpu);
1038
1039 /*
1040 * Do a privilege check, if in UM most of these exit conditions end up
1041 * causing an exception to be delivered to the Guest Kernel
1042 */
1043 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1044 if (er == EMULATE_PRIV_FAIL) {
1045 goto skip_emul;
1046 } else if (er == EMULATE_FAIL) {
1047 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1048 ret = RESUME_HOST;
1049 goto skip_emul;
1050 }
1051
1052 switch (exccode) {
1053 case T_INT:
1054 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1055
1056 ++vcpu->stat.int_exits;
1057 trace_kvm_exit(vcpu, INT_EXITS);
1058
1059 if (need_resched())
1060 cond_resched();
1061
1062 ret = RESUME_GUEST;
1063 break;
1064
1065 case T_COP_UNUSABLE:
1066 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1067
1068 ++vcpu->stat.cop_unusable_exits;
1069 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1070 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1071 /* XXXKYMA: Might need to return to user space */
1072 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN)
1073 ret = RESUME_HOST;
1074 break;
1075
1076 case T_TLB_MOD:
1077 ++vcpu->stat.tlbmod_exits;
1078 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1079 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1080 break;
1081
1082 case T_TLB_ST_MISS:
1083 kvm_debug("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1084 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1085 badvaddr);
1086
1087 ++vcpu->stat.tlbmiss_st_exits;
1088 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1089 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1090 break;
1091
1092 case T_TLB_LD_MISS:
1093 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1094 cause, opc, badvaddr);
1095
1096 ++vcpu->stat.tlbmiss_ld_exits;
1097 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1098 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1099 break;
1100
1101 case T_ADDR_ERR_ST:
1102 ++vcpu->stat.addrerr_st_exits;
1103 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1104 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1105 break;
1106
1107 case T_ADDR_ERR_LD:
1108 ++vcpu->stat.addrerr_ld_exits;
1109 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1110 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1111 break;
1112
1113 case T_SYSCALL:
1114 ++vcpu->stat.syscall_exits;
1115 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1116 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1117 break;
1118
1119 case T_RES_INST:
1120 ++vcpu->stat.resvd_inst_exits;
1121 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1122 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1123 break;
1124
1125 case T_BREAK:
1126 ++vcpu->stat.break_inst_exits;
1127 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1128 ret = kvm_mips_callbacks->handle_break(vcpu);
1129 break;
1130
1131 case T_MSADIS:
1132 ret = kvm_mips_callbacks->handle_msa_disabled(vcpu);
1133 break;
1134
1135 default:
1136 kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1137 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1138 kvm_read_c0_guest_status(vcpu->arch.cop0));
1139 kvm_arch_vcpu_dump_regs(vcpu);
1140 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1141 ret = RESUME_HOST;
1142 break;
1143
1144 }
1145
1146 skip_emul:
1147 local_irq_disable();
1148
1149 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1150 kvm_mips_deliver_interrupts(vcpu, cause);
1151
1152 if (!(ret & RESUME_HOST)) {
1153 /* Only check for signals if not already exiting to userspace */
1154 if (signal_pending(current)) {
1155 run->exit_reason = KVM_EXIT_INTR;
1156 ret = (-EINTR << 2) | RESUME_HOST;
1157 ++vcpu->stat.signal_exits;
1158 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1159 }
1160 }
1161
1162 /* Disable HTW before returning to guest or host */
1163 htw_stop();
1164
1165 return ret;
1166 }
1167
kvm_mips_init(void)1168 int __init kvm_mips_init(void)
1169 {
1170 int ret;
1171
1172 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1173
1174 if (ret)
1175 return ret;
1176
1177 /*
1178 * On MIPS, kernel modules are executed from "mapped space", which
1179 * requires TLBs. The TLB handling code is statically linked with
1180 * the rest of the kernel (tlb.c) to avoid the possibility of
1181 * double faulting. The issue is that the TLB code references
1182 * routines that are part of the the KVM module, which are only
1183 * available once the module is loaded.
1184 */
1185 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1186 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1187 kvm_mips_is_error_pfn = is_error_pfn;
1188
1189 pr_info("KVM/MIPS Initialized\n");
1190 return 0;
1191 }
1192
kvm_mips_exit(void)1193 void __exit kvm_mips_exit(void)
1194 {
1195 kvm_exit();
1196
1197 kvm_mips_gfn_to_pfn = NULL;
1198 kvm_mips_release_pfn_clean = NULL;
1199 kvm_mips_is_error_pfn = NULL;
1200
1201 pr_info("KVM/MIPS unloaded\n");
1202 }
1203
1204 module_init(kvm_mips_init);
1205 module_exit(kvm_mips_exit);
1206
1207 EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
1208