1/* 2 * vDSO provided cache flush routines 3 * 4 * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org), 5 * IBM Corp. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12#include <asm/processor.h> 13#include <asm/ppc_asm.h> 14#include <asm/vdso.h> 15#include <asm/asm-offsets.h> 16 17 .text 18 19/* 20 * Default "generic" version of __kernel_sync_dicache. 21 * 22 * void __kernel_sync_dicache(unsigned long start, unsigned long end) 23 * 24 * Flushes the data cache & invalidate the instruction cache for the 25 * provided range [start, end[ 26 */ 27V_FUNCTION_BEGIN(__kernel_sync_dicache) 28 .cfi_startproc 29 mflr r12 30 .cfi_register lr,r12 31 mr r11,r3 32 bl __get_datapage@local 33 mtlr r12 34 mr r10,r3 35 36 lwz r7,CFG_DCACHE_BLOCKSZ(r10) 37 addi r5,r7,-1 38 andc r6,r11,r5 /* round low to line bdy */ 39 subf r8,r6,r4 /* compute length */ 40 add r8,r8,r5 /* ensure we get enough */ 41 lwz r9,CFG_DCACHE_LOGBLOCKSZ(r10) 42 srw. r8,r8,r9 /* compute line count */ 43 crclr cr0*4+so 44 beqlr /* nothing to do? */ 45 mtctr r8 461: dcbst 0,r6 47 add r6,r6,r7 48 bdnz 1b 49 sync 50 51/* Now invalidate the instruction cache */ 52 53 lwz r7,CFG_ICACHE_BLOCKSZ(r10) 54 addi r5,r7,-1 55 andc r6,r11,r5 /* round low to line bdy */ 56 subf r8,r6,r4 /* compute length */ 57 add r8,r8,r5 58 lwz r9,CFG_ICACHE_LOGBLOCKSZ(r10) 59 srw. r8,r8,r9 /* compute line count */ 60 crclr cr0*4+so 61 beqlr /* nothing to do? */ 62 mtctr r8 632: icbi 0,r6 64 add r6,r6,r7 65 bdnz 2b 66 isync 67 li r3,0 68 blr 69 .cfi_endproc 70V_FUNCTION_END(__kernel_sync_dicache) 71 72 73/* 74 * POWER5 version of __kernel_sync_dicache 75 */ 76V_FUNCTION_BEGIN(__kernel_sync_dicache_p5) 77 .cfi_startproc 78 crclr cr0*4+so 79 sync 80 isync 81 li r3,0 82 blr 83 .cfi_endproc 84V_FUNCTION_END(__kernel_sync_dicache_p5) 85 86