1 /*
2 * MPC8272 ADS board support
3 *
4 * Copyright 2007 Freescale Semiconductor, Inc.
5 * Author: Scott Wood <scottwood@freescale.com>
6 *
7 * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
8 * Copyright (c) 2006 MontaVista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/fsl_devices.h>
19 #include <linux/of_address.h>
20 #include <linux/of_fdt.h>
21 #include <linux/of_platform.h>
22 #include <linux/io.h>
23
24 #include <asm/cpm2.h>
25 #include <asm/udbg.h>
26 #include <asm/machdep.h>
27 #include <asm/time.h>
28
29 #include <platforms/82xx/pq2.h>
30
31 #include <sysdev/fsl_soc.h>
32 #include <sysdev/cpm2_pic.h>
33
34 #include "pq2.h"
35
mpc8272_ads_pic_init(void)36 static void __init mpc8272_ads_pic_init(void)
37 {
38 struct device_node *np = of_find_compatible_node(NULL, NULL,
39 "fsl,cpm2-pic");
40 if (!np) {
41 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
42 return;
43 }
44
45 cpm2_pic_init(np);
46 of_node_put(np);
47
48 /* Initialize stuff for the 82xx CPLD IC and install demux */
49 pq2ads_pci_init_irq();
50 }
51
52 struct cpm_pin {
53 int port, pin, flags;
54 };
55
56 static struct cpm_pin mpc8272_ads_pins[] = {
57 /* SCC1 */
58 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
59 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
60
61 /* SCC4 */
62 {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
63 {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
64
65 /* FCC1 */
66 {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
67 {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
68 {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
69 {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
70 {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
71 {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
72 {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
73 {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
74 {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
75 {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
76 {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
77 {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
78 {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
79 {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
80 {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
81 {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
82
83 /* FCC2 */
84 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
85 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
86 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
87 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
88 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
89 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
90 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
91 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
92 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
93 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
94 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
95 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
96 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
97 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
98 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
99 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
100
101 /* I2C */
102 {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
103 {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
104
105 /* USB */
106 {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
107 {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
108 {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
109 {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
110 {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
111 {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
112 {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
113 };
114
init_ioports(void)115 static void __init init_ioports(void)
116 {
117 int i;
118
119 for (i = 0; i < ARRAY_SIZE(mpc8272_ads_pins); i++) {
120 struct cpm_pin *pin = &mpc8272_ads_pins[i];
121 cpm2_set_pin(pin->port, pin->pin, pin->flags);
122 }
123
124 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
125 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
126 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_RX);
127 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX);
128 cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX);
129 cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX);
130 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
131 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
132 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX);
133 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX);
134 }
135
mpc8272_ads_setup_arch(void)136 static void __init mpc8272_ads_setup_arch(void)
137 {
138 struct device_node *np;
139 __be32 __iomem *bcsr;
140
141 if (ppc_md.progress)
142 ppc_md.progress("mpc8272_ads_setup_arch()", 0);
143
144 cpm2_reset();
145
146 np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr");
147 if (!np) {
148 printk(KERN_ERR "No bcsr in device tree\n");
149 return;
150 }
151
152 bcsr = of_iomap(np, 0);
153 of_node_put(np);
154 if (!bcsr) {
155 printk(KERN_ERR "Cannot map BCSR registers\n");
156 return;
157 }
158
159 #define BCSR1_FETHIEN 0x08000000
160 #define BCSR1_FETH_RST 0x04000000
161 #define BCSR1_RS232_EN1 0x02000000
162 #define BCSR1_RS232_EN2 0x01000000
163 #define BCSR3_USB_nEN 0x80000000
164 #define BCSR3_FETHIEN2 0x10000000
165 #define BCSR3_FETH2_RST 0x08000000
166
167 clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
168 setbits32(&bcsr[1], BCSR1_FETH_RST);
169
170 clrbits32(&bcsr[3], BCSR3_FETHIEN2);
171 setbits32(&bcsr[3], BCSR3_FETH2_RST);
172
173 clrbits32(&bcsr[3], BCSR3_USB_nEN);
174
175 iounmap(bcsr);
176
177 init_ioports();
178 pq2_init_pci();
179
180 if (ppc_md.progress)
181 ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0);
182 }
183
184 static const struct of_device_id of_bus_ids[] __initconst = {
185 { .name = "soc", },
186 { .name = "cpm", },
187 { .name = "localbus", },
188 {},
189 };
190
declare_of_platform_devices(void)191 static int __init declare_of_platform_devices(void)
192 {
193 /* Publish the QE devices */
194 of_platform_bus_probe(NULL, of_bus_ids, NULL);
195 return 0;
196 }
197 machine_device_initcall(mpc8272_ads, declare_of_platform_devices);
198
199 /*
200 * Called very early, device-tree isn't unflattened
201 */
mpc8272_ads_probe(void)202 static int __init mpc8272_ads_probe(void)
203 {
204 unsigned long root = of_get_flat_dt_root();
205 return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
206 }
207
define_machine(mpc8272_ads)208 define_machine(mpc8272_ads)
209 {
210 .name = "Freescale MPC8272 ADS",
211 .probe = mpc8272_ads_probe,
212 .setup_arch = mpc8272_ads_setup_arch,
213 .init_IRQ = mpc8272_ads_pic_init,
214 .get_irq = cpm2_get_irq,
215 .calibrate_decr = generic_calibrate_decr,
216 .restart = pq2_restart,
217 .progress = udbg_progress,
218 };
219