1 /*
2 * Copyright 2011 IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 */
10
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/irq.h>
14 #include <linux/smp.h>
15 #include <linux/interrupt.h>
16 #include <linux/init.h>
17 #include <linux/cpu.h>
18 #include <linux/of.h>
19 #include <linux/spinlock.h>
20 #include <linux/module.h>
21
22 #include <asm/prom.h>
23 #include <asm/io.h>
24 #include <asm/smp.h>
25 #include <asm/irq.h>
26 #include <asm/errno.h>
27 #include <asm/xics.h>
28 #include <asm/kvm_ppc.h>
29 #include <asm/dbell.h>
30
31 struct icp_ipl {
32 union {
33 u32 word;
34 u8 bytes[4];
35 } xirr_poll;
36 union {
37 u32 word;
38 u8 bytes[4];
39 } xirr;
40 u32 dummy;
41 union {
42 u32 word;
43 u8 bytes[4];
44 } qirr;
45 u32 link_a;
46 u32 link_b;
47 u32 link_c;
48 };
49
50 static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
51
icp_native_get_xirr(void)52 static inline unsigned int icp_native_get_xirr(void)
53 {
54 int cpu = smp_processor_id();
55 unsigned int xirr;
56
57 /* Handled an interrupt latched by KVM */
58 xirr = kvmppc_get_xics_latch();
59 if (xirr)
60 return xirr;
61
62 return in_be32(&icp_native_regs[cpu]->xirr.word);
63 }
64
icp_native_set_xirr(unsigned int value)65 static inline void icp_native_set_xirr(unsigned int value)
66 {
67 int cpu = smp_processor_id();
68
69 out_be32(&icp_native_regs[cpu]->xirr.word, value);
70 }
71
icp_native_set_cppr(u8 value)72 static inline void icp_native_set_cppr(u8 value)
73 {
74 int cpu = smp_processor_id();
75
76 out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
77 }
78
icp_native_set_qirr(int n_cpu,u8 value)79 static inline void icp_native_set_qirr(int n_cpu, u8 value)
80 {
81 out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
82 }
83
icp_native_set_cpu_priority(unsigned char cppr)84 static void icp_native_set_cpu_priority(unsigned char cppr)
85 {
86 xics_set_base_cppr(cppr);
87 icp_native_set_cppr(cppr);
88 iosync();
89 }
90
icp_native_eoi(struct irq_data * d)91 void icp_native_eoi(struct irq_data *d)
92 {
93 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
94
95 iosync();
96 icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
97 }
98
icp_native_teardown_cpu(void)99 static void icp_native_teardown_cpu(void)
100 {
101 int cpu = smp_processor_id();
102
103 /* Clear any pending IPI */
104 icp_native_set_qirr(cpu, 0xff);
105 }
106
icp_native_flush_ipi(void)107 static void icp_native_flush_ipi(void)
108 {
109 /* We take the ipi irq but and never return so we
110 * need to EOI the IPI, but want to leave our priority 0
111 *
112 * should we check all the other interrupts too?
113 * should we be flagging idle loop instead?
114 * or creating some task to be scheduled?
115 */
116
117 icp_native_set_xirr((0x00 << 24) | XICS_IPI);
118 }
119
icp_native_get_irq(void)120 static unsigned int icp_native_get_irq(void)
121 {
122 unsigned int xirr = icp_native_get_xirr();
123 unsigned int vec = xirr & 0x00ffffff;
124 unsigned int irq;
125
126 if (vec == XICS_IRQ_SPURIOUS)
127 return NO_IRQ;
128
129 irq = irq_find_mapping(xics_host, vec);
130 if (likely(irq != NO_IRQ)) {
131 xics_push_cppr(vec);
132 return irq;
133 }
134
135 /* We don't have a linux mapping, so have rtas mask it. */
136 xics_mask_unknown_vec(vec);
137
138 /* We might learn about it later, so EOI it */
139 icp_native_set_xirr(xirr);
140
141 return NO_IRQ;
142 }
143
144 #ifdef CONFIG_SMP
145
icp_native_cause_ipi(int cpu,unsigned long data)146 static void icp_native_cause_ipi(int cpu, unsigned long data)
147 {
148 kvmppc_set_host_ipi(cpu, 1);
149 #ifdef CONFIG_PPC_DOORBELL
150 if (cpu_has_feature(CPU_FTR_DBELL) &&
151 (cpumask_test_cpu(cpu, cpu_sibling_mask(smp_processor_id()))))
152 doorbell_cause_ipi(cpu, data);
153 else
154 #endif
155 icp_native_set_qirr(cpu, IPI_PRIORITY);
156 }
157
158 /*
159 * Called when an interrupt is received on an off-line CPU to
160 * clear the interrupt, so that the CPU can go back to nap mode.
161 */
icp_native_flush_interrupt(void)162 void icp_native_flush_interrupt(void)
163 {
164 unsigned int xirr = icp_native_get_xirr();
165 unsigned int vec = xirr & 0x00ffffff;
166
167 if (vec == XICS_IRQ_SPURIOUS)
168 return;
169 if (vec == XICS_IPI) {
170 /* Clear pending IPI */
171 int cpu = smp_processor_id();
172 kvmppc_set_host_ipi(cpu, 0);
173 icp_native_set_qirr(cpu, 0xff);
174 } else {
175 pr_err("XICS: hw interrupt 0x%x to offline cpu, disabling\n",
176 vec);
177 xics_mask_unknown_vec(vec);
178 }
179 /* EOI the interrupt */
180 icp_native_set_xirr(xirr);
181 }
182
xics_wake_cpu(int cpu)183 void xics_wake_cpu(int cpu)
184 {
185 icp_native_set_qirr(cpu, IPI_PRIORITY);
186 }
187 EXPORT_SYMBOL_GPL(xics_wake_cpu);
188
icp_native_ipi_action(int irq,void * dev_id)189 static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
190 {
191 int cpu = smp_processor_id();
192
193 kvmppc_set_host_ipi(cpu, 0);
194 icp_native_set_qirr(cpu, 0xff);
195
196 return smp_ipi_demux();
197 }
198
199 #endif /* CONFIG_SMP */
200
icp_native_map_one_cpu(int hw_id,unsigned long addr,unsigned long size)201 static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
202 unsigned long size)
203 {
204 char *rname;
205 int i, cpu = -1;
206
207 /* This may look gross but it's good enough for now, we don't quite
208 * have a hard -> linux processor id matching.
209 */
210 for_each_possible_cpu(i) {
211 if (!cpu_present(i))
212 continue;
213 if (hw_id == get_hard_smp_processor_id(i)) {
214 cpu = i;
215 break;
216 }
217 }
218
219 /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
220 * with way more entries in there than you have CPUs
221 */
222 if (cpu == -1)
223 return 0;
224
225 rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
226 cpu, hw_id);
227
228 if (!request_mem_region(addr, size, rname)) {
229 pr_warning("icp_native: Could not reserve ICP MMIO"
230 " for CPU %d, interrupt server #0x%x\n",
231 cpu, hw_id);
232 return -EBUSY;
233 }
234
235 icp_native_regs[cpu] = ioremap(addr, size);
236 kvmppc_set_xics_phys(cpu, addr);
237 if (!icp_native_regs[cpu]) {
238 pr_warning("icp_native: Failed ioremap for CPU %d, "
239 "interrupt server #0x%x, addr %#lx\n",
240 cpu, hw_id, addr);
241 release_mem_region(addr, size);
242 return -ENOMEM;
243 }
244 return 0;
245 }
246
icp_native_init_one_node(struct device_node * np,unsigned int * indx)247 static int __init icp_native_init_one_node(struct device_node *np,
248 unsigned int *indx)
249 {
250 unsigned int ilen;
251 const __be32 *ireg;
252 int i;
253 int reg_tuple_size;
254 int num_servers = 0;
255
256 /* This code does the theorically broken assumption that the interrupt
257 * server numbers are the same as the hard CPU numbers.
258 * This happens to be the case so far but we are playing with fire...
259 * should be fixed one of these days. -BenH.
260 */
261 ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
262
263 /* Do that ever happen ? we'll know soon enough... but even good'old
264 * f80 does have that property ..
265 */
266 WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
267
268 if (ireg) {
269 *indx = of_read_number(ireg, 1);
270 if (ilen >= 2*sizeof(u32))
271 num_servers = of_read_number(ireg + 1, 1);
272 }
273
274 ireg = of_get_property(np, "reg", &ilen);
275 if (!ireg) {
276 pr_err("icp_native: Can't find interrupt reg property");
277 return -1;
278 }
279
280 reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
281 if (((ilen % reg_tuple_size) != 0)
282 || (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
283 pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
284 ilen / reg_tuple_size, num_servers);
285 return -1;
286 }
287
288 for (i = 0; i < (ilen / reg_tuple_size); i++) {
289 struct resource r;
290 int err;
291
292 err = of_address_to_resource(np, i, &r);
293 if (err) {
294 pr_err("icp_native: Could not translate ICP MMIO"
295 " for interrupt server 0x%x (%d)\n", *indx, err);
296 return -1;
297 }
298
299 if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r)))
300 return -1;
301
302 (*indx)++;
303 }
304 return 0;
305 }
306
307 static const struct icp_ops icp_native_ops = {
308 .get_irq = icp_native_get_irq,
309 .eoi = icp_native_eoi,
310 .set_priority = icp_native_set_cpu_priority,
311 .teardown_cpu = icp_native_teardown_cpu,
312 .flush_ipi = icp_native_flush_ipi,
313 #ifdef CONFIG_SMP
314 .ipi_action = icp_native_ipi_action,
315 .cause_ipi = icp_native_cause_ipi,
316 #endif
317 };
318
icp_native_init(void)319 int __init icp_native_init(void)
320 {
321 struct device_node *np;
322 u32 indx = 0;
323 int found = 0;
324
325 for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
326 if (icp_native_init_one_node(np, &indx) == 0)
327 found = 1;
328 if (!found) {
329 for_each_node_by_type(np,
330 "PowerPC-External-Interrupt-Presentation") {
331 if (icp_native_init_one_node(np, &indx) == 0)
332 found = 1;
333 }
334 }
335
336 if (found == 0)
337 return -ENODEV;
338
339 icp_ops = &icp_native_ops;
340
341 return 0;
342 }
343