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1 /*
2  * Copyright 2014 Tilera Corporation. All Rights Reserved.
3  *
4  *   This program is free software; you can redistribute it and/or
5  *   modify it under the terms of the GNU General Public License
6  *   as published by the Free Software Foundation, version 2.
7  *
8  *   This program is distributed in the hope that it will be useful, but
9  *   WITHOUT ANY WARRANTY; without even the implied warranty of
10  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11  *   NON INFRINGEMENT.  See the GNU General Public License for
12  *   more details.
13  */
14 
15 #ifndef _ASM_TILE_PMC_H
16 #define _ASM_TILE_PMC_H
17 
18 #include <linux/ptrace.h>
19 
20 #define TILE_BASE_COUNTERS	2
21 
22 /* Bitfields below are derived from SPR PERF_COUNT_CTL*/
23 #ifndef __tilegx__
24 /* PERF_COUNT_CTL on TILEPro */
25 #define TILE_CTL_EXCL_USER	(1 << 7) /* exclude user level */
26 #define TILE_CTL_EXCL_KERNEL	(1 << 8) /* exclude kernel level */
27 #define TILE_CTL_EXCL_HV	(1 << 9) /* exclude hypervisor level */
28 
29 #define TILE_SEL_MASK		0x7f	/* 7 bits for event SEL,
30 					COUNT_0_SEL */
31 #define TILE_PLM_MASK		0x780	/* 4 bits priv level msks,
32 					COUNT_0_MASK*/
33 #define TILE_EVENT_MASK	(TILE_SEL_MASK | TILE_PLM_MASK)
34 
35 #else /* __tilegx__*/
36 /* PERF_COUNT_CTL on TILEGx*/
37 #define TILE_CTL_EXCL_USER	(1 << 10) /* exclude user level */
38 #define TILE_CTL_EXCL_KERNEL	(1 << 11) /* exclude kernel level */
39 #define TILE_CTL_EXCL_HV	(1 << 12) /* exclude hypervisor level */
40 
41 #define TILE_SEL_MASK		0x3f	/* 6 bits for event SEL,
42 					COUNT_0_SEL*/
43 #define TILE_BOX_MASK		0x1c0	/* 3 bits box msks,
44 					COUNT_0_BOX */
45 #define TILE_PLM_MASK		0x3c00	/* 4 bits priv level msks,
46 					COUNT_0_MASK */
47 #define TILE_EVENT_MASK	(TILE_SEL_MASK | TILE_BOX_MASK | TILE_PLM_MASK)
48 #endif /* __tilegx__*/
49 
50 /* Takes register and fault number.  Returns error to disable the interrupt. */
51 typedef int (*perf_irq_t)(struct pt_regs *, int);
52 
53 int userspace_perf_handler(struct pt_regs *regs, int fault);
54 
55 perf_irq_t reserve_pmc_hardware(perf_irq_t new_perf_irq);
56 void release_pmc_hardware(void);
57 
58 unsigned long pmc_get_overflow(void);
59 void pmc_ack_overflow(unsigned long status);
60 
61 void unmask_pmc_interrupts(void);
62 void mask_pmc_interrupts(void);
63 
64 #endif /* _ASM_TILE_PMC_H */
65