1 /* 2 * mtip32xx.h - Header file for the P320 SSD Block Driver 3 * Copyright (C) 2011 Micron Technology, Inc. 4 * 5 * Portions of this code were derived from works subjected to the 6 * following copyright: 7 * Copyright (C) 2009 Integrated Device Technology, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 */ 20 21 #ifndef __MTIP32XX_H__ 22 #define __MTIP32XX_H__ 23 24 #include <linux/spinlock.h> 25 #include <linux/rwsem.h> 26 #include <linux/ata.h> 27 #include <linux/interrupt.h> 28 #include <linux/genhd.h> 29 30 /* Offset of Subsystem Device ID in pci confoguration space */ 31 #define PCI_SUBSYSTEM_DEVICEID 0x2E 32 33 /* offset of Device Control register in PCIe extended capabilites space */ 34 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 35 36 /* check for erase mode support during secure erase */ 37 #define MTIP_SEC_ERASE_MODE 0x2 38 39 /* # of times to retry timed out/failed IOs */ 40 #define MTIP_MAX_RETRIES 2 41 42 /* Various timeout values in ms */ 43 #define MTIP_NCQ_CMD_TIMEOUT_MS 15000 44 #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000 45 #define MTIP_INT_CMD_TIMEOUT_MS 5000 46 #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \ 47 (MTIP_MAX_RETRIES + 1)) 48 49 /* check for timeouts every 500ms */ 50 #define MTIP_TIMEOUT_CHECK_PERIOD 500 51 52 /* ftl rebuild */ 53 #define MTIP_FTL_REBUILD_OFFSET 142 54 #define MTIP_FTL_REBUILD_MAGIC 0xED51 55 #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000 56 57 /* unaligned IO handling */ 58 #define MTIP_MAX_UNALIGNED_SLOTS 2 59 60 /* Macro to extract the tag bit number from a tag value. */ 61 #define MTIP_TAG_BIT(tag) (tag & 0x1F) 62 63 /* 64 * Macro to extract the tag index from a tag value. The index 65 * is used to access the correct s_active/Command Issue register based 66 * on the tag value. 67 */ 68 #define MTIP_TAG_INDEX(tag) (tag >> 5) 69 70 /* 71 * Maximum number of scatter gather entries 72 * a single command may have. 73 */ 74 #define MTIP_MAX_SG 504 75 76 /* 77 * Maximum number of slot groups (Command Issue & s_active registers) 78 * NOTE: This is the driver maximum; check dd->slot_groups for actual value. 79 */ 80 #define MTIP_MAX_SLOT_GROUPS 8 81 82 /* Internal command tag. */ 83 #define MTIP_TAG_INTERNAL 0 84 85 /* Micron Vendor ID & P320x SSD Device ID */ 86 #define PCI_VENDOR_ID_MICRON 0x1344 87 #define P320H_DEVICE_ID 0x5150 88 #define P320M_DEVICE_ID 0x5151 89 #define P320S_DEVICE_ID 0x5152 90 #define P325M_DEVICE_ID 0x5153 91 #define P420H_DEVICE_ID 0x5160 92 #define P420M_DEVICE_ID 0x5161 93 #define P425M_DEVICE_ID 0x5163 94 95 /* Driver name and version strings */ 96 #define MTIP_DRV_NAME "mtip32xx" 97 #define MTIP_DRV_VERSION "1.3.1" 98 99 /* Maximum number of minor device numbers per device. */ 100 #define MTIP_MAX_MINORS 16 101 102 /* Maximum number of supported command slots. */ 103 #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32) 104 105 /* 106 * Per-tag bitfield size in longs. 107 * Linux bit manipulation functions 108 * (i.e. test_and_set_bit, find_next_zero_bit) 109 * manipulate memory in longs, so we try to make the math work. 110 * take the slot groups and find the number of longs, rounding up. 111 * Careful! i386 and x86_64 use different size longs! 112 */ 113 #define U32_PER_LONG (sizeof(long) / sizeof(u32)) 114 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \ 115 (U32_PER_LONG-1))/U32_PER_LONG) 116 117 /* BAR number used to access the HBA registers. */ 118 #define MTIP_ABAR 5 119 120 #ifdef DEBUG 121 #define dbg_printk(format, arg...) \ 122 printk(pr_fmt(format), ##arg); 123 #else 124 #define dbg_printk(format, arg...) 125 #endif 126 127 #define MTIP_DFS_MAX_BUF_SIZE 1024 128 129 #define __force_bit2int (unsigned int __force) 130 131 enum { 132 /* below are bit numbers in 'flags' defined in mtip_port */ 133 MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */ 134 MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */ 135 MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */ 136 MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */ 137 MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) | 138 (1 << MTIP_PF_EH_ACTIVE_BIT) | 139 (1 << MTIP_PF_SE_ACTIVE_BIT) | 140 (1 << MTIP_PF_DM_ACTIVE_BIT)), 141 142 MTIP_PF_SVC_THD_ACTIVE_BIT = 4, 143 MTIP_PF_ISSUE_CMDS_BIT = 5, 144 MTIP_PF_REBUILD_BIT = 6, 145 MTIP_PF_SR_CLEANUP_BIT = 7, 146 MTIP_PF_SVC_THD_STOP_BIT = 8, 147 148 MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) | 149 (1 << MTIP_PF_ISSUE_CMDS_BIT) | 150 (1 << MTIP_PF_REBUILD_BIT) | 151 (1 << MTIP_PF_SVC_THD_STOP_BIT)), 152 153 /* below are bit numbers in 'dd_flag' defined in driver_data */ 154 MTIP_DDF_SEC_LOCK_BIT = 0, 155 MTIP_DDF_REMOVE_PENDING_BIT = 1, 156 MTIP_DDF_OVER_TEMP_BIT = 2, 157 MTIP_DDF_WRITE_PROTECT_BIT = 3, 158 MTIP_DDF_REMOVE_DONE_BIT = 4, 159 MTIP_DDF_CLEANUP_BIT = 5, 160 MTIP_DDF_RESUME_BIT = 6, 161 MTIP_DDF_INIT_DONE_BIT = 7, 162 MTIP_DDF_REBUILD_FAILED_BIT = 8, 163 MTIP_DDF_REMOVAL_BIT = 9, 164 165 MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | 166 (1 << MTIP_DDF_SEC_LOCK_BIT) | 167 (1 << MTIP_DDF_OVER_TEMP_BIT) | 168 (1 << MTIP_DDF_WRITE_PROTECT_BIT) | 169 (1 << MTIP_DDF_REBUILD_FAILED_BIT)), 170 171 }; 172 173 struct smart_attr { 174 u8 attr_id; 175 u16 flags; 176 u8 cur; 177 u8 worst; 178 u32 data; 179 u8 res[3]; 180 } __packed; 181 182 struct mtip_work { 183 struct work_struct work; 184 void *port; 185 int cpu_binding; 186 u32 completed; 187 } ____cacheline_aligned_in_smp; 188 189 #define DEFINE_HANDLER(group) \ 190 void mtip_workq_sdbf##group(struct work_struct *work) \ 191 { \ 192 struct mtip_work *w = (struct mtip_work *) work; \ 193 mtip_workq_sdbfx(w->port, group, w->completed); \ 194 } 195 196 #define MTIP_TRIM_TIMEOUT_MS 240000 197 #define MTIP_MAX_TRIM_ENTRIES 8 198 #define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8 199 200 struct mtip_trim_entry { 201 u32 lba; /* starting lba of region */ 202 u16 rsvd; /* unused */ 203 u16 range; /* # of 512b blocks to trim */ 204 } __packed; 205 206 struct mtip_trim { 207 /* Array of regions to trim */ 208 struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES]; 209 } __packed; 210 211 /* Register Frame Information Structure (FIS), host to device. */ 212 struct host_to_dev_fis { 213 /* 214 * FIS type. 215 * - 27h Register FIS, host to device. 216 * - 34h Register FIS, device to host. 217 * - 39h DMA Activate FIS, device to host. 218 * - 41h DMA Setup FIS, bi-directional. 219 * - 46h Data FIS, bi-directional. 220 * - 58h BIST Activate FIS, bi-directional. 221 * - 5Fh PIO Setup FIS, device to host. 222 * - A1h Set Device Bits FIS, device to host. 223 */ 224 unsigned char type; 225 unsigned char opts; 226 unsigned char command; 227 unsigned char features; 228 229 union { 230 unsigned char lba_low; 231 unsigned char sector; 232 }; 233 union { 234 unsigned char lba_mid; 235 unsigned char cyl_low; 236 }; 237 union { 238 unsigned char lba_hi; 239 unsigned char cyl_hi; 240 }; 241 union { 242 unsigned char device; 243 unsigned char head; 244 }; 245 246 union { 247 unsigned char lba_low_ex; 248 unsigned char sector_ex; 249 }; 250 union { 251 unsigned char lba_mid_ex; 252 unsigned char cyl_low_ex; 253 }; 254 union { 255 unsigned char lba_hi_ex; 256 unsigned char cyl_hi_ex; 257 }; 258 unsigned char features_ex; 259 260 unsigned char sect_count; 261 unsigned char sect_cnt_ex; 262 unsigned char res2; 263 unsigned char control; 264 265 unsigned int res3; 266 }; 267 268 /* Command header structure. */ 269 struct mtip_cmd_hdr { 270 /* 271 * Command options. 272 * - Bits 31:16 Number of PRD entries. 273 * - Bits 15:8 Unused in this implementation. 274 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries. 275 * - Bit 6 Write bit, should be set when writing data to the device. 276 * - Bit 5 Unused in this implementation. 277 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes). 278 */ 279 unsigned int opts; 280 /* This field is unsed when using NCQ. */ 281 union { 282 unsigned int byte_count; 283 unsigned int status; 284 }; 285 /* 286 * Lower 32 bits of the command table address associated with this 287 * header. The command table addresses must be 128 byte aligned. 288 */ 289 unsigned int ctba; 290 /* 291 * If 64 bit addressing is used this field is the upper 32 bits 292 * of the command table address associated with this command. 293 */ 294 unsigned int ctbau; 295 /* Reserved and unused. */ 296 unsigned int res[4]; 297 }; 298 299 /* Command scatter gather structure (PRD). */ 300 struct mtip_cmd_sg { 301 /* 302 * Low 32 bits of the data buffer address. For P320 this 303 * address must be 8 byte aligned signified by bits 2:0 being 304 * set to 0. 305 */ 306 unsigned int dba; 307 /* 308 * When 64 bit addressing is used this field is the upper 309 * 32 bits of the data buffer address. 310 */ 311 unsigned int dba_upper; 312 /* Unused. */ 313 unsigned int reserved; 314 /* 315 * Bit 31: interrupt when this data block has been transferred. 316 * Bits 30..22: reserved 317 * Bits 21..0: byte count (minus 1). For P320 the byte count must be 318 * 8 byte aligned signified by bits 2:0 being set to 1. 319 */ 320 unsigned int info; 321 }; 322 struct mtip_port; 323 324 /* Structure used to describe a command. */ 325 struct mtip_cmd { 326 327 struct mtip_cmd_hdr *command_header; /* ptr to command header entry */ 328 329 dma_addr_t command_header_dma; /* corresponding physical address */ 330 331 void *command; /* ptr to command table entry */ 332 333 dma_addr_t command_dma; /* corresponding physical address */ 334 335 void *comp_data; /* data passed to completion function comp_func() */ 336 /* 337 * Completion function called by the ISR upon completion of 338 * a command. 339 */ 340 void (*comp_func)(struct mtip_port *port, 341 int tag, 342 struct mtip_cmd *cmd, 343 int status); 344 345 int scatter_ents; /* Number of scatter list entries used */ 346 347 int unaligned; /* command is unaligned on 4k boundary */ 348 349 struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ 350 351 int retries; /* The number of retries left for this command. */ 352 353 int direction; /* Data transfer direction */ 354 }; 355 356 /* Structure used to describe a port. */ 357 struct mtip_port { 358 /* Pointer back to the driver data for this port. */ 359 struct driver_data *dd; 360 /* 361 * Used to determine if the data pointed to by the 362 * identify field is valid. 363 */ 364 unsigned long identify_valid; 365 /* Base address of the memory mapped IO for the port. */ 366 void __iomem *mmio; 367 /* Array of pointers to the memory mapped s_active registers. */ 368 void __iomem *s_active[MTIP_MAX_SLOT_GROUPS]; 369 /* Array of pointers to the memory mapped completed registers. */ 370 void __iomem *completed[MTIP_MAX_SLOT_GROUPS]; 371 /* Array of pointers to the memory mapped Command Issue registers. */ 372 void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS]; 373 /* 374 * Pointer to the beginning of the command header memory as used 375 * by the driver. 376 */ 377 void *command_list; 378 /* 379 * Pointer to the beginning of the command header memory as used 380 * by the DMA. 381 */ 382 dma_addr_t command_list_dma; 383 /* 384 * Pointer to the beginning of the RX FIS memory as used 385 * by the driver. 386 */ 387 void *rxfis; 388 /* 389 * Pointer to the beginning of the RX FIS memory as used 390 * by the DMA. 391 */ 392 dma_addr_t rxfis_dma; 393 /* 394 * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART 395 */ 396 void *block1; 397 /* 398 * DMA address of region for RX Fis, Identify, RLE10, and SMART 399 */ 400 dma_addr_t block1_dma; 401 /* 402 * Pointer to the beginning of the identify data memory as used 403 * by the driver. 404 */ 405 u16 *identify; 406 /* 407 * Pointer to the beginning of the identify data memory as used 408 * by the DMA. 409 */ 410 dma_addr_t identify_dma; 411 /* 412 * Pointer to the beginning of a sector buffer that is used 413 * by the driver when issuing internal commands. 414 */ 415 u16 *sector_buffer; 416 /* 417 * Pointer to the beginning of a sector buffer that is used 418 * by the DMA when the driver issues internal commands. 419 */ 420 dma_addr_t sector_buffer_dma; 421 /* 422 * Bit significant, used to determine if a command slot has 423 * been allocated. i.e. the slot is in use. Bits are cleared 424 * when the command slot and all associated data structures 425 * are no longer needed. 426 */ 427 u16 *log_buf; 428 dma_addr_t log_buf_dma; 429 430 u8 *smart_buf; 431 dma_addr_t smart_buf_dma; 432 433 unsigned long allocated[SLOTBITS_IN_LONGS]; 434 /* 435 * used to queue commands when an internal command is in progress 436 * or error handling is active 437 */ 438 unsigned long cmds_to_issue[SLOTBITS_IN_LONGS]; 439 /* Used by mtip_service_thread to wait for an event */ 440 wait_queue_head_t svc_wait; 441 /* 442 * indicates the state of the port. Also, helps the service thread 443 * to determine its action on wake up. 444 */ 445 unsigned long flags; 446 /* 447 * Timer used to complete commands that have been active for too long. 448 */ 449 unsigned long ic_pause_timer; 450 451 /* Semaphore to control queue depth of unaligned IOs */ 452 struct semaphore cmd_slot_unal; 453 454 /* Spinlock for working around command-issue bug. */ 455 spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS]; 456 }; 457 458 /* 459 * Driver private data structure. 460 * 461 * One structure is allocated per probed device. 462 */ 463 struct driver_data { 464 void __iomem *mmio; /* Base address of the HBA registers. */ 465 466 int major; /* Major device number. */ 467 468 int instance; /* Instance number. First device probed is 0, ... */ 469 470 struct gendisk *disk; /* Pointer to our gendisk structure. */ 471 472 struct pci_dev *pdev; /* Pointer to the PCI device structure. */ 473 474 struct request_queue *queue; /* Our request queue. */ 475 476 struct blk_mq_tag_set tags; /* blk_mq tags */ 477 478 struct mtip_port *port; /* Pointer to the port data structure. */ 479 480 unsigned product_type; /* magic value declaring the product type */ 481 482 unsigned slot_groups; /* number of slot groups the product supports */ 483 484 unsigned long index; /* Index to determine the disk name */ 485 486 unsigned long dd_flag; /* NOTE: use atomic bit operations on this */ 487 488 struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ 489 490 struct dentry *dfs_node; 491 492 bool trim_supp; /* flag indicating trim support */ 493 494 bool sr; 495 496 int numa_node; /* NUMA support */ 497 498 char workq_name[32]; 499 500 struct workqueue_struct *isr_workq; 501 502 atomic_t irq_workers_active; 503 504 struct mtip_work work[MTIP_MAX_SLOT_GROUPS]; 505 506 int isr_binding; 507 508 struct block_device *bdev; 509 510 struct list_head online_list; /* linkage for online list */ 511 512 struct list_head remove_list; /* linkage for removing list */ 513 514 int unal_qdepth; /* qdepth of unaligned IO queue */ 515 }; 516 517 #endif 518