1 /*
2 * clk-max-gen.c - Generic clock driver for Maxim PMICs clocks
3 *
4 * Copyright (C) 2014 Google, Inc
5 *
6 * Copyright (C) 2012 Samsung Electornics
7 * Jonghwa Lee <jonghwa3.lee@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * This driver is based on clk-max77686.c
20 *
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/slab.h>
25 #include <linux/err.h>
26 #include <linux/regmap.h>
27 #include <linux/platform_device.h>
28 #include <linux/clk-provider.h>
29 #include <linux/mutex.h>
30 #include <linux/clkdev.h>
31 #include <linux/of.h>
32 #include <linux/export.h>
33
34 struct max_gen_clk {
35 struct regmap *regmap;
36 u32 mask;
37 u32 reg;
38 struct clk_hw hw;
39 };
40
to_max_gen_clk(struct clk_hw * hw)41 static struct max_gen_clk *to_max_gen_clk(struct clk_hw *hw)
42 {
43 return container_of(hw, struct max_gen_clk, hw);
44 }
45
max_gen_clk_prepare(struct clk_hw * hw)46 static int max_gen_clk_prepare(struct clk_hw *hw)
47 {
48 struct max_gen_clk *max_gen = to_max_gen_clk(hw);
49
50 return regmap_update_bits(max_gen->regmap, max_gen->reg,
51 max_gen->mask, max_gen->mask);
52 }
53
max_gen_clk_unprepare(struct clk_hw * hw)54 static void max_gen_clk_unprepare(struct clk_hw *hw)
55 {
56 struct max_gen_clk *max_gen = to_max_gen_clk(hw);
57
58 regmap_update_bits(max_gen->regmap, max_gen->reg,
59 max_gen->mask, ~max_gen->mask);
60 }
61
max_gen_clk_is_prepared(struct clk_hw * hw)62 static int max_gen_clk_is_prepared(struct clk_hw *hw)
63 {
64 struct max_gen_clk *max_gen = to_max_gen_clk(hw);
65 int ret;
66 u32 val;
67
68 ret = regmap_read(max_gen->regmap, max_gen->reg, &val);
69
70 if (ret < 0)
71 return -EINVAL;
72
73 return val & max_gen->mask;
74 }
75
max_gen_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)76 static unsigned long max_gen_recalc_rate(struct clk_hw *hw,
77 unsigned long parent_rate)
78 {
79 return 32768;
80 }
81
82 struct clk_ops max_gen_clk_ops = {
83 .prepare = max_gen_clk_prepare,
84 .unprepare = max_gen_clk_unprepare,
85 .is_prepared = max_gen_clk_is_prepared,
86 .recalc_rate = max_gen_recalc_rate,
87 };
88 EXPORT_SYMBOL_GPL(max_gen_clk_ops);
89
max_gen_clk_register(struct device * dev,struct max_gen_clk * max_gen)90 static struct clk *max_gen_clk_register(struct device *dev,
91 struct max_gen_clk *max_gen)
92 {
93 struct clk *clk;
94 struct clk_hw *hw = &max_gen->hw;
95 int ret;
96
97 clk = devm_clk_register(dev, hw);
98 if (IS_ERR(clk))
99 return clk;
100
101 ret = clk_register_clkdev(clk, hw->init->name, NULL);
102
103 if (ret)
104 return ERR_PTR(ret);
105
106 return clk;
107 }
108
max_gen_clk_probe(struct platform_device * pdev,struct regmap * regmap,u32 reg,struct clk_init_data * clks_init,int num_init)109 int max_gen_clk_probe(struct platform_device *pdev, struct regmap *regmap,
110 u32 reg, struct clk_init_data *clks_init, int num_init)
111 {
112 int i, ret;
113 struct max_gen_clk *max_gen_clks;
114 struct clk **clocks;
115 struct device *dev = pdev->dev.parent;
116 const char *clk_name;
117 struct clk_init_data *init;
118
119 clocks = devm_kzalloc(dev, sizeof(struct clk *) * num_init, GFP_KERNEL);
120 if (!clocks)
121 return -ENOMEM;
122
123 max_gen_clks = devm_kzalloc(dev, sizeof(struct max_gen_clk)
124 * num_init, GFP_KERNEL);
125 if (!max_gen_clks)
126 return -ENOMEM;
127
128 for (i = 0; i < num_init; i++) {
129 max_gen_clks[i].regmap = regmap;
130 max_gen_clks[i].mask = 1 << i;
131 max_gen_clks[i].reg = reg;
132
133 init = devm_kzalloc(dev, sizeof(*init), GFP_KERNEL);
134 if (!init)
135 return -ENOMEM;
136
137 if (dev->of_node &&
138 !of_property_read_string_index(dev->of_node,
139 "clock-output-names",
140 i, &clk_name))
141 init->name = clk_name;
142 else
143 init->name = clks_init[i].name;
144
145 init->ops = clks_init[i].ops;
146 init->flags = clks_init[i].flags;
147
148 max_gen_clks[i].hw.init = init;
149
150 clocks[i] = max_gen_clk_register(dev, &max_gen_clks[i]);
151 if (IS_ERR(clocks[i])) {
152 ret = PTR_ERR(clocks[i]);
153 dev_err(dev, "failed to register %s\n",
154 max_gen_clks[i].hw.init->name);
155 return ret;
156 }
157 }
158
159 platform_set_drvdata(pdev, clocks);
160
161 if (dev->of_node) {
162 struct clk_onecell_data *of_data;
163
164 of_data = devm_kzalloc(dev, sizeof(*of_data), GFP_KERNEL);
165 if (!of_data)
166 return -ENOMEM;
167
168 of_data->clks = clocks;
169 of_data->clk_num = num_init;
170 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
171 of_data);
172
173 if (ret) {
174 dev_err(dev, "failed to register OF clock provider\n");
175 return ret;
176 }
177 }
178
179 return 0;
180 }
181 EXPORT_SYMBOL_GPL(max_gen_clk_probe);
182
max_gen_clk_remove(struct platform_device * pdev,int num_init)183 int max_gen_clk_remove(struct platform_device *pdev, int num_init)
184 {
185 struct device *dev = pdev->dev.parent;
186
187 if (dev->of_node)
188 of_clk_del_provider(dev->of_node);
189
190 return 0;
191 }
192 EXPORT_SYMBOL_GPL(max_gen_clk_remove);
193