1 /*
2 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/device.h>
15 #include <linux/mutex.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/mcp23s08.h>
21 #include <linux/slab.h>
22 #include <asm/byteorder.h>
23 #include <linux/interrupt.h>
24 #include <linux/of_irq.h>
25 #include <linux/of_device.h>
26
27 /**
28 * MCP types supported by driver
29 */
30 #define MCP_TYPE_S08 0
31 #define MCP_TYPE_S17 1
32 #define MCP_TYPE_008 2
33 #define MCP_TYPE_017 3
34
35 /* Registers are all 8 bits wide.
36 *
37 * The mcp23s17 has twice as many bits, and can be configured to work
38 * with either 16 bit registers or with two adjacent 8 bit banks.
39 */
40 #define MCP_IODIR 0x00 /* init/reset: all ones */
41 #define MCP_IPOL 0x01
42 #define MCP_GPINTEN 0x02
43 #define MCP_DEFVAL 0x03
44 #define MCP_INTCON 0x04
45 #define MCP_IOCON 0x05
46 # define IOCON_MIRROR (1 << 6)
47 # define IOCON_SEQOP (1 << 5)
48 # define IOCON_HAEN (1 << 3)
49 # define IOCON_ODR (1 << 2)
50 # define IOCON_INTPOL (1 << 1)
51 #define MCP_GPPU 0x06
52 #define MCP_INTF 0x07
53 #define MCP_INTCAP 0x08
54 #define MCP_GPIO 0x09
55 #define MCP_OLAT 0x0a
56
57 struct mcp23s08;
58
59 struct mcp23s08_ops {
60 int (*read)(struct mcp23s08 *mcp, unsigned reg);
61 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
62 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
63 u16 *vals, unsigned n);
64 };
65
66 struct mcp23s08 {
67 u8 addr;
68
69 u16 cache[11];
70 u16 irq_rise;
71 u16 irq_fall;
72 int irq;
73 bool irq_controller;
74 /* lock protects the cached values */
75 struct mutex lock;
76 struct mutex irq_lock;
77 struct irq_domain *irq_domain;
78
79 struct gpio_chip chip;
80
81 const struct mcp23s08_ops *ops;
82 void *data; /* ops specific data */
83 };
84
85 /* A given spi_device can represent up to eight mcp23sxx chips
86 * sharing the same chipselect but using different addresses
87 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
88 * Driver data holds all the per-chip data.
89 */
90 struct mcp23s08_driver_data {
91 unsigned ngpio;
92 struct mcp23s08 *mcp[8];
93 struct mcp23s08 chip[];
94 };
95
96 /* This lock class tells lockdep that GPIO irqs are in a different
97 * category than their parents, so it won't report false recursion.
98 */
99 static struct lock_class_key gpio_lock_class;
100
101 /*----------------------------------------------------------------------*/
102
103 #if IS_ENABLED(CONFIG_I2C)
104
mcp23008_read(struct mcp23s08 * mcp,unsigned reg)105 static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
106 {
107 return i2c_smbus_read_byte_data(mcp->data, reg);
108 }
109
mcp23008_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)110 static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
111 {
112 return i2c_smbus_write_byte_data(mcp->data, reg, val);
113 }
114
115 static int
mcp23008_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)116 mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
117 {
118 while (n--) {
119 int ret = mcp23008_read(mcp, reg++);
120 if (ret < 0)
121 return ret;
122 *vals++ = ret;
123 }
124
125 return 0;
126 }
127
mcp23017_read(struct mcp23s08 * mcp,unsigned reg)128 static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
129 {
130 return i2c_smbus_read_word_data(mcp->data, reg << 1);
131 }
132
mcp23017_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)133 static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
134 {
135 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
136 }
137
138 static int
mcp23017_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)139 mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
140 {
141 while (n--) {
142 int ret = mcp23017_read(mcp, reg++);
143 if (ret < 0)
144 return ret;
145 *vals++ = ret;
146 }
147
148 return 0;
149 }
150
151 static const struct mcp23s08_ops mcp23008_ops = {
152 .read = mcp23008_read,
153 .write = mcp23008_write,
154 .read_regs = mcp23008_read_regs,
155 };
156
157 static const struct mcp23s08_ops mcp23017_ops = {
158 .read = mcp23017_read,
159 .write = mcp23017_write,
160 .read_regs = mcp23017_read_regs,
161 };
162
163 #endif /* CONFIG_I2C */
164
165 /*----------------------------------------------------------------------*/
166
167 #ifdef CONFIG_SPI_MASTER
168
mcp23s08_read(struct mcp23s08 * mcp,unsigned reg)169 static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
170 {
171 u8 tx[2], rx[1];
172 int status;
173
174 tx[0] = mcp->addr | 0x01;
175 tx[1] = reg;
176 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
177 return (status < 0) ? status : rx[0];
178 }
179
mcp23s08_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)180 static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
181 {
182 u8 tx[3];
183
184 tx[0] = mcp->addr;
185 tx[1] = reg;
186 tx[2] = val;
187 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
188 }
189
190 static int
mcp23s08_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)191 mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
192 {
193 u8 tx[2], *tmp;
194 int status;
195
196 if ((n + reg) > sizeof(mcp->cache))
197 return -EINVAL;
198 tx[0] = mcp->addr | 0x01;
199 tx[1] = reg;
200
201 tmp = (u8 *)vals;
202 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
203 if (status >= 0) {
204 while (n--)
205 vals[n] = tmp[n]; /* expand to 16bit */
206 }
207 return status;
208 }
209
mcp23s17_read(struct mcp23s08 * mcp,unsigned reg)210 static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
211 {
212 u8 tx[2], rx[2];
213 int status;
214
215 tx[0] = mcp->addr | 0x01;
216 tx[1] = reg << 1;
217 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
218 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
219 }
220
mcp23s17_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)221 static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
222 {
223 u8 tx[4];
224
225 tx[0] = mcp->addr;
226 tx[1] = reg << 1;
227 tx[2] = val;
228 tx[3] = val >> 8;
229 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
230 }
231
232 static int
mcp23s17_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)233 mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
234 {
235 u8 tx[2];
236 int status;
237
238 if ((n + reg) > sizeof(mcp->cache))
239 return -EINVAL;
240 tx[0] = mcp->addr | 0x01;
241 tx[1] = reg << 1;
242
243 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
244 (u8 *)vals, n * 2);
245 if (status >= 0) {
246 while (n--)
247 vals[n] = __le16_to_cpu((__le16)vals[n]);
248 }
249
250 return status;
251 }
252
253 static const struct mcp23s08_ops mcp23s08_ops = {
254 .read = mcp23s08_read,
255 .write = mcp23s08_write,
256 .read_regs = mcp23s08_read_regs,
257 };
258
259 static const struct mcp23s08_ops mcp23s17_ops = {
260 .read = mcp23s17_read,
261 .write = mcp23s17_write,
262 .read_regs = mcp23s17_read_regs,
263 };
264
265 #endif /* CONFIG_SPI_MASTER */
266
267 /*----------------------------------------------------------------------*/
268
mcp23s08_direction_input(struct gpio_chip * chip,unsigned offset)269 static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
270 {
271 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
272 int status;
273
274 mutex_lock(&mcp->lock);
275 mcp->cache[MCP_IODIR] |= (1 << offset);
276 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
277 mutex_unlock(&mcp->lock);
278 return status;
279 }
280
mcp23s08_get(struct gpio_chip * chip,unsigned offset)281 static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
282 {
283 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
284 int status;
285
286 mutex_lock(&mcp->lock);
287
288 /* REVISIT reading this clears any IRQ ... */
289 status = mcp->ops->read(mcp, MCP_GPIO);
290 if (status < 0)
291 status = 0;
292 else {
293 mcp->cache[MCP_GPIO] = status;
294 status = !!(status & (1 << offset));
295 }
296 mutex_unlock(&mcp->lock);
297 return status;
298 }
299
__mcp23s08_set(struct mcp23s08 * mcp,unsigned mask,int value)300 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
301 {
302 unsigned olat = mcp->cache[MCP_OLAT];
303
304 if (value)
305 olat |= mask;
306 else
307 olat &= ~mask;
308 mcp->cache[MCP_OLAT] = olat;
309 return mcp->ops->write(mcp, MCP_OLAT, olat);
310 }
311
mcp23s08_set(struct gpio_chip * chip,unsigned offset,int value)312 static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
313 {
314 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
315 unsigned mask = 1 << offset;
316
317 mutex_lock(&mcp->lock);
318 __mcp23s08_set(mcp, mask, value);
319 mutex_unlock(&mcp->lock);
320 }
321
322 static int
mcp23s08_direction_output(struct gpio_chip * chip,unsigned offset,int value)323 mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
324 {
325 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
326 unsigned mask = 1 << offset;
327 int status;
328
329 mutex_lock(&mcp->lock);
330 status = __mcp23s08_set(mcp, mask, value);
331 if (status == 0) {
332 mcp->cache[MCP_IODIR] &= ~mask;
333 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
334 }
335 mutex_unlock(&mcp->lock);
336 return status;
337 }
338
339 /*----------------------------------------------------------------------*/
mcp23s08_irq(int irq,void * data)340 static irqreturn_t mcp23s08_irq(int irq, void *data)
341 {
342 struct mcp23s08 *mcp = data;
343 int intcap, intf, i;
344 unsigned int child_irq;
345
346 mutex_lock(&mcp->lock);
347 intf = mcp->ops->read(mcp, MCP_INTF);
348 if (intf < 0) {
349 mutex_unlock(&mcp->lock);
350 return IRQ_HANDLED;
351 }
352
353 mcp->cache[MCP_INTF] = intf;
354
355 intcap = mcp->ops->read(mcp, MCP_INTCAP);
356 if (intcap < 0) {
357 mutex_unlock(&mcp->lock);
358 return IRQ_HANDLED;
359 }
360
361 mcp->cache[MCP_INTCAP] = intcap;
362 mutex_unlock(&mcp->lock);
363
364
365 for (i = 0; i < mcp->chip.ngpio; i++) {
366 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
367 ((BIT(i) & intcap & mcp->irq_rise) ||
368 (mcp->irq_fall & ~intcap & BIT(i)))) {
369 child_irq = irq_find_mapping(mcp->irq_domain, i);
370 handle_nested_irq(child_irq);
371 }
372 }
373
374 return IRQ_HANDLED;
375 }
376
mcp23s08_gpio_to_irq(struct gpio_chip * chip,unsigned offset)377 static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
378 {
379 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
380
381 return irq_find_mapping(mcp->irq_domain, offset);
382 }
383
mcp23s08_irq_mask(struct irq_data * data)384 static void mcp23s08_irq_mask(struct irq_data *data)
385 {
386 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
387 unsigned int pos = data->hwirq;
388
389 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
390 }
391
mcp23s08_irq_unmask(struct irq_data * data)392 static void mcp23s08_irq_unmask(struct irq_data *data)
393 {
394 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
395 unsigned int pos = data->hwirq;
396
397 mcp->cache[MCP_GPINTEN] |= BIT(pos);
398 }
399
mcp23s08_irq_set_type(struct irq_data * data,unsigned int type)400 static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
401 {
402 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
403 unsigned int pos = data->hwirq;
404 int status = 0;
405
406 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
407 mcp->cache[MCP_INTCON] &= ~BIT(pos);
408 mcp->irq_rise |= BIT(pos);
409 mcp->irq_fall |= BIT(pos);
410 } else if (type & IRQ_TYPE_EDGE_RISING) {
411 mcp->cache[MCP_INTCON] &= ~BIT(pos);
412 mcp->irq_rise |= BIT(pos);
413 mcp->irq_fall &= ~BIT(pos);
414 } else if (type & IRQ_TYPE_EDGE_FALLING) {
415 mcp->cache[MCP_INTCON] &= ~BIT(pos);
416 mcp->irq_rise &= ~BIT(pos);
417 mcp->irq_fall |= BIT(pos);
418 } else
419 return -EINVAL;
420
421 return status;
422 }
423
mcp23s08_irq_bus_lock(struct irq_data * data)424 static void mcp23s08_irq_bus_lock(struct irq_data *data)
425 {
426 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
427
428 mutex_lock(&mcp->irq_lock);
429 }
430
mcp23s08_irq_bus_unlock(struct irq_data * data)431 static void mcp23s08_irq_bus_unlock(struct irq_data *data)
432 {
433 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
434
435 mutex_lock(&mcp->lock);
436 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
437 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
438 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
439 mutex_unlock(&mcp->lock);
440 mutex_unlock(&mcp->irq_lock);
441 }
442
mcp23s08_irq_reqres(struct irq_data * data)443 static int mcp23s08_irq_reqres(struct irq_data *data)
444 {
445 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
446
447 if (gpio_lock_as_irq(&mcp->chip, data->hwirq)) {
448 dev_err(mcp->chip.dev,
449 "unable to lock HW IRQ %lu for IRQ usage\n",
450 data->hwirq);
451 return -EINVAL;
452 }
453
454 return 0;
455 }
456
mcp23s08_irq_relres(struct irq_data * data)457 static void mcp23s08_irq_relres(struct irq_data *data)
458 {
459 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
460
461 gpio_unlock_as_irq(&mcp->chip, data->hwirq);
462 }
463
464 static struct irq_chip mcp23s08_irq_chip = {
465 .name = "gpio-mcp23xxx",
466 .irq_mask = mcp23s08_irq_mask,
467 .irq_unmask = mcp23s08_irq_unmask,
468 .irq_set_type = mcp23s08_irq_set_type,
469 .irq_bus_lock = mcp23s08_irq_bus_lock,
470 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
471 .irq_request_resources = mcp23s08_irq_reqres,
472 .irq_release_resources = mcp23s08_irq_relres,
473 };
474
mcp23s08_irq_setup(struct mcp23s08 * mcp)475 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
476 {
477 struct gpio_chip *chip = &mcp->chip;
478 int err, irq, j;
479
480 mutex_init(&mcp->irq_lock);
481
482 mcp->irq_domain = irq_domain_add_linear(chip->dev->of_node, chip->ngpio,
483 &irq_domain_simple_ops, mcp);
484 if (!mcp->irq_domain)
485 return -ENODEV;
486
487 err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq,
488 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
489 dev_name(chip->dev), mcp);
490 if (err != 0) {
491 dev_err(chip->dev, "unable to request IRQ#%d: %d\n",
492 mcp->irq, err);
493 return err;
494 }
495
496 chip->to_irq = mcp23s08_gpio_to_irq;
497
498 for (j = 0; j < mcp->chip.ngpio; j++) {
499 irq = irq_create_mapping(mcp->irq_domain, j);
500 irq_set_lockdep_class(irq, &gpio_lock_class);
501 irq_set_chip_data(irq, mcp);
502 irq_set_chip(irq, &mcp23s08_irq_chip);
503 irq_set_nested_thread(irq, true);
504 #ifdef CONFIG_ARM
505 set_irq_flags(irq, IRQF_VALID);
506 #else
507 irq_set_noprobe(irq);
508 #endif
509 }
510 return 0;
511 }
512
mcp23s08_irq_teardown(struct mcp23s08 * mcp)513 static void mcp23s08_irq_teardown(struct mcp23s08 *mcp)
514 {
515 unsigned int irq, i;
516
517 free_irq(mcp->irq, mcp);
518
519 for (i = 0; i < mcp->chip.ngpio; i++) {
520 irq = irq_find_mapping(mcp->irq_domain, i);
521 if (irq > 0)
522 irq_dispose_mapping(irq);
523 }
524
525 irq_domain_remove(mcp->irq_domain);
526 }
527
528 /*----------------------------------------------------------------------*/
529
530 #ifdef CONFIG_DEBUG_FS
531
532 #include <linux/seq_file.h>
533
534 /*
535 * This shows more info than the generic gpio dump code:
536 * pullups, deglitching, open drain drive.
537 */
mcp23s08_dbg_show(struct seq_file * s,struct gpio_chip * chip)538 static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
539 {
540 struct mcp23s08 *mcp;
541 char bank;
542 int t;
543 unsigned mask;
544
545 mcp = container_of(chip, struct mcp23s08, chip);
546
547 /* NOTE: we only handle one bank for now ... */
548 bank = '0' + ((mcp->addr >> 1) & 0x7);
549
550 mutex_lock(&mcp->lock);
551 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
552 if (t < 0) {
553 seq_printf(s, " I/O ERROR %d\n", t);
554 goto done;
555 }
556
557 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
558 const char *label;
559
560 label = gpiochip_is_requested(chip, t);
561 if (!label)
562 continue;
563
564 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
565 chip->base + t, bank, t, label,
566 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
567 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
568 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
569 /* NOTE: ignoring the irq-related registers */
570 seq_puts(s, "\n");
571 }
572 done:
573 mutex_unlock(&mcp->lock);
574 }
575
576 #else
577 #define mcp23s08_dbg_show NULL
578 #endif
579
580 /*----------------------------------------------------------------------*/
581
mcp23s08_probe_one(struct mcp23s08 * mcp,struct device * dev,void * data,unsigned addr,unsigned type,struct mcp23s08_platform_data * pdata,int cs)582 static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
583 void *data, unsigned addr, unsigned type,
584 struct mcp23s08_platform_data *pdata, int cs)
585 {
586 int status;
587 bool mirror = false;
588
589 mutex_init(&mcp->lock);
590
591 mcp->data = data;
592 mcp->addr = addr;
593
594 mcp->chip.direction_input = mcp23s08_direction_input;
595 mcp->chip.get = mcp23s08_get;
596 mcp->chip.direction_output = mcp23s08_direction_output;
597 mcp->chip.set = mcp23s08_set;
598 mcp->chip.dbg_show = mcp23s08_dbg_show;
599 #ifdef CONFIG_OF
600 mcp->chip.of_gpio_n_cells = 2;
601 mcp->chip.of_node = dev->of_node;
602 #endif
603
604 switch (type) {
605 #ifdef CONFIG_SPI_MASTER
606 case MCP_TYPE_S08:
607 mcp->ops = &mcp23s08_ops;
608 mcp->chip.ngpio = 8;
609 mcp->chip.label = "mcp23s08";
610 break;
611
612 case MCP_TYPE_S17:
613 mcp->ops = &mcp23s17_ops;
614 mcp->chip.ngpio = 16;
615 mcp->chip.label = "mcp23s17";
616 break;
617 #endif /* CONFIG_SPI_MASTER */
618
619 #if IS_ENABLED(CONFIG_I2C)
620 case MCP_TYPE_008:
621 mcp->ops = &mcp23008_ops;
622 mcp->chip.ngpio = 8;
623 mcp->chip.label = "mcp23008";
624 break;
625
626 case MCP_TYPE_017:
627 mcp->ops = &mcp23017_ops;
628 mcp->chip.ngpio = 16;
629 mcp->chip.label = "mcp23017";
630 break;
631 #endif /* CONFIG_I2C */
632
633 default:
634 dev_err(dev, "invalid device type (%d)\n", type);
635 return -EINVAL;
636 }
637
638 mcp->chip.base = pdata->base;
639 mcp->chip.can_sleep = true;
640 mcp->chip.dev = dev;
641 mcp->chip.owner = THIS_MODULE;
642
643 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
644 * and MCP_IOCON.HAEN = 1, so we work with all chips.
645 */
646
647 status = mcp->ops->read(mcp, MCP_IOCON);
648 if (status < 0)
649 goto fail;
650
651 mcp->irq_controller = pdata->irq_controller;
652 if (mcp->irq && mcp->irq_controller && (type == MCP_TYPE_017))
653 mirror = pdata->mirror;
654
655 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror) {
656 /* mcp23s17 has IOCON twice, make sure they are in sync */
657 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
658 status |= IOCON_HAEN | (IOCON_HAEN << 8);
659 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
660 if (mirror)
661 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
662
663 status = mcp->ops->write(mcp, MCP_IOCON, status);
664 if (status < 0)
665 goto fail;
666 }
667
668 /* configure ~100K pullups */
669 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
670 if (status < 0)
671 goto fail;
672
673 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
674 if (status < 0)
675 goto fail;
676
677 /* disable inverter on input */
678 if (mcp->cache[MCP_IPOL] != 0) {
679 mcp->cache[MCP_IPOL] = 0;
680 status = mcp->ops->write(mcp, MCP_IPOL, 0);
681 if (status < 0)
682 goto fail;
683 }
684
685 /* disable irqs */
686 if (mcp->cache[MCP_GPINTEN] != 0) {
687 mcp->cache[MCP_GPINTEN] = 0;
688 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
689 if (status < 0)
690 goto fail;
691 }
692
693 status = gpiochip_add(&mcp->chip);
694 if (status < 0)
695 goto fail;
696
697 if (mcp->irq && mcp->irq_controller) {
698 status = mcp23s08_irq_setup(mcp);
699 if (status) {
700 mcp23s08_irq_teardown(mcp);
701 goto fail;
702 }
703 }
704 fail:
705 if (status < 0)
706 dev_dbg(dev, "can't setup chip %d, --> %d\n",
707 addr, status);
708 return status;
709 }
710
711 /*----------------------------------------------------------------------*/
712
713 #ifdef CONFIG_OF
714 #ifdef CONFIG_SPI_MASTER
715 static const struct of_device_id mcp23s08_spi_of_match[] = {
716 {
717 .compatible = "microchip,mcp23s08",
718 .data = (void *) MCP_TYPE_S08,
719 },
720 {
721 .compatible = "microchip,mcp23s17",
722 .data = (void *) MCP_TYPE_S17,
723 },
724 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
725 {
726 .compatible = "mcp,mcp23s08",
727 .data = (void *) MCP_TYPE_S08,
728 },
729 {
730 .compatible = "mcp,mcp23s17",
731 .data = (void *) MCP_TYPE_S17,
732 },
733 { },
734 };
735 MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
736 #endif
737
738 #if IS_ENABLED(CONFIG_I2C)
739 static const struct of_device_id mcp23s08_i2c_of_match[] = {
740 {
741 .compatible = "microchip,mcp23008",
742 .data = (void *) MCP_TYPE_008,
743 },
744 {
745 .compatible = "microchip,mcp23017",
746 .data = (void *) MCP_TYPE_017,
747 },
748 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
749 {
750 .compatible = "mcp,mcp23008",
751 .data = (void *) MCP_TYPE_008,
752 },
753 {
754 .compatible = "mcp,mcp23017",
755 .data = (void *) MCP_TYPE_017,
756 },
757 { },
758 };
759 MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
760 #endif
761 #endif /* CONFIG_OF */
762
763
764 #if IS_ENABLED(CONFIG_I2C)
765
mcp230xx_probe(struct i2c_client * client,const struct i2c_device_id * id)766 static int mcp230xx_probe(struct i2c_client *client,
767 const struct i2c_device_id *id)
768 {
769 struct mcp23s08_platform_data *pdata, local_pdata;
770 struct mcp23s08 *mcp;
771 int status;
772 const struct of_device_id *match;
773
774 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
775 &client->dev);
776 if (match) {
777 pdata = &local_pdata;
778 pdata->base = -1;
779 pdata->chip[0].pullups = 0;
780 pdata->irq_controller = of_property_read_bool(
781 client->dev.of_node,
782 "interrupt-controller");
783 pdata->mirror = of_property_read_bool(client->dev.of_node,
784 "microchip,irq-mirror");
785 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
786 } else {
787 pdata = dev_get_platdata(&client->dev);
788 if (!pdata) {
789 pdata = devm_kzalloc(&client->dev,
790 sizeof(struct mcp23s08_platform_data),
791 GFP_KERNEL);
792 pdata->base = -1;
793 }
794 }
795
796 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
797 if (!mcp)
798 return -ENOMEM;
799
800 mcp->irq = client->irq;
801 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
802 id->driver_data, pdata, 0);
803 if (status)
804 goto fail;
805
806 i2c_set_clientdata(client, mcp);
807
808 return 0;
809
810 fail:
811 kfree(mcp);
812
813 return status;
814 }
815
mcp230xx_remove(struct i2c_client * client)816 static int mcp230xx_remove(struct i2c_client *client)
817 {
818 struct mcp23s08 *mcp = i2c_get_clientdata(client);
819
820 if (client->irq && mcp->irq_controller)
821 mcp23s08_irq_teardown(mcp);
822
823 gpiochip_remove(&mcp->chip);
824 kfree(mcp);
825
826 return 0;
827 }
828
829 static const struct i2c_device_id mcp230xx_id[] = {
830 { "mcp23008", MCP_TYPE_008 },
831 { "mcp23017", MCP_TYPE_017 },
832 { },
833 };
834 MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
835
836 static struct i2c_driver mcp230xx_driver = {
837 .driver = {
838 .name = "mcp230xx",
839 .owner = THIS_MODULE,
840 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
841 },
842 .probe = mcp230xx_probe,
843 .remove = mcp230xx_remove,
844 .id_table = mcp230xx_id,
845 };
846
mcp23s08_i2c_init(void)847 static int __init mcp23s08_i2c_init(void)
848 {
849 return i2c_add_driver(&mcp230xx_driver);
850 }
851
mcp23s08_i2c_exit(void)852 static void mcp23s08_i2c_exit(void)
853 {
854 i2c_del_driver(&mcp230xx_driver);
855 }
856
857 #else
858
mcp23s08_i2c_init(void)859 static int __init mcp23s08_i2c_init(void) { return 0; }
mcp23s08_i2c_exit(void)860 static void mcp23s08_i2c_exit(void) { }
861
862 #endif /* CONFIG_I2C */
863
864 /*----------------------------------------------------------------------*/
865
866 #ifdef CONFIG_SPI_MASTER
867
mcp23s08_probe(struct spi_device * spi)868 static int mcp23s08_probe(struct spi_device *spi)
869 {
870 struct mcp23s08_platform_data *pdata, local_pdata;
871 unsigned addr;
872 int chips = 0;
873 struct mcp23s08_driver_data *data;
874 int status, type;
875 unsigned ngpio = 0;
876 const struct of_device_id *match;
877 u32 spi_present_mask = 0;
878
879 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
880 if (match) {
881 type = (int)(uintptr_t)match->data;
882 status = of_property_read_u32(spi->dev.of_node,
883 "microchip,spi-present-mask", &spi_present_mask);
884 if (status) {
885 status = of_property_read_u32(spi->dev.of_node,
886 "mcp,spi-present-mask", &spi_present_mask);
887 if (status) {
888 dev_err(&spi->dev,
889 "DT has no spi-present-mask\n");
890 return -ENODEV;
891 }
892 }
893 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
894 dev_err(&spi->dev, "invalid spi-present-mask\n");
895 return -ENODEV;
896 }
897
898 pdata = &local_pdata;
899 pdata->base = -1;
900 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
901 pdata->chip[addr].pullups = 0;
902 if (spi_present_mask & (1 << addr))
903 chips++;
904 }
905 pdata->irq_controller = of_property_read_bool(
906 spi->dev.of_node,
907 "interrupt-controller");
908 pdata->mirror = of_property_read_bool(spi->dev.of_node,
909 "microchip,irq-mirror");
910 } else {
911 type = spi_get_device_id(spi)->driver_data;
912 pdata = dev_get_platdata(&spi->dev);
913 if (!pdata) {
914 pdata = devm_kzalloc(&spi->dev,
915 sizeof(struct mcp23s08_platform_data),
916 GFP_KERNEL);
917 pdata->base = -1;
918 }
919
920 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
921 if (!pdata->chip[addr].is_present)
922 continue;
923 chips++;
924 if ((type == MCP_TYPE_S08) && (addr > 3)) {
925 dev_err(&spi->dev,
926 "mcp23s08 only supports address 0..3\n");
927 return -EINVAL;
928 }
929 spi_present_mask |= 1 << addr;
930 }
931 }
932
933 if (!chips)
934 return -ENODEV;
935
936 data = kzalloc(sizeof(*data) + chips * sizeof(struct mcp23s08),
937 GFP_KERNEL);
938 if (!data)
939 return -ENOMEM;
940 spi_set_drvdata(spi, data);
941
942 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
943 if (!(spi_present_mask & (1 << addr)))
944 continue;
945 chips--;
946 data->mcp[addr] = &data->chip[chips];
947 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
948 0x40 | (addr << 1), type, pdata,
949 addr);
950 if (status < 0)
951 goto fail;
952
953 if (pdata->base != -1)
954 pdata->base += (type == MCP_TYPE_S17) ? 16 : 8;
955 ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
956 }
957 data->ngpio = ngpio;
958
959 /* NOTE: these chips have a relatively sane IRQ framework, with
960 * per-signal masking and level/edge triggering. It's not yet
961 * handled here...
962 */
963
964 return 0;
965
966 fail:
967 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
968
969 if (!data->mcp[addr])
970 continue;
971 gpiochip_remove(&data->mcp[addr]->chip);
972 }
973 kfree(data);
974 return status;
975 }
976
mcp23s08_remove(struct spi_device * spi)977 static int mcp23s08_remove(struct spi_device *spi)
978 {
979 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
980 unsigned addr;
981
982 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
983
984 if (!data->mcp[addr])
985 continue;
986
987 gpiochip_remove(&data->mcp[addr]->chip);
988 }
989 kfree(data);
990 return 0;
991 }
992
993 static const struct spi_device_id mcp23s08_ids[] = {
994 { "mcp23s08", MCP_TYPE_S08 },
995 { "mcp23s17", MCP_TYPE_S17 },
996 { },
997 };
998 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
999
1000 static struct spi_driver mcp23s08_driver = {
1001 .probe = mcp23s08_probe,
1002 .remove = mcp23s08_remove,
1003 .id_table = mcp23s08_ids,
1004 .driver = {
1005 .name = "mcp23s08",
1006 .owner = THIS_MODULE,
1007 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1008 },
1009 };
1010
mcp23s08_spi_init(void)1011 static int __init mcp23s08_spi_init(void)
1012 {
1013 return spi_register_driver(&mcp23s08_driver);
1014 }
1015
mcp23s08_spi_exit(void)1016 static void mcp23s08_spi_exit(void)
1017 {
1018 spi_unregister_driver(&mcp23s08_driver);
1019 }
1020
1021 #else
1022
mcp23s08_spi_init(void)1023 static int __init mcp23s08_spi_init(void) { return 0; }
mcp23s08_spi_exit(void)1024 static void mcp23s08_spi_exit(void) { }
1025
1026 #endif /* CONFIG_SPI_MASTER */
1027
1028 /*----------------------------------------------------------------------*/
1029
mcp23s08_init(void)1030 static int __init mcp23s08_init(void)
1031 {
1032 int ret;
1033
1034 ret = mcp23s08_spi_init();
1035 if (ret)
1036 goto spi_fail;
1037
1038 ret = mcp23s08_i2c_init();
1039 if (ret)
1040 goto i2c_fail;
1041
1042 return 0;
1043
1044 i2c_fail:
1045 mcp23s08_spi_exit();
1046 spi_fail:
1047 return ret;
1048 }
1049 /* register after spi/i2c postcore initcall and before
1050 * subsys initcalls that may rely on these GPIOs
1051 */
1052 subsys_initcall(mcp23s08_init);
1053
mcp23s08_exit(void)1054 static void __exit mcp23s08_exit(void)
1055 {
1056 mcp23s08_spi_exit();
1057 mcp23s08_i2c_exit();
1058 }
1059 module_exit(mcp23s08_exit);
1060
1061 MODULE_LICENSE("GPL");
1062