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1 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  *
12  * You should have received a copy of the GNU General Public License
13  * along with this program; if not, write to the Free Software
14  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15  * 02110-1301, USA.
16  */
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/mutex.h>
24 #include <linux/slab.h>
25 #include <linux/i2c/sx150x.h>
26 
27 #define NO_UPDATE_PENDING	-1
28 
29 struct sx150x_device_data {
30 	u8 reg_pullup;
31 	u8 reg_pulldn;
32 	u8 reg_drain;
33 	u8 reg_polarity;
34 	u8 reg_dir;
35 	u8 reg_data;
36 	u8 reg_irq_mask;
37 	u8 reg_irq_src;
38 	u8 reg_sense;
39 	u8 reg_clock;
40 	u8 reg_misc;
41 	u8 reg_reset;
42 	u8 ngpios;
43 };
44 
45 struct sx150x_chip {
46 	struct gpio_chip                 gpio_chip;
47 	struct i2c_client               *client;
48 	const struct sx150x_device_data *dev_cfg;
49 	int                              irq_summary;
50 	int                              irq_base;
51 	int				 irq_update;
52 	u32                              irq_sense;
53 	u32				 irq_masked;
54 	u32				 dev_sense;
55 	u32				 dev_masked;
56 	struct irq_chip                  irq_chip;
57 	struct mutex                     lock;
58 };
59 
60 static const struct sx150x_device_data sx150x_devices[] = {
61 	[0] = { /* sx1508q */
62 		.reg_pullup   = 0x03,
63 		.reg_pulldn   = 0x04,
64 		.reg_drain    = 0x05,
65 		.reg_polarity = 0x06,
66 		.reg_dir      = 0x07,
67 		.reg_data     = 0x08,
68 		.reg_irq_mask = 0x09,
69 		.reg_irq_src  = 0x0c,
70 		.reg_sense    = 0x0b,
71 		.reg_clock    = 0x0f,
72 		.reg_misc     = 0x10,
73 		.reg_reset    = 0x7d,
74 		.ngpios       = 8
75 	},
76 	[1] = { /* sx1509q */
77 		.reg_pullup   = 0x07,
78 		.reg_pulldn   = 0x09,
79 		.reg_drain    = 0x0b,
80 		.reg_polarity = 0x0d,
81 		.reg_dir      = 0x0f,
82 		.reg_data     = 0x11,
83 		.reg_irq_mask = 0x13,
84 		.reg_irq_src  = 0x19,
85 		.reg_sense    = 0x17,
86 		.reg_clock    = 0x1e,
87 		.reg_misc     = 0x1f,
88 		.reg_reset    = 0x7d,
89 		.ngpios       = 16
90 	},
91 };
92 
93 static const struct i2c_device_id sx150x_id[] = {
94 	{"sx1508q", 0},
95 	{"sx1509q", 1},
96 	{}
97 };
98 MODULE_DEVICE_TABLE(i2c, sx150x_id);
99 
sx150x_i2c_write(struct i2c_client * client,u8 reg,u8 val)100 static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
101 {
102 	s32 err = i2c_smbus_write_byte_data(client, reg, val);
103 
104 	if (err < 0)
105 		dev_warn(&client->dev,
106 			"i2c write fail: can't write %02x to %02x: %d\n",
107 			val, reg, err);
108 	return err;
109 }
110 
sx150x_i2c_read(struct i2c_client * client,u8 reg,u8 * val)111 static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
112 {
113 	s32 err = i2c_smbus_read_byte_data(client, reg);
114 
115 	if (err >= 0)
116 		*val = err;
117 	else
118 		dev_warn(&client->dev,
119 			"i2c read fail: can't read from %02x: %d\n",
120 			reg, err);
121 	return err;
122 }
123 
offset_is_oscio(struct sx150x_chip * chip,unsigned offset)124 static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
125 {
126 	return (chip->dev_cfg->ngpios == offset);
127 }
128 
129 /*
130  * These utility functions solve the common problem of locating and setting
131  * configuration bits.  Configuration bits are grouped into registers
132  * whose indexes increase downwards.  For example, with eight-bit registers,
133  * sixteen gpios would have their config bits grouped in the following order:
134  * REGISTER N-1 [ f e d c b a 9 8 ]
135  *          N   [ 7 6 5 4 3 2 1 0 ]
136  *
137  * For multi-bit configurations, the pattern gets wider:
138  * REGISTER N-3 [ f f e e d d c c ]
139  *          N-2 [ b b a a 9 9 8 8 ]
140  *          N-1 [ 7 7 6 6 5 5 4 4 ]
141  *          N   [ 3 3 2 2 1 1 0 0 ]
142  *
143  * Given the address of the starting register 'N', the index of the gpio
144  * whose configuration we seek to change, and the width in bits of that
145  * configuration, these functions allow us to locate the correct
146  * register and mask the correct bits.
147  */
sx150x_find_cfg(u8 offset,u8 width,u8 * reg,u8 * mask,u8 * shift)148 static inline void sx150x_find_cfg(u8 offset, u8 width,
149 				u8 *reg, u8 *mask, u8 *shift)
150 {
151 	*reg   -= offset * width / 8;
152 	*mask   = (1 << width) - 1;
153 	*shift  = (offset * width) % 8;
154 	*mask <<= *shift;
155 }
156 
sx150x_write_cfg(struct sx150x_chip * chip,u8 offset,u8 width,u8 reg,u8 val)157 static s32 sx150x_write_cfg(struct sx150x_chip *chip,
158 			u8 offset, u8 width, u8 reg, u8 val)
159 {
160 	u8  mask;
161 	u8  data;
162 	u8  shift;
163 	s32 err;
164 
165 	sx150x_find_cfg(offset, width, &reg, &mask, &shift);
166 	err = sx150x_i2c_read(chip->client, reg, &data);
167 	if (err < 0)
168 		return err;
169 
170 	data &= ~mask;
171 	data |= (val << shift) & mask;
172 	return sx150x_i2c_write(chip->client, reg, data);
173 }
174 
sx150x_get_io(struct sx150x_chip * chip,unsigned offset)175 static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
176 {
177 	u8  reg = chip->dev_cfg->reg_data;
178 	u8  mask;
179 	u8  data;
180 	u8  shift;
181 	s32 err;
182 
183 	sx150x_find_cfg(offset, 1, &reg, &mask, &shift);
184 	err = sx150x_i2c_read(chip->client, reg, &data);
185 	if (err >= 0)
186 		err = (data & mask) != 0 ? 1 : 0;
187 
188 	return err;
189 }
190 
sx150x_set_oscio(struct sx150x_chip * chip,int val)191 static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
192 {
193 	sx150x_i2c_write(chip->client,
194 			chip->dev_cfg->reg_clock,
195 			(val ? 0x1f : 0x10));
196 }
197 
sx150x_set_io(struct sx150x_chip * chip,unsigned offset,int val)198 static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
199 {
200 	sx150x_write_cfg(chip,
201 			offset,
202 			1,
203 			chip->dev_cfg->reg_data,
204 			(val ? 1 : 0));
205 }
206 
sx150x_io_input(struct sx150x_chip * chip,unsigned offset)207 static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
208 {
209 	return sx150x_write_cfg(chip,
210 				offset,
211 				1,
212 				chip->dev_cfg->reg_dir,
213 				1);
214 }
215 
sx150x_io_output(struct sx150x_chip * chip,unsigned offset,int val)216 static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
217 {
218 	int err;
219 
220 	err = sx150x_write_cfg(chip,
221 			offset,
222 			1,
223 			chip->dev_cfg->reg_data,
224 			(val ? 1 : 0));
225 	if (err >= 0)
226 		err = sx150x_write_cfg(chip,
227 				offset,
228 				1,
229 				chip->dev_cfg->reg_dir,
230 				0);
231 	return err;
232 }
233 
sx150x_gpio_get(struct gpio_chip * gc,unsigned offset)234 static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
235 {
236 	struct sx150x_chip *chip;
237 	int status = -EINVAL;
238 
239 	chip = container_of(gc, struct sx150x_chip, gpio_chip);
240 
241 	if (!offset_is_oscio(chip, offset)) {
242 		mutex_lock(&chip->lock);
243 		status = sx150x_get_io(chip, offset);
244 		mutex_unlock(&chip->lock);
245 	}
246 
247 	return status;
248 }
249 
sx150x_gpio_set(struct gpio_chip * gc,unsigned offset,int val)250 static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
251 {
252 	struct sx150x_chip *chip;
253 
254 	chip = container_of(gc, struct sx150x_chip, gpio_chip);
255 
256 	mutex_lock(&chip->lock);
257 	if (offset_is_oscio(chip, offset))
258 		sx150x_set_oscio(chip, val);
259 	else
260 		sx150x_set_io(chip, offset, val);
261 	mutex_unlock(&chip->lock);
262 }
263 
sx150x_gpio_direction_input(struct gpio_chip * gc,unsigned offset)264 static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
265 {
266 	struct sx150x_chip *chip;
267 	int status = -EINVAL;
268 
269 	chip = container_of(gc, struct sx150x_chip, gpio_chip);
270 
271 	if (!offset_is_oscio(chip, offset)) {
272 		mutex_lock(&chip->lock);
273 		status = sx150x_io_input(chip, offset);
274 		mutex_unlock(&chip->lock);
275 	}
276 	return status;
277 }
278 
sx150x_gpio_direction_output(struct gpio_chip * gc,unsigned offset,int val)279 static int sx150x_gpio_direction_output(struct gpio_chip *gc,
280 					unsigned offset,
281 					int val)
282 {
283 	struct sx150x_chip *chip;
284 	int status = 0;
285 
286 	chip = container_of(gc, struct sx150x_chip, gpio_chip);
287 
288 	if (!offset_is_oscio(chip, offset)) {
289 		mutex_lock(&chip->lock);
290 		status = sx150x_io_output(chip, offset, val);
291 		mutex_unlock(&chip->lock);
292 	}
293 	return status;
294 }
295 
sx150x_gpio_to_irq(struct gpio_chip * gc,unsigned offset)296 static int sx150x_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
297 {
298 	struct sx150x_chip *chip;
299 
300 	chip = container_of(gc, struct sx150x_chip, gpio_chip);
301 
302 	if (offset >= chip->dev_cfg->ngpios)
303 		return -EINVAL;
304 
305 	if (chip->irq_base < 0)
306 		return -EINVAL;
307 
308 	return chip->irq_base + offset;
309 }
310 
sx150x_irq_mask(struct irq_data * d)311 static void sx150x_irq_mask(struct irq_data *d)
312 {
313 	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
314 	unsigned n;
315 
316 	n = d->irq - chip->irq_base;
317 	chip->irq_masked |= (1 << n);
318 	chip->irq_update = n;
319 }
320 
sx150x_irq_unmask(struct irq_data * d)321 static void sx150x_irq_unmask(struct irq_data *d)
322 {
323 	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
324 	unsigned n;
325 
326 	n = d->irq - chip->irq_base;
327 	chip->irq_masked &= ~(1 << n);
328 	chip->irq_update = n;
329 }
330 
sx150x_irq_set_type(struct irq_data * d,unsigned int flow_type)331 static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
332 {
333 	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
334 	unsigned n, val = 0;
335 
336 	if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
337 		return -EINVAL;
338 
339 	n = d->irq - chip->irq_base;
340 
341 	if (flow_type & IRQ_TYPE_EDGE_RISING)
342 		val |= 0x1;
343 	if (flow_type & IRQ_TYPE_EDGE_FALLING)
344 		val |= 0x2;
345 
346 	chip->irq_sense &= ~(3UL << (n * 2));
347 	chip->irq_sense |= val << (n * 2);
348 	chip->irq_update = n;
349 	return 0;
350 }
351 
sx150x_irq_thread_fn(int irq,void * dev_id)352 static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
353 {
354 	struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
355 	unsigned nhandled = 0;
356 	unsigned sub_irq;
357 	unsigned n;
358 	s32 err;
359 	u8 val;
360 	int i;
361 
362 	for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
363 		err = sx150x_i2c_read(chip->client,
364 				      chip->dev_cfg->reg_irq_src - i,
365 				      &val);
366 		if (err < 0)
367 			continue;
368 
369 		sx150x_i2c_write(chip->client,
370 				chip->dev_cfg->reg_irq_src - i,
371 				val);
372 		for (n = 0; n < 8; ++n) {
373 			if (val & (1 << n)) {
374 				sub_irq = chip->irq_base + (i * 8) + n;
375 				handle_nested_irq(sub_irq);
376 				++nhandled;
377 			}
378 		}
379 	}
380 
381 	return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
382 }
383 
sx150x_irq_bus_lock(struct irq_data * d)384 static void sx150x_irq_bus_lock(struct irq_data *d)
385 {
386 	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
387 
388 	mutex_lock(&chip->lock);
389 }
390 
sx150x_irq_bus_sync_unlock(struct irq_data * d)391 static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
392 {
393 	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
394 	unsigned n;
395 
396 	if (chip->irq_update == NO_UPDATE_PENDING)
397 		goto out;
398 
399 	n = chip->irq_update;
400 	chip->irq_update = NO_UPDATE_PENDING;
401 
402 	/* Avoid updates if nothing changed */
403 	if (chip->dev_sense == chip->irq_sense &&
404 	    chip->dev_sense == chip->irq_masked)
405 		goto out;
406 
407 	chip->dev_sense = chip->irq_sense;
408 	chip->dev_masked = chip->irq_masked;
409 
410 	if (chip->irq_masked & (1 << n)) {
411 		sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
412 		sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
413 	} else {
414 		sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
415 		sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
416 				 chip->irq_sense >> (n * 2));
417 	}
418 out:
419 	mutex_unlock(&chip->lock);
420 }
421 
sx150x_init_chip(struct sx150x_chip * chip,struct i2c_client * client,kernel_ulong_t driver_data,struct sx150x_platform_data * pdata)422 static void sx150x_init_chip(struct sx150x_chip *chip,
423 			struct i2c_client *client,
424 			kernel_ulong_t driver_data,
425 			struct sx150x_platform_data *pdata)
426 {
427 	mutex_init(&chip->lock);
428 
429 	chip->client                     = client;
430 	chip->dev_cfg                    = &sx150x_devices[driver_data];
431 	chip->gpio_chip.label            = client->name;
432 	chip->gpio_chip.direction_input  = sx150x_gpio_direction_input;
433 	chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
434 	chip->gpio_chip.get              = sx150x_gpio_get;
435 	chip->gpio_chip.set              = sx150x_gpio_set;
436 	chip->gpio_chip.to_irq           = sx150x_gpio_to_irq;
437 	chip->gpio_chip.base             = pdata->gpio_base;
438 	chip->gpio_chip.can_sleep        = true;
439 	chip->gpio_chip.ngpio            = chip->dev_cfg->ngpios;
440 	if (pdata->oscio_is_gpo)
441 		++chip->gpio_chip.ngpio;
442 
443 	chip->irq_chip.name                = client->name;
444 	chip->irq_chip.irq_mask            = sx150x_irq_mask;
445 	chip->irq_chip.irq_unmask          = sx150x_irq_unmask;
446 	chip->irq_chip.irq_set_type        = sx150x_irq_set_type;
447 	chip->irq_chip.irq_bus_lock        = sx150x_irq_bus_lock;
448 	chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
449 	chip->irq_summary                  = -1;
450 	chip->irq_base                     = -1;
451 	chip->irq_masked                   = ~0;
452 	chip->irq_sense                    = 0;
453 	chip->dev_masked                   = ~0;
454 	chip->dev_sense                    = 0;
455 	chip->irq_update		   = NO_UPDATE_PENDING;
456 }
457 
sx150x_init_io(struct sx150x_chip * chip,u8 base,u16 cfg)458 static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
459 {
460 	int err = 0;
461 	unsigned n;
462 
463 	for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
464 		err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
465 	return err;
466 }
467 
sx150x_reset(struct sx150x_chip * chip)468 static int sx150x_reset(struct sx150x_chip *chip)
469 {
470 	int err;
471 
472 	err = i2c_smbus_write_byte_data(chip->client,
473 					chip->dev_cfg->reg_reset,
474 					0x12);
475 	if (err < 0)
476 		return err;
477 
478 	err = i2c_smbus_write_byte_data(chip->client,
479 					chip->dev_cfg->reg_reset,
480 					0x34);
481 	return err;
482 }
483 
sx150x_init_hw(struct sx150x_chip * chip,struct sx150x_platform_data * pdata)484 static int sx150x_init_hw(struct sx150x_chip *chip,
485 			struct sx150x_platform_data *pdata)
486 {
487 	int err = 0;
488 
489 	if (pdata->reset_during_probe) {
490 		err = sx150x_reset(chip);
491 		if (err < 0)
492 			return err;
493 	}
494 
495 	err = sx150x_i2c_write(chip->client,
496 			chip->dev_cfg->reg_misc,
497 			0x01);
498 	if (err < 0)
499 		return err;
500 
501 	err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
502 			pdata->io_pullup_ena);
503 	if (err < 0)
504 		return err;
505 
506 	err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
507 			pdata->io_pulldn_ena);
508 	if (err < 0)
509 		return err;
510 
511 	err = sx150x_init_io(chip, chip->dev_cfg->reg_drain,
512 			pdata->io_open_drain_ena);
513 	if (err < 0)
514 		return err;
515 
516 	err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity,
517 			pdata->io_polarity);
518 	if (err < 0)
519 		return err;
520 
521 	if (pdata->oscio_is_gpo)
522 		sx150x_set_oscio(chip, 0);
523 
524 	return err;
525 }
526 
sx150x_install_irq_chip(struct sx150x_chip * chip,int irq_summary,int irq_base)527 static int sx150x_install_irq_chip(struct sx150x_chip *chip,
528 				int irq_summary,
529 				int irq_base)
530 {
531 	int err;
532 	unsigned n;
533 	unsigned irq;
534 
535 	chip->irq_summary = irq_summary;
536 	chip->irq_base    = irq_base;
537 
538 	for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
539 		irq = irq_base + n;
540 		irq_set_chip_data(irq, chip);
541 		irq_set_chip_and_handler(irq, &chip->irq_chip, handle_edge_irq);
542 		irq_set_nested_thread(irq, 1);
543 #ifdef CONFIG_ARM
544 		set_irq_flags(irq, IRQF_VALID);
545 #else
546 		irq_set_noprobe(irq);
547 #endif
548 	}
549 
550 	err = devm_request_threaded_irq(&chip->client->dev,
551 				irq_summary,
552 				NULL,
553 				sx150x_irq_thread_fn,
554 				IRQF_SHARED | IRQF_TRIGGER_FALLING,
555 				chip->irq_chip.name,
556 				chip);
557 	if (err < 0) {
558 		chip->irq_summary = -1;
559 		chip->irq_base    = -1;
560 	}
561 
562 	return err;
563 }
564 
sx150x_remove_irq_chip(struct sx150x_chip * chip)565 static void sx150x_remove_irq_chip(struct sx150x_chip *chip)
566 {
567 	unsigned n;
568 	unsigned irq;
569 
570 	for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
571 		irq = chip->irq_base + n;
572 		irq_set_chip_and_handler(irq, NULL, NULL);
573 	}
574 }
575 
sx150x_probe(struct i2c_client * client,const struct i2c_device_id * id)576 static int sx150x_probe(struct i2c_client *client,
577 				const struct i2c_device_id *id)
578 {
579 	static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
580 				     I2C_FUNC_SMBUS_WRITE_WORD_DATA;
581 	struct sx150x_platform_data *pdata;
582 	struct sx150x_chip *chip;
583 	int rc;
584 
585 	pdata = dev_get_platdata(&client->dev);
586 	if (!pdata)
587 		return -EINVAL;
588 
589 	if (!i2c_check_functionality(client->adapter, i2c_funcs))
590 		return -ENOSYS;
591 
592 	chip = devm_kzalloc(&client->dev,
593 		sizeof(struct sx150x_chip), GFP_KERNEL);
594 	if (!chip)
595 		return -ENOMEM;
596 
597 	sx150x_init_chip(chip, client, id->driver_data, pdata);
598 	rc = sx150x_init_hw(chip, pdata);
599 	if (rc < 0)
600 		return rc;
601 
602 	rc = gpiochip_add(&chip->gpio_chip);
603 	if (rc)
604 		return rc;
605 
606 	if (pdata->irq_summary >= 0) {
607 		rc = sx150x_install_irq_chip(chip,
608 					pdata->irq_summary,
609 					pdata->irq_base);
610 		if (rc < 0)
611 			goto probe_fail_post_gpiochip_add;
612 	}
613 
614 	i2c_set_clientdata(client, chip);
615 
616 	return 0;
617 probe_fail_post_gpiochip_add:
618 	gpiochip_remove(&chip->gpio_chip);
619 	return rc;
620 }
621 
sx150x_remove(struct i2c_client * client)622 static int sx150x_remove(struct i2c_client *client)
623 {
624 	struct sx150x_chip *chip;
625 
626 	chip = i2c_get_clientdata(client);
627 	gpiochip_remove(&chip->gpio_chip);
628 
629 	if (chip->irq_summary >= 0)
630 		sx150x_remove_irq_chip(chip);
631 
632 	return 0;
633 }
634 
635 static struct i2c_driver sx150x_driver = {
636 	.driver = {
637 		.name = "sx150x",
638 		.owner = THIS_MODULE
639 	},
640 	.probe    = sx150x_probe,
641 	.remove   = sx150x_remove,
642 	.id_table = sx150x_id,
643 };
644 
sx150x_init(void)645 static int __init sx150x_init(void)
646 {
647 	return i2c_add_driver(&sx150x_driver);
648 }
649 subsys_initcall(sx150x_init);
650 
sx150x_exit(void)651 static void __exit sx150x_exit(void)
652 {
653 	return i2c_del_driver(&sx150x_driver);
654 }
655 module_exit(sx150x_exit);
656 
657 MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
658 MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
659 MODULE_LICENSE("GPL v2");
660 MODULE_ALIAS("i2c:sx150x");
661