1 /*
2 * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
3 *
4 * Copyright (c) 2010 Ericsson AB.
5 *
6 * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
7 *
8 * JC42.4 compliant temperature sensors are typically used on memory modules.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/i2c.h>
30 #include <linux/hwmon.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34
35 /* Addresses to scan */
36 static const unsigned short normal_i2c[] = {
37 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
38
39 /* JC42 registers. All registers are 16 bit. */
40 #define JC42_REG_CAP 0x00
41 #define JC42_REG_CONFIG 0x01
42 #define JC42_REG_TEMP_UPPER 0x02
43 #define JC42_REG_TEMP_LOWER 0x03
44 #define JC42_REG_TEMP_CRITICAL 0x04
45 #define JC42_REG_TEMP 0x05
46 #define JC42_REG_MANID 0x06
47 #define JC42_REG_DEVICEID 0x07
48
49 /* Status bits in temperature register */
50 #define JC42_ALARM_CRIT_BIT 15
51 #define JC42_ALARM_MAX_BIT 14
52 #define JC42_ALARM_MIN_BIT 13
53
54 /* Configuration register defines */
55 #define JC42_CFG_CRIT_ONLY (1 << 2)
56 #define JC42_CFG_TCRIT_LOCK (1 << 6)
57 #define JC42_CFG_EVENT_LOCK (1 << 7)
58 #define JC42_CFG_SHUTDOWN (1 << 8)
59 #define JC42_CFG_HYST_SHIFT 9
60 #define JC42_CFG_HYST_MASK (0x03 << 9)
61
62 /* Capabilities */
63 #define JC42_CAP_RANGE (1 << 2)
64
65 /* Manufacturer IDs */
66 #define ADT_MANID 0x11d4 /* Analog Devices */
67 #define ATMEL_MANID 0x001f /* Atmel */
68 #define ATMEL_MANID2 0x1114 /* Atmel */
69 #define MAX_MANID 0x004d /* Maxim */
70 #define IDT_MANID 0x00b3 /* IDT */
71 #define MCP_MANID 0x0054 /* Microchip */
72 #define NXP_MANID 0x1131 /* NXP Semiconductors */
73 #define ONS_MANID 0x1b09 /* ON Semiconductor */
74 #define STM_MANID 0x104a /* ST Microelectronics */
75
76 /* Supported chips */
77
78 /* Analog Devices */
79 #define ADT7408_DEVID 0x0801
80 #define ADT7408_DEVID_MASK 0xffff
81
82 /* Atmel */
83 #define AT30TS00_DEVID 0x8201
84 #define AT30TS00_DEVID_MASK 0xffff
85
86 #define AT30TSE004_DEVID 0x2200
87 #define AT30TSE004_DEVID_MASK 0xffff
88
89 /* IDT */
90 #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
91 #define TS3000B3_DEVID_MASK 0xffff
92
93 #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
94 #define TS3000GB2_DEVID_MASK 0xffff
95
96 /* Maxim */
97 #define MAX6604_DEVID 0x3e00
98 #define MAX6604_DEVID_MASK 0xffff
99
100 /* Microchip */
101 #define MCP9804_DEVID 0x0200
102 #define MCP9804_DEVID_MASK 0xfffc
103
104 #define MCP98242_DEVID 0x2000
105 #define MCP98242_DEVID_MASK 0xfffc
106
107 #define MCP98243_DEVID 0x2100
108 #define MCP98243_DEVID_MASK 0xfffc
109
110 #define MCP98244_DEVID 0x2200
111 #define MCP98244_DEVID_MASK 0xfffc
112
113 #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
114 #define MCP9843_DEVID_MASK 0xfffe
115
116 /* NXP */
117 #define SE97_DEVID 0xa200
118 #define SE97_DEVID_MASK 0xfffc
119
120 #define SE98_DEVID 0xa100
121 #define SE98_DEVID_MASK 0xfffc
122
123 /* ON Semiconductor */
124 #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
125 #define CAT6095_DEVID_MASK 0xffe0
126
127 /* ST Microelectronics */
128 #define STTS424_DEVID 0x0101
129 #define STTS424_DEVID_MASK 0xffff
130
131 #define STTS424E_DEVID 0x0000
132 #define STTS424E_DEVID_MASK 0xfffe
133
134 #define STTS2002_DEVID 0x0300
135 #define STTS2002_DEVID_MASK 0xffff
136
137 #define STTS2004_DEVID 0x2201
138 #define STTS2004_DEVID_MASK 0xffff
139
140 #define STTS3000_DEVID 0x0200
141 #define STTS3000_DEVID_MASK 0xffff
142
143 static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
144
145 struct jc42_chips {
146 u16 manid;
147 u16 devid;
148 u16 devid_mask;
149 };
150
151 static struct jc42_chips jc42_chips[] = {
152 { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
153 { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
154 { ATMEL_MANID2, AT30TSE004_DEVID, AT30TSE004_DEVID_MASK },
155 { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
156 { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
157 { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
158 { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
159 { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
160 { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
161 { MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
162 { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
163 { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
164 { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
165 { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
166 { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
167 { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
168 { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
169 { STM_MANID, STTS2004_DEVID, STTS2004_DEVID_MASK },
170 { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
171 };
172
173 enum temp_index {
174 t_input = 0,
175 t_crit,
176 t_min,
177 t_max,
178 t_num_temp
179 };
180
181 static const u8 temp_regs[t_num_temp] = {
182 [t_input] = JC42_REG_TEMP,
183 [t_crit] = JC42_REG_TEMP_CRITICAL,
184 [t_min] = JC42_REG_TEMP_LOWER,
185 [t_max] = JC42_REG_TEMP_UPPER,
186 };
187
188 /* Each client has this additional data */
189 struct jc42_data {
190 struct i2c_client *client;
191 struct mutex update_lock; /* protect register access */
192 bool extended; /* true if extended range supported */
193 bool valid;
194 unsigned long last_updated; /* In jiffies */
195 u16 orig_config; /* original configuration */
196 u16 config; /* current configuration */
197 u16 temp[t_num_temp];/* Temperatures */
198 };
199
200 #define JC42_TEMP_MIN_EXTENDED (-40000)
201 #define JC42_TEMP_MIN 0
202 #define JC42_TEMP_MAX 125000
203
jc42_temp_to_reg(int temp,bool extended)204 static u16 jc42_temp_to_reg(int temp, bool extended)
205 {
206 int ntemp = clamp_val(temp,
207 extended ? JC42_TEMP_MIN_EXTENDED :
208 JC42_TEMP_MIN, JC42_TEMP_MAX);
209
210 /* convert from 0.001 to 0.0625 resolution */
211 return (ntemp * 2 / 125) & 0x1fff;
212 }
213
jc42_temp_from_reg(s16 reg)214 static int jc42_temp_from_reg(s16 reg)
215 {
216 reg &= 0x1fff;
217
218 /* sign extend register */
219 if (reg & 0x1000)
220 reg |= 0xf000;
221
222 /* convert from 0.0625 to 0.001 resolution */
223 return reg * 125 / 2;
224 }
225
jc42_update_device(struct device * dev)226 static struct jc42_data *jc42_update_device(struct device *dev)
227 {
228 struct jc42_data *data = dev_get_drvdata(dev);
229 struct i2c_client *client = data->client;
230 struct jc42_data *ret = data;
231 int i, val;
232
233 mutex_lock(&data->update_lock);
234
235 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
236 for (i = 0; i < t_num_temp; i++) {
237 val = i2c_smbus_read_word_swapped(client, temp_regs[i]);
238 if (val < 0) {
239 ret = ERR_PTR(val);
240 goto abort;
241 }
242 data->temp[i] = val;
243 }
244 data->last_updated = jiffies;
245 data->valid = true;
246 }
247 abort:
248 mutex_unlock(&data->update_lock);
249 return ret;
250 }
251
252 /* sysfs functions */
253
show_temp(struct device * dev,struct device_attribute * devattr,char * buf)254 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
255 char *buf)
256 {
257 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
258 struct jc42_data *data = jc42_update_device(dev);
259 if (IS_ERR(data))
260 return PTR_ERR(data);
261 return sprintf(buf, "%d\n",
262 jc42_temp_from_reg(data->temp[attr->index]));
263 }
264
show_temp_hyst(struct device * dev,struct device_attribute * devattr,char * buf)265 static ssize_t show_temp_hyst(struct device *dev,
266 struct device_attribute *devattr, char *buf)
267 {
268 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
269 struct jc42_data *data = jc42_update_device(dev);
270 int temp, hyst;
271
272 if (IS_ERR(data))
273 return PTR_ERR(data);
274
275 temp = jc42_temp_from_reg(data->temp[attr->index]);
276 hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
277 >> JC42_CFG_HYST_SHIFT];
278 return sprintf(buf, "%d\n", temp - hyst);
279 }
280
set_temp(struct device * dev,struct device_attribute * devattr,const char * buf,size_t count)281 static ssize_t set_temp(struct device *dev, struct device_attribute *devattr,
282 const char *buf, size_t count)
283 {
284 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
285 struct jc42_data *data = dev_get_drvdata(dev);
286 int err, ret = count;
287 int nr = attr->index;
288 long val;
289
290 if (kstrtol(buf, 10, &val) < 0)
291 return -EINVAL;
292 mutex_lock(&data->update_lock);
293 data->temp[nr] = jc42_temp_to_reg(val, data->extended);
294 err = i2c_smbus_write_word_swapped(data->client, temp_regs[nr],
295 data->temp[nr]);
296 if (err < 0)
297 ret = err;
298 mutex_unlock(&data->update_lock);
299 return ret;
300 }
301
302 /*
303 * JC42.4 compliant chips only support four hysteresis values.
304 * Pick best choice and go from there.
305 */
set_temp_crit_hyst(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)306 static ssize_t set_temp_crit_hyst(struct device *dev,
307 struct device_attribute *attr,
308 const char *buf, size_t count)
309 {
310 struct jc42_data *data = dev_get_drvdata(dev);
311 unsigned long val;
312 int diff, hyst;
313 int err;
314 int ret = count;
315
316 if (kstrtoul(buf, 10, &val) < 0)
317 return -EINVAL;
318
319 diff = jc42_temp_from_reg(data->temp[t_crit]) - val;
320 hyst = 0;
321 if (diff > 0) {
322 if (diff < 2250)
323 hyst = 1; /* 1.5 degrees C */
324 else if (diff < 4500)
325 hyst = 2; /* 3.0 degrees C */
326 else
327 hyst = 3; /* 6.0 degrees C */
328 }
329
330 mutex_lock(&data->update_lock);
331 data->config = (data->config & ~JC42_CFG_HYST_MASK)
332 | (hyst << JC42_CFG_HYST_SHIFT);
333 err = i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
334 data->config);
335 if (err < 0)
336 ret = err;
337 mutex_unlock(&data->update_lock);
338 return ret;
339 }
340
show_alarm(struct device * dev,struct device_attribute * attr,char * buf)341 static ssize_t show_alarm(struct device *dev,
342 struct device_attribute *attr, char *buf)
343 {
344 u16 bit = to_sensor_dev_attr(attr)->index;
345 struct jc42_data *data = jc42_update_device(dev);
346 u16 val;
347
348 if (IS_ERR(data))
349 return PTR_ERR(data);
350
351 val = data->temp[t_input];
352 if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
353 val = 0;
354 return sprintf(buf, "%u\n", (val >> bit) & 1);
355 }
356
357 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, t_input);
358 static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp, set_temp, t_crit);
359 static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO, show_temp, set_temp, t_min);
360 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, set_temp, t_max);
361
362 static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_hyst,
363 set_temp_crit_hyst, t_crit);
364 static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO, show_temp_hyst, NULL, t_max);
365
366 static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
367 JC42_ALARM_CRIT_BIT);
368 static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
369 JC42_ALARM_MIN_BIT);
370 static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
371 JC42_ALARM_MAX_BIT);
372
373 static struct attribute *jc42_attributes[] = {
374 &sensor_dev_attr_temp1_input.dev_attr.attr,
375 &sensor_dev_attr_temp1_crit.dev_attr.attr,
376 &sensor_dev_attr_temp1_min.dev_attr.attr,
377 &sensor_dev_attr_temp1_max.dev_attr.attr,
378 &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
379 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
380 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
381 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
382 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
383 NULL
384 };
385
jc42_attribute_mode(struct kobject * kobj,struct attribute * attr,int index)386 static umode_t jc42_attribute_mode(struct kobject *kobj,
387 struct attribute *attr, int index)
388 {
389 struct device *dev = container_of(kobj, struct device, kobj);
390 struct jc42_data *data = dev_get_drvdata(dev);
391 unsigned int config = data->config;
392 bool readonly;
393
394 if (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr)
395 readonly = config & JC42_CFG_TCRIT_LOCK;
396 else if (attr == &sensor_dev_attr_temp1_min.dev_attr.attr ||
397 attr == &sensor_dev_attr_temp1_max.dev_attr.attr)
398 readonly = config & JC42_CFG_EVENT_LOCK;
399 else if (attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr)
400 readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
401 else
402 readonly = true;
403
404 return S_IRUGO | (readonly ? 0 : S_IWUSR);
405 }
406
407 static const struct attribute_group jc42_group = {
408 .attrs = jc42_attributes,
409 .is_visible = jc42_attribute_mode,
410 };
411 __ATTRIBUTE_GROUPS(jc42);
412
413 /* Return 0 if detection is successful, -ENODEV otherwise */
jc42_detect(struct i2c_client * client,struct i2c_board_info * info)414 static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
415 {
416 struct i2c_adapter *adapter = client->adapter;
417 int i, config, cap, manid, devid;
418
419 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
420 I2C_FUNC_SMBUS_WORD_DATA))
421 return -ENODEV;
422
423 cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
424 config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
425 manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
426 devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
427
428 if (cap < 0 || config < 0 || manid < 0 || devid < 0)
429 return -ENODEV;
430
431 if ((cap & 0xff00) || (config & 0xf800))
432 return -ENODEV;
433
434 for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
435 struct jc42_chips *chip = &jc42_chips[i];
436 if (manid == chip->manid &&
437 (devid & chip->devid_mask) == chip->devid) {
438 strlcpy(info->type, "jc42", I2C_NAME_SIZE);
439 return 0;
440 }
441 }
442 return -ENODEV;
443 }
444
jc42_probe(struct i2c_client * client,const struct i2c_device_id * id)445 static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
446 {
447 struct device *dev = &client->dev;
448 struct device *hwmon_dev;
449 struct jc42_data *data;
450 int config, cap;
451
452 data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
453 if (!data)
454 return -ENOMEM;
455
456 data->client = client;
457 i2c_set_clientdata(client, data);
458 mutex_init(&data->update_lock);
459
460 cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
461 if (cap < 0)
462 return cap;
463
464 data->extended = !!(cap & JC42_CAP_RANGE);
465
466 config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
467 if (config < 0)
468 return config;
469
470 data->orig_config = config;
471 if (config & JC42_CFG_SHUTDOWN) {
472 config &= ~JC42_CFG_SHUTDOWN;
473 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
474 }
475 data->config = config;
476
477 hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
478 data,
479 jc42_groups);
480 return PTR_ERR_OR_ZERO(hwmon_dev);
481 }
482
jc42_remove(struct i2c_client * client)483 static int jc42_remove(struct i2c_client *client)
484 {
485 struct jc42_data *data = i2c_get_clientdata(client);
486
487 /* Restore original configuration except hysteresis */
488 if ((data->config & ~JC42_CFG_HYST_MASK) !=
489 (data->orig_config & ~JC42_CFG_HYST_MASK)) {
490 int config;
491
492 config = (data->orig_config & ~JC42_CFG_HYST_MASK)
493 | (data->config & JC42_CFG_HYST_MASK);
494 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
495 }
496 return 0;
497 }
498
499 #ifdef CONFIG_PM
500
jc42_suspend(struct device * dev)501 static int jc42_suspend(struct device *dev)
502 {
503 struct jc42_data *data = dev_get_drvdata(dev);
504
505 data->config |= JC42_CFG_SHUTDOWN;
506 i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
507 data->config);
508 return 0;
509 }
510
jc42_resume(struct device * dev)511 static int jc42_resume(struct device *dev)
512 {
513 struct jc42_data *data = dev_get_drvdata(dev);
514
515 data->config &= ~JC42_CFG_SHUTDOWN;
516 i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
517 data->config);
518 return 0;
519 }
520
521 static const struct dev_pm_ops jc42_dev_pm_ops = {
522 .suspend = jc42_suspend,
523 .resume = jc42_resume,
524 };
525
526 #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
527 #else
528 #define JC42_DEV_PM_OPS NULL
529 #endif /* CONFIG_PM */
530
531 static const struct i2c_device_id jc42_id[] = {
532 { "jc42", 0 },
533 { }
534 };
535 MODULE_DEVICE_TABLE(i2c, jc42_id);
536
537 static struct i2c_driver jc42_driver = {
538 .class = I2C_CLASS_SPD,
539 .driver = {
540 .name = "jc42",
541 .pm = JC42_DEV_PM_OPS,
542 },
543 .probe = jc42_probe,
544 .remove = jc42_remove,
545 .id_table = jc42_id,
546 .detect = jc42_detect,
547 .address_list = normal_i2c,
548 };
549
550 module_i2c_driver(jc42_driver);
551
552 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
553 MODULE_DESCRIPTION("JC42 driver");
554 MODULE_LICENSE("GPL");
555