1 /*
2 * Afatech AF9033 demodulator driver
3 *
4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22 #include "af9033_priv.h"
23
24 /* Max transfer size done by I2C transfer functions */
25 #define MAX_XFER_SIZE 64
26
27 struct af9033_dev {
28 struct i2c_client *client;
29 struct dvb_frontend fe;
30 struct af9033_config cfg;
31 bool is_af9035;
32 bool is_it9135;
33
34 u32 bandwidth_hz;
35 bool ts_mode_parallel;
36 bool ts_mode_serial;
37
38 fe_status_t fe_status;
39 u64 post_bit_error_prev; /* for old read_ber we return (curr - prev) */
40 u64 post_bit_error;
41 u64 post_bit_count;
42 u64 error_block_count;
43 u64 total_block_count;
44 struct delayed_work stat_work;
45 };
46
47 /* write multiple registers */
af9033_wr_regs(struct af9033_dev * dev,u32 reg,const u8 * val,int len)48 static int af9033_wr_regs(struct af9033_dev *dev, u32 reg, const u8 *val,
49 int len)
50 {
51 int ret;
52 u8 buf[MAX_XFER_SIZE];
53 struct i2c_msg msg[1] = {
54 {
55 .addr = dev->client->addr,
56 .flags = 0,
57 .len = 3 + len,
58 .buf = buf,
59 }
60 };
61
62 if (3 + len > sizeof(buf)) {
63 dev_warn(&dev->client->dev,
64 "i2c wr reg=%04x: len=%d is too big!\n",
65 reg, len);
66 return -EINVAL;
67 }
68
69 buf[0] = (reg >> 16) & 0xff;
70 buf[1] = (reg >> 8) & 0xff;
71 buf[2] = (reg >> 0) & 0xff;
72 memcpy(&buf[3], val, len);
73
74 ret = i2c_transfer(dev->client->adapter, msg, 1);
75 if (ret == 1) {
76 ret = 0;
77 } else {
78 dev_warn(&dev->client->dev, "i2c wr failed=%d reg=%06x len=%d\n",
79 ret, reg, len);
80 ret = -EREMOTEIO;
81 }
82
83 return ret;
84 }
85
86 /* read multiple registers */
af9033_rd_regs(struct af9033_dev * dev,u32 reg,u8 * val,int len)87 static int af9033_rd_regs(struct af9033_dev *dev, u32 reg, u8 *val, int len)
88 {
89 int ret;
90 u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff,
91 (reg >> 0) & 0xff };
92 struct i2c_msg msg[2] = {
93 {
94 .addr = dev->client->addr,
95 .flags = 0,
96 .len = sizeof(buf),
97 .buf = buf
98 }, {
99 .addr = dev->client->addr,
100 .flags = I2C_M_RD,
101 .len = len,
102 .buf = val
103 }
104 };
105
106 ret = i2c_transfer(dev->client->adapter, msg, 2);
107 if (ret == 2) {
108 ret = 0;
109 } else {
110 dev_warn(&dev->client->dev, "i2c rd failed=%d reg=%06x len=%d\n",
111 ret, reg, len);
112 ret = -EREMOTEIO;
113 }
114
115 return ret;
116 }
117
118
119 /* write single register */
af9033_wr_reg(struct af9033_dev * dev,u32 reg,u8 val)120 static int af9033_wr_reg(struct af9033_dev *dev, u32 reg, u8 val)
121 {
122 return af9033_wr_regs(dev, reg, &val, 1);
123 }
124
125 /* read single register */
af9033_rd_reg(struct af9033_dev * dev,u32 reg,u8 * val)126 static int af9033_rd_reg(struct af9033_dev *dev, u32 reg, u8 *val)
127 {
128 return af9033_rd_regs(dev, reg, val, 1);
129 }
130
131 /* write single register with mask */
af9033_wr_reg_mask(struct af9033_dev * dev,u32 reg,u8 val,u8 mask)132 static int af9033_wr_reg_mask(struct af9033_dev *dev, u32 reg, u8 val,
133 u8 mask)
134 {
135 int ret;
136 u8 tmp;
137
138 /* no need for read if whole reg is written */
139 if (mask != 0xff) {
140 ret = af9033_rd_regs(dev, reg, &tmp, 1);
141 if (ret)
142 return ret;
143
144 val &= mask;
145 tmp &= ~mask;
146 val |= tmp;
147 }
148
149 return af9033_wr_regs(dev, reg, &val, 1);
150 }
151
152 /* read single register with mask */
af9033_rd_reg_mask(struct af9033_dev * dev,u32 reg,u8 * val,u8 mask)153 static int af9033_rd_reg_mask(struct af9033_dev *dev, u32 reg, u8 *val,
154 u8 mask)
155 {
156 int ret, i;
157 u8 tmp;
158
159 ret = af9033_rd_regs(dev, reg, &tmp, 1);
160 if (ret)
161 return ret;
162
163 tmp &= mask;
164
165 /* find position of the first bit */
166 for (i = 0; i < 8; i++) {
167 if ((mask >> i) & 0x01)
168 break;
169 }
170 *val = tmp >> i;
171
172 return 0;
173 }
174
175 /* write reg val table using reg addr auto increment */
af9033_wr_reg_val_tab(struct af9033_dev * dev,const struct reg_val * tab,int tab_len)176 static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
177 const struct reg_val *tab, int tab_len)
178 {
179 #define MAX_TAB_LEN 212
180 int ret, i, j;
181 u8 buf[1 + MAX_TAB_LEN];
182
183 dev_dbg(&dev->client->dev, "tab_len=%d\n", tab_len);
184
185 if (tab_len > sizeof(buf)) {
186 dev_warn(&dev->client->dev, "tab len %d is too big\n", tab_len);
187 return -EINVAL;
188 }
189
190 for (i = 0, j = 0; i < tab_len; i++) {
191 buf[j] = tab[i].val;
192
193 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
194 ret = af9033_wr_regs(dev, tab[i].reg - j, buf, j + 1);
195 if (ret < 0)
196 goto err;
197
198 j = 0;
199 } else {
200 j++;
201 }
202 }
203
204 return 0;
205
206 err:
207 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
208
209 return ret;
210 }
211
af9033_div(struct af9033_dev * dev,u32 a,u32 b,u32 x)212 static u32 af9033_div(struct af9033_dev *dev, u32 a, u32 b, u32 x)
213 {
214 u32 r = 0, c = 0, i;
215
216 dev_dbg(&dev->client->dev, "a=%d b=%d x=%d\n", a, b, x);
217
218 if (a > b) {
219 c = a / b;
220 a = a - c * b;
221 }
222
223 for (i = 0; i < x; i++) {
224 if (a >= b) {
225 r += 1;
226 a -= b;
227 }
228 a <<= 1;
229 r <<= 1;
230 }
231 r = (c << (u32)x) + r;
232
233 dev_dbg(&dev->client->dev, "a=%d b=%d x=%d r=%d r=%x\n", a, b, x, r, r);
234
235 return r;
236 }
237
af9033_init(struct dvb_frontend * fe)238 static int af9033_init(struct dvb_frontend *fe)
239 {
240 struct af9033_dev *dev = fe->demodulator_priv;
241 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
242 int ret, i, len;
243 const struct reg_val *init;
244 u8 buf[4];
245 u32 adc_cw, clock_cw;
246 struct reg_val_mask tab[] = {
247 { 0x80fb24, 0x00, 0x08 },
248 { 0x80004c, 0x00, 0xff },
249 { 0x00f641, dev->cfg.tuner, 0xff },
250 { 0x80f5ca, 0x01, 0x01 },
251 { 0x80f715, 0x01, 0x01 },
252 { 0x00f41f, 0x04, 0x04 },
253 { 0x00f41a, 0x01, 0x01 },
254 { 0x80f731, 0x00, 0x01 },
255 { 0x00d91e, 0x00, 0x01 },
256 { 0x00d919, 0x00, 0x01 },
257 { 0x80f732, 0x00, 0x01 },
258 { 0x00d91f, 0x00, 0x01 },
259 { 0x00d91a, 0x00, 0x01 },
260 { 0x80f730, 0x00, 0x01 },
261 { 0x80f778, 0x00, 0xff },
262 { 0x80f73c, 0x01, 0x01 },
263 { 0x80f776, 0x00, 0x01 },
264 { 0x00d8fd, 0x01, 0xff },
265 { 0x00d830, 0x01, 0xff },
266 { 0x00d831, 0x00, 0xff },
267 { 0x00d832, 0x00, 0xff },
268 { 0x80f985, dev->ts_mode_serial, 0x01 },
269 { 0x80f986, dev->ts_mode_parallel, 0x01 },
270 { 0x00d827, 0x00, 0xff },
271 { 0x00d829, 0x00, 0xff },
272 { 0x800045, dev->cfg.adc_multiplier, 0xff },
273 };
274
275 /* program clock control */
276 clock_cw = af9033_div(dev, dev->cfg.clock, 1000000ul, 19ul);
277 buf[0] = (clock_cw >> 0) & 0xff;
278 buf[1] = (clock_cw >> 8) & 0xff;
279 buf[2] = (clock_cw >> 16) & 0xff;
280 buf[3] = (clock_cw >> 24) & 0xff;
281
282 dev_dbg(&dev->client->dev, "clock=%d clock_cw=%08x\n",
283 dev->cfg.clock, clock_cw);
284
285 ret = af9033_wr_regs(dev, 0x800025, buf, 4);
286 if (ret < 0)
287 goto err;
288
289 /* program ADC control */
290 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
291 if (clock_adc_lut[i].clock == dev->cfg.clock)
292 break;
293 }
294
295 adc_cw = af9033_div(dev, clock_adc_lut[i].adc, 1000000ul, 19ul);
296 buf[0] = (adc_cw >> 0) & 0xff;
297 buf[1] = (adc_cw >> 8) & 0xff;
298 buf[2] = (adc_cw >> 16) & 0xff;
299
300 dev_dbg(&dev->client->dev, "adc=%d adc_cw=%06x\n",
301 clock_adc_lut[i].adc, adc_cw);
302
303 ret = af9033_wr_regs(dev, 0x80f1cd, buf, 3);
304 if (ret < 0)
305 goto err;
306
307 /* program register table */
308 for (i = 0; i < ARRAY_SIZE(tab); i++) {
309 ret = af9033_wr_reg_mask(dev, tab[i].reg, tab[i].val,
310 tab[i].mask);
311 if (ret < 0)
312 goto err;
313 }
314
315 /* clock output */
316 if (dev->cfg.dyn0_clk) {
317 ret = af9033_wr_reg(dev, 0x80fba8, 0x00);
318 if (ret < 0)
319 goto err;
320 }
321
322 /* settings for TS interface */
323 if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
324 ret = af9033_wr_reg_mask(dev, 0x80f9a5, 0x00, 0x01);
325 if (ret < 0)
326 goto err;
327
328 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x01, 0x01);
329 if (ret < 0)
330 goto err;
331 } else {
332 ret = af9033_wr_reg_mask(dev, 0x80f990, 0x00, 0x01);
333 if (ret < 0)
334 goto err;
335
336 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x00, 0x01);
337 if (ret < 0)
338 goto err;
339 }
340
341 /* load OFSM settings */
342 dev_dbg(&dev->client->dev, "load ofsm settings\n");
343 switch (dev->cfg.tuner) {
344 case AF9033_TUNER_IT9135_38:
345 case AF9033_TUNER_IT9135_51:
346 case AF9033_TUNER_IT9135_52:
347 len = ARRAY_SIZE(ofsm_init_it9135_v1);
348 init = ofsm_init_it9135_v1;
349 break;
350 case AF9033_TUNER_IT9135_60:
351 case AF9033_TUNER_IT9135_61:
352 case AF9033_TUNER_IT9135_62:
353 len = ARRAY_SIZE(ofsm_init_it9135_v2);
354 init = ofsm_init_it9135_v2;
355 break;
356 default:
357 len = ARRAY_SIZE(ofsm_init);
358 init = ofsm_init;
359 break;
360 }
361
362 ret = af9033_wr_reg_val_tab(dev, init, len);
363 if (ret < 0)
364 goto err;
365
366 /* load tuner specific settings */
367 dev_dbg(&dev->client->dev, "load tuner specific settings\n");
368 switch (dev->cfg.tuner) {
369 case AF9033_TUNER_TUA9001:
370 len = ARRAY_SIZE(tuner_init_tua9001);
371 init = tuner_init_tua9001;
372 break;
373 case AF9033_TUNER_FC0011:
374 len = ARRAY_SIZE(tuner_init_fc0011);
375 init = tuner_init_fc0011;
376 break;
377 case AF9033_TUNER_MXL5007T:
378 len = ARRAY_SIZE(tuner_init_mxl5007t);
379 init = tuner_init_mxl5007t;
380 break;
381 case AF9033_TUNER_TDA18218:
382 len = ARRAY_SIZE(tuner_init_tda18218);
383 init = tuner_init_tda18218;
384 break;
385 case AF9033_TUNER_FC2580:
386 len = ARRAY_SIZE(tuner_init_fc2580);
387 init = tuner_init_fc2580;
388 break;
389 case AF9033_TUNER_FC0012:
390 len = ARRAY_SIZE(tuner_init_fc0012);
391 init = tuner_init_fc0012;
392 break;
393 case AF9033_TUNER_IT9135_38:
394 len = ARRAY_SIZE(tuner_init_it9135_38);
395 init = tuner_init_it9135_38;
396 break;
397 case AF9033_TUNER_IT9135_51:
398 len = ARRAY_SIZE(tuner_init_it9135_51);
399 init = tuner_init_it9135_51;
400 break;
401 case AF9033_TUNER_IT9135_52:
402 len = ARRAY_SIZE(tuner_init_it9135_52);
403 init = tuner_init_it9135_52;
404 break;
405 case AF9033_TUNER_IT9135_60:
406 len = ARRAY_SIZE(tuner_init_it9135_60);
407 init = tuner_init_it9135_60;
408 break;
409 case AF9033_TUNER_IT9135_61:
410 len = ARRAY_SIZE(tuner_init_it9135_61);
411 init = tuner_init_it9135_61;
412 break;
413 case AF9033_TUNER_IT9135_62:
414 len = ARRAY_SIZE(tuner_init_it9135_62);
415 init = tuner_init_it9135_62;
416 break;
417 default:
418 dev_dbg(&dev->client->dev, "unsupported tuner ID=%d\n",
419 dev->cfg.tuner);
420 ret = -ENODEV;
421 goto err;
422 }
423
424 ret = af9033_wr_reg_val_tab(dev, init, len);
425 if (ret < 0)
426 goto err;
427
428 if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
429 ret = af9033_wr_reg_mask(dev, 0x00d91c, 0x01, 0x01);
430 if (ret < 0)
431 goto err;
432
433 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
434 if (ret < 0)
435 goto err;
436
437 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x00, 0x01);
438 if (ret < 0)
439 goto err;
440 }
441
442 switch (dev->cfg.tuner) {
443 case AF9033_TUNER_IT9135_60:
444 case AF9033_TUNER_IT9135_61:
445 case AF9033_TUNER_IT9135_62:
446 ret = af9033_wr_reg(dev, 0x800000, 0x01);
447 if (ret < 0)
448 goto err;
449 }
450
451 dev->bandwidth_hz = 0; /* force to program all parameters */
452 /* init stats here in order signal app which stats are supported */
453 c->strength.len = 1;
454 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
455 c->cnr.len = 1;
456 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
457 c->block_count.len = 1;
458 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
459 c->block_error.len = 1;
460 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
461 c->post_bit_count.len = 1;
462 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
463 c->post_bit_error.len = 1;
464 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
465 /* start statistics polling */
466 schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
467
468 return 0;
469
470 err:
471 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
472
473 return ret;
474 }
475
af9033_sleep(struct dvb_frontend * fe)476 static int af9033_sleep(struct dvb_frontend *fe)
477 {
478 struct af9033_dev *dev = fe->demodulator_priv;
479 int ret, i;
480 u8 tmp;
481
482 /* stop statistics polling */
483 cancel_delayed_work_sync(&dev->stat_work);
484
485 ret = af9033_wr_reg(dev, 0x80004c, 1);
486 if (ret < 0)
487 goto err;
488
489 ret = af9033_wr_reg(dev, 0x800000, 0);
490 if (ret < 0)
491 goto err;
492
493 for (i = 100, tmp = 1; i && tmp; i--) {
494 ret = af9033_rd_reg(dev, 0x80004c, &tmp);
495 if (ret < 0)
496 goto err;
497
498 usleep_range(200, 10000);
499 }
500
501 dev_dbg(&dev->client->dev, "loop=%d\n", i);
502
503 if (i == 0) {
504 ret = -ETIMEDOUT;
505 goto err;
506 }
507
508 ret = af9033_wr_reg_mask(dev, 0x80fb24, 0x08, 0x08);
509 if (ret < 0)
510 goto err;
511
512 /* prevent current leak (?) */
513 if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
514 /* enable parallel TS */
515 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
516 if (ret < 0)
517 goto err;
518
519 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x01, 0x01);
520 if (ret < 0)
521 goto err;
522 }
523
524 return 0;
525
526 err:
527 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
528
529 return ret;
530 }
531
af9033_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * fesettings)532 static int af9033_get_tune_settings(struct dvb_frontend *fe,
533 struct dvb_frontend_tune_settings *fesettings)
534 {
535 /* 800 => 2000 because IT9135 v2 is slow to gain lock */
536 fesettings->min_delay_ms = 2000;
537 fesettings->step_size = 0;
538 fesettings->max_drift = 0;
539
540 return 0;
541 }
542
af9033_set_frontend(struct dvb_frontend * fe)543 static int af9033_set_frontend(struct dvb_frontend *fe)
544 {
545 struct af9033_dev *dev = fe->demodulator_priv;
546 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
547 int ret, i, spec_inv, sampling_freq;
548 u8 tmp, buf[3], bandwidth_reg_val;
549 u32 if_frequency, freq_cw, adc_freq;
550
551 dev_dbg(&dev->client->dev, "frequency=%d bandwidth_hz=%d\n",
552 c->frequency, c->bandwidth_hz);
553
554 /* check bandwidth */
555 switch (c->bandwidth_hz) {
556 case 6000000:
557 bandwidth_reg_val = 0x00;
558 break;
559 case 7000000:
560 bandwidth_reg_val = 0x01;
561 break;
562 case 8000000:
563 bandwidth_reg_val = 0x02;
564 break;
565 default:
566 dev_dbg(&dev->client->dev, "invalid bandwidth_hz\n");
567 ret = -EINVAL;
568 goto err;
569 }
570
571 /* program tuner */
572 if (fe->ops.tuner_ops.set_params)
573 fe->ops.tuner_ops.set_params(fe);
574
575 /* program CFOE coefficients */
576 if (c->bandwidth_hz != dev->bandwidth_hz) {
577 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
578 if (coeff_lut[i].clock == dev->cfg.clock &&
579 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
580 break;
581 }
582 }
583 ret = af9033_wr_regs(dev, 0x800001,
584 coeff_lut[i].val, sizeof(coeff_lut[i].val));
585 }
586
587 /* program frequency control */
588 if (c->bandwidth_hz != dev->bandwidth_hz) {
589 spec_inv = dev->cfg.spec_inv ? -1 : 1;
590
591 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
592 if (clock_adc_lut[i].clock == dev->cfg.clock)
593 break;
594 }
595 adc_freq = clock_adc_lut[i].adc;
596
597 /* get used IF frequency */
598 if (fe->ops.tuner_ops.get_if_frequency)
599 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
600 else
601 if_frequency = 0;
602
603 sampling_freq = if_frequency;
604
605 while (sampling_freq > (adc_freq / 2))
606 sampling_freq -= adc_freq;
607
608 if (sampling_freq >= 0)
609 spec_inv *= -1;
610 else
611 sampling_freq *= -1;
612
613 freq_cw = af9033_div(dev, sampling_freq, adc_freq, 23ul);
614
615 if (spec_inv == -1)
616 freq_cw = 0x800000 - freq_cw;
617
618 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
619 freq_cw /= 2;
620
621 buf[0] = (freq_cw >> 0) & 0xff;
622 buf[1] = (freq_cw >> 8) & 0xff;
623 buf[2] = (freq_cw >> 16) & 0x7f;
624
625 /* FIXME: there seems to be calculation error here... */
626 if (if_frequency == 0)
627 buf[2] = 0;
628
629 ret = af9033_wr_regs(dev, 0x800029, buf, 3);
630 if (ret < 0)
631 goto err;
632
633 dev->bandwidth_hz = c->bandwidth_hz;
634 }
635
636 ret = af9033_wr_reg_mask(dev, 0x80f904, bandwidth_reg_val, 0x03);
637 if (ret < 0)
638 goto err;
639
640 ret = af9033_wr_reg(dev, 0x800040, 0x00);
641 if (ret < 0)
642 goto err;
643
644 ret = af9033_wr_reg(dev, 0x800047, 0x00);
645 if (ret < 0)
646 goto err;
647
648 ret = af9033_wr_reg_mask(dev, 0x80f999, 0x00, 0x01);
649 if (ret < 0)
650 goto err;
651
652 if (c->frequency <= 230000000)
653 tmp = 0x00; /* VHF */
654 else
655 tmp = 0x01; /* UHF */
656
657 ret = af9033_wr_reg(dev, 0x80004b, tmp);
658 if (ret < 0)
659 goto err;
660
661 ret = af9033_wr_reg(dev, 0x800000, 0x00);
662 if (ret < 0)
663 goto err;
664
665 return 0;
666
667 err:
668 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
669
670 return ret;
671 }
672
af9033_get_frontend(struct dvb_frontend * fe)673 static int af9033_get_frontend(struct dvb_frontend *fe)
674 {
675 struct af9033_dev *dev = fe->demodulator_priv;
676 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
677 int ret;
678 u8 buf[8];
679
680 dev_dbg(&dev->client->dev, "\n");
681
682 /* read all needed registers */
683 ret = af9033_rd_regs(dev, 0x80f900, buf, sizeof(buf));
684 if (ret < 0)
685 goto err;
686
687 switch ((buf[0] >> 0) & 3) {
688 case 0:
689 c->transmission_mode = TRANSMISSION_MODE_2K;
690 break;
691 case 1:
692 c->transmission_mode = TRANSMISSION_MODE_8K;
693 break;
694 }
695
696 switch ((buf[1] >> 0) & 3) {
697 case 0:
698 c->guard_interval = GUARD_INTERVAL_1_32;
699 break;
700 case 1:
701 c->guard_interval = GUARD_INTERVAL_1_16;
702 break;
703 case 2:
704 c->guard_interval = GUARD_INTERVAL_1_8;
705 break;
706 case 3:
707 c->guard_interval = GUARD_INTERVAL_1_4;
708 break;
709 }
710
711 switch ((buf[2] >> 0) & 7) {
712 case 0:
713 c->hierarchy = HIERARCHY_NONE;
714 break;
715 case 1:
716 c->hierarchy = HIERARCHY_1;
717 break;
718 case 2:
719 c->hierarchy = HIERARCHY_2;
720 break;
721 case 3:
722 c->hierarchy = HIERARCHY_4;
723 break;
724 }
725
726 switch ((buf[3] >> 0) & 3) {
727 case 0:
728 c->modulation = QPSK;
729 break;
730 case 1:
731 c->modulation = QAM_16;
732 break;
733 case 2:
734 c->modulation = QAM_64;
735 break;
736 }
737
738 switch ((buf[4] >> 0) & 3) {
739 case 0:
740 c->bandwidth_hz = 6000000;
741 break;
742 case 1:
743 c->bandwidth_hz = 7000000;
744 break;
745 case 2:
746 c->bandwidth_hz = 8000000;
747 break;
748 }
749
750 switch ((buf[6] >> 0) & 7) {
751 case 0:
752 c->code_rate_HP = FEC_1_2;
753 break;
754 case 1:
755 c->code_rate_HP = FEC_2_3;
756 break;
757 case 2:
758 c->code_rate_HP = FEC_3_4;
759 break;
760 case 3:
761 c->code_rate_HP = FEC_5_6;
762 break;
763 case 4:
764 c->code_rate_HP = FEC_7_8;
765 break;
766 case 5:
767 c->code_rate_HP = FEC_NONE;
768 break;
769 }
770
771 switch ((buf[7] >> 0) & 7) {
772 case 0:
773 c->code_rate_LP = FEC_1_2;
774 break;
775 case 1:
776 c->code_rate_LP = FEC_2_3;
777 break;
778 case 2:
779 c->code_rate_LP = FEC_3_4;
780 break;
781 case 3:
782 c->code_rate_LP = FEC_5_6;
783 break;
784 case 4:
785 c->code_rate_LP = FEC_7_8;
786 break;
787 case 5:
788 c->code_rate_LP = FEC_NONE;
789 break;
790 }
791
792 return 0;
793
794 err:
795 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
796
797 return ret;
798 }
799
af9033_read_status(struct dvb_frontend * fe,fe_status_t * status)800 static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
801 {
802 struct af9033_dev *dev = fe->demodulator_priv;
803 int ret;
804 u8 tmp;
805
806 *status = 0;
807
808 /* radio channel status, 0=no result, 1=has signal, 2=no signal */
809 ret = af9033_rd_reg(dev, 0x800047, &tmp);
810 if (ret < 0)
811 goto err;
812
813 /* has signal */
814 if (tmp == 0x01)
815 *status |= FE_HAS_SIGNAL;
816
817 if (tmp != 0x02) {
818 /* TPS lock */
819 ret = af9033_rd_reg_mask(dev, 0x80f5a9, &tmp, 0x01);
820 if (ret < 0)
821 goto err;
822
823 if (tmp)
824 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
825 FE_HAS_VITERBI;
826
827 /* full lock */
828 ret = af9033_rd_reg_mask(dev, 0x80f999, &tmp, 0x01);
829 if (ret < 0)
830 goto err;
831
832 if (tmp)
833 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
834 FE_HAS_VITERBI | FE_HAS_SYNC |
835 FE_HAS_LOCK;
836 }
837
838 dev->fe_status = *status;
839
840 return 0;
841
842 err:
843 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
844
845 return ret;
846 }
847
af9033_read_snr(struct dvb_frontend * fe,u16 * snr)848 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
849 {
850 struct af9033_dev *dev = fe->demodulator_priv;
851 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
852
853 /* use DVBv5 CNR */
854 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
855 *snr = div_s64(c->cnr.stat[0].svalue, 100); /* 1000x => 10x */
856 else
857 *snr = 0;
858
859 return 0;
860 }
861
af9033_read_signal_strength(struct dvb_frontend * fe,u16 * strength)862 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
863 {
864 struct af9033_dev *dev = fe->demodulator_priv;
865 int ret;
866 u8 strength2;
867
868 /* read signal strength of 0-100 scale */
869 ret = af9033_rd_reg(dev, 0x800048, &strength2);
870 if (ret < 0)
871 goto err;
872
873 /* scale value to 0x0000-0xffff */
874 *strength = strength2 * 0xffff / 100;
875
876 return 0;
877
878 err:
879 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
880
881 return ret;
882 }
883
af9033_read_ber(struct dvb_frontend * fe,u32 * ber)884 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
885 {
886 struct af9033_dev *dev = fe->demodulator_priv;
887
888 *ber = (dev->post_bit_error - dev->post_bit_error_prev);
889 dev->post_bit_error_prev = dev->post_bit_error;
890
891 return 0;
892 }
893
af9033_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)894 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
895 {
896 struct af9033_dev *dev = fe->demodulator_priv;
897
898 *ucblocks = dev->error_block_count;
899 return 0;
900 }
901
af9033_i2c_gate_ctrl(struct dvb_frontend * fe,int enable)902 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
903 {
904 struct af9033_dev *dev = fe->demodulator_priv;
905 int ret;
906
907 dev_dbg(&dev->client->dev, "enable=%d\n", enable);
908
909 ret = af9033_wr_reg_mask(dev, 0x00fa04, enable, 0x01);
910 if (ret < 0)
911 goto err;
912
913 return 0;
914
915 err:
916 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
917
918 return ret;
919 }
920
af9033_pid_filter_ctrl(struct dvb_frontend * fe,int onoff)921 static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
922 {
923 struct af9033_dev *dev = fe->demodulator_priv;
924 int ret;
925
926 dev_dbg(&dev->client->dev, "onoff=%d\n", onoff);
927
928 ret = af9033_wr_reg_mask(dev, 0x80f993, onoff, 0x01);
929 if (ret < 0)
930 goto err;
931
932 return 0;
933
934 err:
935 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
936
937 return ret;
938 }
939
af9033_pid_filter(struct dvb_frontend * fe,int index,u16 pid,int onoff)940 static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
941 int onoff)
942 {
943 struct af9033_dev *dev = fe->demodulator_priv;
944 int ret;
945 u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
946
947 dev_dbg(&dev->client->dev, "index=%d pid=%04x onoff=%d\n",
948 index, pid, onoff);
949
950 if (pid > 0x1fff)
951 return 0;
952
953 ret = af9033_wr_regs(dev, 0x80f996, wbuf, 2);
954 if (ret < 0)
955 goto err;
956
957 ret = af9033_wr_reg(dev, 0x80f994, onoff);
958 if (ret < 0)
959 goto err;
960
961 ret = af9033_wr_reg(dev, 0x80f995, index);
962 if (ret < 0)
963 goto err;
964
965 return 0;
966
967 err:
968 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
969
970 return ret;
971 }
972
af9033_stat_work(struct work_struct * work)973 static void af9033_stat_work(struct work_struct *work)
974 {
975 struct af9033_dev *dev = container_of(work, struct af9033_dev, stat_work.work);
976 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
977 int ret, tmp, i, len;
978 u8 u8tmp, buf[7];
979
980 dev_dbg(&dev->client->dev, "\n");
981
982 /* signal strength */
983 if (dev->fe_status & FE_HAS_SIGNAL) {
984 if (dev->is_af9035) {
985 ret = af9033_rd_reg(dev, 0x80004a, &u8tmp);
986 tmp = -u8tmp * 1000;
987 } else {
988 ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
989 tmp = (u8tmp - 100) * 1000;
990 }
991 if (ret)
992 goto err;
993
994 c->strength.len = 1;
995 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
996 c->strength.stat[0].svalue = tmp;
997 } else {
998 c->strength.len = 1;
999 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1000 }
1001
1002 /* CNR */
1003 if (dev->fe_status & FE_HAS_VITERBI) {
1004 u32 snr_val;
1005 const struct val_snr *snr_lut;
1006
1007 /* read value */
1008 ret = af9033_rd_regs(dev, 0x80002c, buf, 3);
1009 if (ret)
1010 goto err;
1011
1012 snr_val = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
1013
1014 /* read current modulation */
1015 ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
1016 if (ret)
1017 goto err;
1018
1019 switch ((u8tmp >> 0) & 3) {
1020 case 0:
1021 len = ARRAY_SIZE(qpsk_snr_lut);
1022 snr_lut = qpsk_snr_lut;
1023 break;
1024 case 1:
1025 len = ARRAY_SIZE(qam16_snr_lut);
1026 snr_lut = qam16_snr_lut;
1027 break;
1028 case 2:
1029 len = ARRAY_SIZE(qam64_snr_lut);
1030 snr_lut = qam64_snr_lut;
1031 break;
1032 default:
1033 goto err_schedule_delayed_work;
1034 }
1035
1036 for (i = 0; i < len; i++) {
1037 tmp = snr_lut[i].snr * 1000;
1038 if (snr_val < snr_lut[i].val)
1039 break;
1040 }
1041
1042 c->cnr.len = 1;
1043 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1044 c->cnr.stat[0].svalue = tmp;
1045 } else {
1046 c->cnr.len = 1;
1047 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1048 }
1049
1050 /* UCB/PER/BER */
1051 if (dev->fe_status & FE_HAS_LOCK) {
1052 /* outer FEC, 204 byte packets */
1053 u16 abort_packet_count, rsd_packet_count;
1054 /* inner FEC, bits */
1055 u32 rsd_bit_err_count;
1056
1057 /*
1058 * Packet count used for measurement is 10000
1059 * (rsd_packet_count). Maybe it should be increased?
1060 */
1061
1062 ret = af9033_rd_regs(dev, 0x800032, buf, 7);
1063 if (ret)
1064 goto err;
1065
1066 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
1067 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
1068 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
1069
1070 dev->error_block_count += abort_packet_count;
1071 dev->total_block_count += rsd_packet_count;
1072 dev->post_bit_error += rsd_bit_err_count;
1073 dev->post_bit_count += rsd_packet_count * 204 * 8;
1074
1075 c->block_count.len = 1;
1076 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
1077 c->block_count.stat[0].uvalue = dev->total_block_count;
1078
1079 c->block_error.len = 1;
1080 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
1081 c->block_error.stat[0].uvalue = dev->error_block_count;
1082
1083 c->post_bit_count.len = 1;
1084 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
1085 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
1086
1087 c->post_bit_error.len = 1;
1088 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
1089 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
1090 }
1091
1092 err_schedule_delayed_work:
1093 schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
1094 return;
1095 err:
1096 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1097 }
1098
1099 static struct dvb_frontend_ops af9033_ops = {
1100 .delsys = { SYS_DVBT },
1101 .info = {
1102 .name = "Afatech AF9033 (DVB-T)",
1103 .frequency_min = 174000000,
1104 .frequency_max = 862000000,
1105 .frequency_stepsize = 250000,
1106 .frequency_tolerance = 0,
1107 .caps = FE_CAN_FEC_1_2 |
1108 FE_CAN_FEC_2_3 |
1109 FE_CAN_FEC_3_4 |
1110 FE_CAN_FEC_5_6 |
1111 FE_CAN_FEC_7_8 |
1112 FE_CAN_FEC_AUTO |
1113 FE_CAN_QPSK |
1114 FE_CAN_QAM_16 |
1115 FE_CAN_QAM_64 |
1116 FE_CAN_QAM_AUTO |
1117 FE_CAN_TRANSMISSION_MODE_AUTO |
1118 FE_CAN_GUARD_INTERVAL_AUTO |
1119 FE_CAN_HIERARCHY_AUTO |
1120 FE_CAN_RECOVER |
1121 FE_CAN_MUTE_TS
1122 },
1123
1124 .init = af9033_init,
1125 .sleep = af9033_sleep,
1126
1127 .get_tune_settings = af9033_get_tune_settings,
1128 .set_frontend = af9033_set_frontend,
1129 .get_frontend = af9033_get_frontend,
1130
1131 .read_status = af9033_read_status,
1132 .read_snr = af9033_read_snr,
1133 .read_signal_strength = af9033_read_signal_strength,
1134 .read_ber = af9033_read_ber,
1135 .read_ucblocks = af9033_read_ucblocks,
1136
1137 .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1138 };
1139
af9033_probe(struct i2c_client * client,const struct i2c_device_id * id)1140 static int af9033_probe(struct i2c_client *client,
1141 const struct i2c_device_id *id)
1142 {
1143 struct af9033_config *cfg = client->dev.platform_data;
1144 struct af9033_dev *dev;
1145 int ret;
1146 u8 buf[8];
1147 u32 reg;
1148
1149 /* allocate memory for the internal state */
1150 dev = kzalloc(sizeof(struct af9033_dev), GFP_KERNEL);
1151 if (dev == NULL) {
1152 ret = -ENOMEM;
1153 dev_err(&client->dev, "Could not allocate memory for state\n");
1154 goto err;
1155 }
1156
1157 /* setup the state */
1158 dev->client = client;
1159 INIT_DELAYED_WORK(&dev->stat_work, af9033_stat_work);
1160 memcpy(&dev->cfg, cfg, sizeof(struct af9033_config));
1161
1162 if (dev->cfg.clock != 12000000) {
1163 ret = -ENODEV;
1164 dev_err(&dev->client->dev,
1165 "unsupported clock %d Hz, only 12000000 Hz is supported currently\n",
1166 dev->cfg.clock);
1167 goto err_kfree;
1168 }
1169
1170 /* firmware version */
1171 switch (dev->cfg.tuner) {
1172 case AF9033_TUNER_IT9135_38:
1173 case AF9033_TUNER_IT9135_51:
1174 case AF9033_TUNER_IT9135_52:
1175 case AF9033_TUNER_IT9135_60:
1176 case AF9033_TUNER_IT9135_61:
1177 case AF9033_TUNER_IT9135_62:
1178 dev->is_it9135 = true;
1179 reg = 0x004bfc;
1180 break;
1181 default:
1182 dev->is_af9035 = true;
1183 reg = 0x0083e9;
1184 break;
1185 }
1186
1187 ret = af9033_rd_regs(dev, reg, &buf[0], 4);
1188 if (ret < 0)
1189 goto err_kfree;
1190
1191 ret = af9033_rd_regs(dev, 0x804191, &buf[4], 4);
1192 if (ret < 0)
1193 goto err_kfree;
1194
1195 dev_info(&dev->client->dev,
1196 "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1197 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
1198 buf[7]);
1199
1200 /* sleep */
1201 switch (dev->cfg.tuner) {
1202 case AF9033_TUNER_IT9135_38:
1203 case AF9033_TUNER_IT9135_51:
1204 case AF9033_TUNER_IT9135_52:
1205 case AF9033_TUNER_IT9135_60:
1206 case AF9033_TUNER_IT9135_61:
1207 case AF9033_TUNER_IT9135_62:
1208 /* IT9135 did not like to sleep at that early */
1209 break;
1210 default:
1211 ret = af9033_wr_reg(dev, 0x80004c, 1);
1212 if (ret < 0)
1213 goto err_kfree;
1214
1215 ret = af9033_wr_reg(dev, 0x800000, 0);
1216 if (ret < 0)
1217 goto err_kfree;
1218 }
1219
1220 /* configure internal TS mode */
1221 switch (dev->cfg.ts_mode) {
1222 case AF9033_TS_MODE_PARALLEL:
1223 dev->ts_mode_parallel = true;
1224 break;
1225 case AF9033_TS_MODE_SERIAL:
1226 dev->ts_mode_serial = true;
1227 break;
1228 case AF9033_TS_MODE_USB:
1229 /* usb mode for AF9035 */
1230 default:
1231 break;
1232 }
1233
1234 /* create dvb_frontend */
1235 memcpy(&dev->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
1236 dev->fe.demodulator_priv = dev;
1237 *cfg->fe = &dev->fe;
1238 if (cfg->ops) {
1239 cfg->ops->pid_filter = af9033_pid_filter;
1240 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1241 }
1242 i2c_set_clientdata(client, dev);
1243
1244 dev_info(&dev->client->dev, "Afatech AF9033 successfully attached\n");
1245 return 0;
1246 err_kfree:
1247 kfree(dev);
1248 err:
1249 dev_dbg(&client->dev, "failed=%d\n", ret);
1250 return ret;
1251 }
1252
af9033_remove(struct i2c_client * client)1253 static int af9033_remove(struct i2c_client *client)
1254 {
1255 struct af9033_dev *dev = i2c_get_clientdata(client);
1256
1257 dev_dbg(&dev->client->dev, "\n");
1258
1259 dev->fe.ops.release = NULL;
1260 dev->fe.demodulator_priv = NULL;
1261 kfree(dev);
1262
1263 return 0;
1264 }
1265
1266 static const struct i2c_device_id af9033_id_table[] = {
1267 {"af9033", 0},
1268 {}
1269 };
1270 MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1271
1272 static struct i2c_driver af9033_driver = {
1273 .driver = {
1274 .owner = THIS_MODULE,
1275 .name = "af9033",
1276 },
1277 .probe = af9033_probe,
1278 .remove = af9033_remove,
1279 .id_table = af9033_id_table,
1280 };
1281
1282 module_i2c_driver(af9033_driver);
1283
1284 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1285 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1286 MODULE_LICENSE("GPL");
1287