1 /*
2 Conexant cx24117/cx24132 - Dual DVBS/S2 Satellite demod/tuner driver
3
4 Copyright (C) 2013 Luis Alves <ljalvs@gmail.com>
5 July, 6th 2013
6 First release based on cx24116 driver by:
7 Steven Toth and Georg Acher, Darron Broad, Igor Liplianin
8 Cards currently supported:
9 TBS6980 - Dual DVBS/S2 PCIe card
10 TBS6981 - Dual DVBS/S2 PCIe card
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27 #include <linux/slab.h>
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/moduleparam.h>
31 #include <linux/init.h>
32 #include <linux/firmware.h>
33
34 #include "tuner-i2c.h"
35 #include "dvb_frontend.h"
36 #include "cx24117.h"
37
38
39 #define CX24117_DEFAULT_FIRMWARE "dvb-fe-cx24117.fw"
40 #define CX24117_SEARCH_RANGE_KHZ 5000
41
42 /* known registers */
43 #define CX24117_REG_COMMAND (0x00) /* command buffer */
44 #define CX24117_REG_EXECUTE (0x1f) /* execute command */
45
46 #define CX24117_REG_FREQ3_0 (0x34) /* frequency */
47 #define CX24117_REG_FREQ2_0 (0x35)
48 #define CX24117_REG_FREQ1_0 (0x36)
49 #define CX24117_REG_STATE0 (0x39)
50 #define CX24117_REG_SSTATUS0 (0x3a) /* demod0 signal high / status */
51 #define CX24117_REG_SIGNAL0 (0x3b)
52 #define CX24117_REG_FREQ5_0 (0x3c) /* +-freq */
53 #define CX24117_REG_FREQ6_0 (0x3d)
54 #define CX24117_REG_SRATE2_0 (0x3e) /* +- 1000 * srate */
55 #define CX24117_REG_SRATE1_0 (0x3f)
56 #define CX24117_REG_QUALITY2_0 (0x40)
57 #define CX24117_REG_QUALITY1_0 (0x41)
58
59 #define CX24117_REG_BER4_0 (0x47)
60 #define CX24117_REG_BER3_0 (0x48)
61 #define CX24117_REG_BER2_0 (0x49)
62 #define CX24117_REG_BER1_0 (0x4a)
63 #define CX24117_REG_DVBS_UCB2_0 (0x4b)
64 #define CX24117_REG_DVBS_UCB1_0 (0x4c)
65 #define CX24117_REG_DVBS2_UCB2_0 (0x50)
66 #define CX24117_REG_DVBS2_UCB1_0 (0x51)
67 #define CX24117_REG_QSTATUS0 (0x93)
68 #define CX24117_REG_CLKDIV0 (0xe6)
69 #define CX24117_REG_RATEDIV0 (0xf0)
70
71
72 #define CX24117_REG_FREQ3_1 (0x55) /* frequency */
73 #define CX24117_REG_FREQ2_1 (0x56)
74 #define CX24117_REG_FREQ1_1 (0x57)
75 #define CX24117_REG_STATE1 (0x5a)
76 #define CX24117_REG_SSTATUS1 (0x5b) /* demod1 signal high / status */
77 #define CX24117_REG_SIGNAL1 (0x5c)
78 #define CX24117_REG_FREQ5_1 (0x5d) /* +- freq */
79 #define CX24117_REG_FREQ4_1 (0x5e)
80 #define CX24117_REG_SRATE2_1 (0x5f)
81 #define CX24117_REG_SRATE1_1 (0x60)
82 #define CX24117_REG_QUALITY2_1 (0x61)
83 #define CX24117_REG_QUALITY1_1 (0x62)
84 #define CX24117_REG_BER4_1 (0x68)
85 #define CX24117_REG_BER3_1 (0x69)
86 #define CX24117_REG_BER2_1 (0x6a)
87 #define CX24117_REG_BER1_1 (0x6b)
88 #define CX24117_REG_DVBS_UCB2_1 (0x6c)
89 #define CX24117_REG_DVBS_UCB1_1 (0x6d)
90 #define CX24117_REG_DVBS2_UCB2_1 (0x71)
91 #define CX24117_REG_DVBS2_UCB1_1 (0x72)
92 #define CX24117_REG_QSTATUS1 (0x9f)
93 #define CX24117_REG_CLKDIV1 (0xe7)
94 #define CX24117_REG_RATEDIV1 (0xf1)
95
96
97 /* arg buffer size */
98 #define CX24117_ARGLEN (0x1e)
99
100 /* rolloff */
101 #define CX24117_ROLLOFF_020 (0x00)
102 #define CX24117_ROLLOFF_025 (0x01)
103 #define CX24117_ROLLOFF_035 (0x02)
104
105 /* pilot bit */
106 #define CX24117_PILOT_OFF (0x00)
107 #define CX24117_PILOT_ON (0x40)
108 #define CX24117_PILOT_AUTO (0x80)
109
110 /* signal status */
111 #define CX24117_HAS_SIGNAL (0x01)
112 #define CX24117_HAS_CARRIER (0x02)
113 #define CX24117_HAS_VITERBI (0x04)
114 #define CX24117_HAS_SYNCLOCK (0x08)
115 #define CX24117_STATUS_MASK (0x0f)
116 #define CX24117_SIGNAL_MASK (0xc0)
117
118
119 /* arg offset for DiSEqC */
120 #define CX24117_DISEQC_DEMOD (1)
121 #define CX24117_DISEQC_BURST (2)
122 #define CX24117_DISEQC_ARG3_2 (3) /* unknown value=2 */
123 #define CX24117_DISEQC_ARG4_0 (4) /* unknown value=0 */
124 #define CX24117_DISEQC_ARG5_0 (5) /* unknown value=0 */
125 #define CX24117_DISEQC_MSGLEN (6)
126 #define CX24117_DISEQC_MSGOFS (7)
127
128 /* DiSEqC burst */
129 #define CX24117_DISEQC_MINI_A (0)
130 #define CX24117_DISEQC_MINI_B (1)
131
132
133 #define CX24117_PNE (0) /* 0 disabled / 2 enabled */
134 #define CX24117_OCC (1) /* 0 disabled / 1 enabled */
135
136
137 enum cmds {
138 CMD_SET_VCOFREQ = 0x10,
139 CMD_TUNEREQUEST = 0x11,
140 CMD_GLOBAL_MPEGCFG = 0x13,
141 CMD_MPEGCFG = 0x14,
142 CMD_TUNERINIT = 0x15,
143 CMD_GET_SRATE = 0x18,
144 CMD_SET_GOLDCODE = 0x19,
145 CMD_GET_AGCACC = 0x1a,
146 CMD_DEMODINIT = 0x1b,
147 CMD_GETCTLACC = 0x1c,
148
149 CMD_LNBCONFIG = 0x20,
150 CMD_LNBSEND = 0x21,
151 CMD_LNBDCLEVEL = 0x22,
152 CMD_LNBPCBCONFIG = 0x23,
153 CMD_LNBSENDTONEBST = 0x24,
154 CMD_LNBUPDREPLY = 0x25,
155
156 CMD_SET_GPIOMODE = 0x30,
157 CMD_SET_GPIOEN = 0x31,
158 CMD_SET_GPIODIR = 0x32,
159 CMD_SET_GPIOOUT = 0x33,
160 CMD_ENABLERSCORR = 0x34,
161 CMD_FWVERSION = 0x35,
162 CMD_SET_SLEEPMODE = 0x36,
163 CMD_BERCTRL = 0x3c,
164 CMD_EVENTCTRL = 0x3d,
165 };
166
167 static LIST_HEAD(hybrid_tuner_instance_list);
168 static DEFINE_MUTEX(cx24117_list_mutex);
169
170 /* The Demod/Tuner can't easily provide these, we cache them */
171 struct cx24117_tuning {
172 u32 frequency;
173 u32 symbol_rate;
174 fe_spectral_inversion_t inversion;
175 fe_code_rate_t fec;
176
177 fe_delivery_system_t delsys;
178 fe_modulation_t modulation;
179 fe_pilot_t pilot;
180 fe_rolloff_t rolloff;
181
182 /* Demod values */
183 u8 fec_val;
184 u8 fec_mask;
185 u8 inversion_val;
186 u8 pilot_val;
187 u8 rolloff_val;
188 };
189
190 /* Basic commands that are sent to the firmware */
191 struct cx24117_cmd {
192 u8 len;
193 u8 args[CX24117_ARGLEN];
194 };
195
196 /* common to both fe's */
197 struct cx24117_priv {
198 u8 demod_address;
199 struct i2c_adapter *i2c;
200 u8 skip_fw_load;
201 struct mutex fe_lock;
202
203 /* Used for sharing this struct between demods */
204 struct tuner_i2c_props i2c_props;
205 struct list_head hybrid_tuner_instance_list;
206 };
207
208 /* one per each fe */
209 struct cx24117_state {
210 struct cx24117_priv *priv;
211 struct dvb_frontend frontend;
212
213 struct cx24117_tuning dcur;
214 struct cx24117_tuning dnxt;
215 struct cx24117_cmd dsec_cmd;
216
217 int demod;
218 };
219
220 /* modfec (modulation and FEC) lookup table */
221 /* Check cx24116.c for a detailed description of each field */
222 static struct cx24117_modfec {
223 fe_delivery_system_t delivery_system;
224 fe_modulation_t modulation;
225 fe_code_rate_t fec;
226 u8 mask; /* In DVBS mode this is used to autodetect */
227 u8 val; /* Passed to the firmware to indicate mode selection */
228 } cx24117_modfec_modes[] = {
229 /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */
230
231 /*mod fec mask val */
232 { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 },
233 { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */
234 { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */
235 { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */
236 { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */
237 { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */
238 { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */
239 { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */
240 { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */
241 { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 },
242 /* NBC-QPSK */
243 { SYS_DVBS2, QPSK, FEC_NONE, 0x00, 0x00 },
244 { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 },
245 { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 },
246 { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 },
247 { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 },
248 { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 },
249 { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 },
250 { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a },
251 { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b },
252 { SYS_DVBS2, QPSK, FEC_AUTO, 0x00, 0x00 },
253 /* 8PSK */
254 { SYS_DVBS2, PSK_8, FEC_NONE, 0x00, 0x00 },
255 { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c },
256 { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d },
257 { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e },
258 { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f },
259 { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 },
260 { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 },
261 { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00, 0x00 },
262 /*
263 * 'val' can be found in the FECSTATUS register when tuning.
264 * FECSTATUS will give the actual FEC in use if tuning was successful.
265 */
266 };
267
268
cx24117_writereg(struct cx24117_state * state,u8 reg,u8 data)269 static int cx24117_writereg(struct cx24117_state *state, u8 reg, u8 data)
270 {
271 u8 buf[] = { reg, data };
272 struct i2c_msg msg = { .addr = state->priv->demod_address,
273 .flags = 0, .buf = buf, .len = 2 };
274 int ret;
275
276 dev_dbg(&state->priv->i2c->dev,
277 "%s() demod%d i2c wr @0x%02x=0x%02x\n",
278 __func__, state->demod, reg, data);
279
280 ret = i2c_transfer(state->priv->i2c, &msg, 1);
281 if (ret < 0) {
282 dev_warn(&state->priv->i2c->dev,
283 "%s: demod%d i2c wr err(%i) @0x%02x=0x%02x\n",
284 KBUILD_MODNAME, state->demod, ret, reg, data);
285 return ret;
286 }
287 return 0;
288 }
289
cx24117_writecmd(struct cx24117_state * state,struct cx24117_cmd * cmd)290 static int cx24117_writecmd(struct cx24117_state *state,
291 struct cx24117_cmd *cmd)
292 {
293 struct i2c_msg msg;
294 u8 buf[CX24117_ARGLEN+1];
295 int ret;
296
297 dev_dbg(&state->priv->i2c->dev,
298 "%s() demod%d i2c wr cmd len=%d\n",
299 __func__, state->demod, cmd->len);
300
301 buf[0] = CX24117_REG_COMMAND;
302 memcpy(&buf[1], cmd->args, cmd->len);
303
304 msg.addr = state->priv->demod_address;
305 msg.flags = 0;
306 msg.len = cmd->len+1;
307 msg.buf = buf;
308 ret = i2c_transfer(state->priv->i2c, &msg, 1);
309 if (ret < 0) {
310 dev_warn(&state->priv->i2c->dev,
311 "%s: demod%d i2c wr cmd err(%i) len=%d\n",
312 KBUILD_MODNAME, state->demod, ret, cmd->len);
313 return ret;
314 }
315 return 0;
316 }
317
cx24117_readreg(struct cx24117_state * state,u8 reg)318 static int cx24117_readreg(struct cx24117_state *state, u8 reg)
319 {
320 int ret;
321 u8 recv = 0;
322 struct i2c_msg msg[] = {
323 { .addr = state->priv->demod_address, .flags = 0,
324 .buf = ®, .len = 1 },
325 { .addr = state->priv->demod_address, .flags = I2C_M_RD,
326 .buf = &recv, .len = 1 }
327 };
328
329 ret = i2c_transfer(state->priv->i2c, msg, 2);
330 if (ret < 0) {
331 dev_warn(&state->priv->i2c->dev,
332 "%s: demod%d i2c rd err(%d) @0x%x\n",
333 KBUILD_MODNAME, state->demod, ret, reg);
334 return ret;
335 }
336
337 dev_dbg(&state->priv->i2c->dev, "%s() demod%d i2c rd @0x%02x=0x%02x\n",
338 __func__, state->demod, reg, recv);
339
340 return recv;
341 }
342
cx24117_readregN(struct cx24117_state * state,u8 reg,u8 * buf,int len)343 static int cx24117_readregN(struct cx24117_state *state,
344 u8 reg, u8 *buf, int len)
345 {
346 int ret;
347 struct i2c_msg msg[] = {
348 { .addr = state->priv->demod_address, .flags = 0,
349 .buf = ®, .len = 1 },
350 { .addr = state->priv->demod_address, .flags = I2C_M_RD,
351 .buf = buf, .len = len }
352 };
353
354 ret = i2c_transfer(state->priv->i2c, msg, 2);
355 if (ret < 0) {
356 dev_warn(&state->priv->i2c->dev,
357 "%s: demod%d i2c rd err(%d) @0x%x\n",
358 KBUILD_MODNAME, state->demod, ret, reg);
359 return ret;
360 }
361 return 0;
362 }
363
cx24117_set_inversion(struct cx24117_state * state,fe_spectral_inversion_t inversion)364 static int cx24117_set_inversion(struct cx24117_state *state,
365 fe_spectral_inversion_t inversion)
366 {
367 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
368 __func__, inversion, state->demod);
369
370 switch (inversion) {
371 case INVERSION_OFF:
372 state->dnxt.inversion_val = 0x00;
373 break;
374 case INVERSION_ON:
375 state->dnxt.inversion_val = 0x04;
376 break;
377 case INVERSION_AUTO:
378 state->dnxt.inversion_val = 0x0C;
379 break;
380 default:
381 return -EINVAL;
382 }
383
384 state->dnxt.inversion = inversion;
385
386 return 0;
387 }
388
cx24117_lookup_fecmod(struct cx24117_state * state,fe_delivery_system_t d,fe_modulation_t m,fe_code_rate_t f)389 static int cx24117_lookup_fecmod(struct cx24117_state *state,
390 fe_delivery_system_t d, fe_modulation_t m, fe_code_rate_t f)
391 {
392 int i, ret = -EINVAL;
393
394 dev_dbg(&state->priv->i2c->dev,
395 "%s(demod(0x%02x,0x%02x) demod%d\n",
396 __func__, m, f, state->demod);
397
398 for (i = 0; i < ARRAY_SIZE(cx24117_modfec_modes); i++) {
399 if ((d == cx24117_modfec_modes[i].delivery_system) &&
400 (m == cx24117_modfec_modes[i].modulation) &&
401 (f == cx24117_modfec_modes[i].fec)) {
402 ret = i;
403 break;
404 }
405 }
406
407 return ret;
408 }
409
cx24117_set_fec(struct cx24117_state * state,fe_delivery_system_t delsys,fe_modulation_t mod,fe_code_rate_t fec)410 static int cx24117_set_fec(struct cx24117_state *state,
411 fe_delivery_system_t delsys, fe_modulation_t mod, fe_code_rate_t fec)
412 {
413 int ret;
414
415 dev_dbg(&state->priv->i2c->dev,
416 "%s(0x%02x,0x%02x) demod%d\n",
417 __func__, mod, fec, state->demod);
418
419 ret = cx24117_lookup_fecmod(state, delsys, mod, fec);
420 if (ret < 0)
421 return ret;
422
423 state->dnxt.fec = fec;
424 state->dnxt.fec_val = cx24117_modfec_modes[ret].val;
425 state->dnxt.fec_mask = cx24117_modfec_modes[ret].mask;
426 dev_dbg(&state->priv->i2c->dev,
427 "%s() demod%d mask/val = 0x%02x/0x%02x\n", __func__,
428 state->demod, state->dnxt.fec_mask, state->dnxt.fec_val);
429
430 return 0;
431 }
432
cx24117_set_symbolrate(struct cx24117_state * state,u32 rate)433 static int cx24117_set_symbolrate(struct cx24117_state *state, u32 rate)
434 {
435 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
436 __func__, rate, state->demod);
437
438 state->dnxt.symbol_rate = rate;
439
440 dev_dbg(&state->priv->i2c->dev,
441 "%s() demod%d symbol_rate = %d\n",
442 __func__, state->demod, rate);
443
444 return 0;
445 }
446
447 static int cx24117_load_firmware(struct dvb_frontend *fe,
448 const struct firmware *fw);
449
cx24117_firmware_ondemand(struct dvb_frontend * fe)450 static int cx24117_firmware_ondemand(struct dvb_frontend *fe)
451 {
452 struct cx24117_state *state = fe->demodulator_priv;
453 const struct firmware *fw;
454 int ret = 0;
455
456 dev_dbg(&state->priv->i2c->dev, "%s() demod%d skip_fw_load=%d\n",
457 __func__, state->demod, state->priv->skip_fw_load);
458
459 if (state->priv->skip_fw_load)
460 return 0;
461
462 /* check if firmware if already running */
463 if (cx24117_readreg(state, 0xeb) != 0xa) {
464 /* Load firmware */
465 /* request the firmware, this will block until loaded */
466 dev_dbg(&state->priv->i2c->dev,
467 "%s: Waiting for firmware upload (%s)...\n",
468 __func__, CX24117_DEFAULT_FIRMWARE);
469 ret = request_firmware(&fw, CX24117_DEFAULT_FIRMWARE,
470 state->priv->i2c->dev.parent);
471 dev_dbg(&state->priv->i2c->dev,
472 "%s: Waiting for firmware upload(2)...\n", __func__);
473 if (ret) {
474 dev_err(&state->priv->i2c->dev,
475 "%s: No firmware uploaded "
476 "(timeout or file not found?)\n", __func__);
477 return ret;
478 }
479
480 /* Make sure we don't recurse back through here
481 * during loading */
482 state->priv->skip_fw_load = 1;
483
484 ret = cx24117_load_firmware(fe, fw);
485 if (ret)
486 dev_err(&state->priv->i2c->dev,
487 "%s: Writing firmware failed\n", __func__);
488 release_firmware(fw);
489
490 dev_info(&state->priv->i2c->dev,
491 "%s: Firmware upload %s\n", __func__,
492 ret == 0 ? "complete" : "failed");
493
494 /* Ensure firmware is always loaded if required */
495 state->priv->skip_fw_load = 0;
496 }
497
498 return ret;
499 }
500
501 /* Take a basic firmware command structure, format it
502 * and forward it for processing
503 */
cx24117_cmd_execute_nolock(struct dvb_frontend * fe,struct cx24117_cmd * cmd)504 static int cx24117_cmd_execute_nolock(struct dvb_frontend *fe,
505 struct cx24117_cmd *cmd)
506 {
507 struct cx24117_state *state = fe->demodulator_priv;
508 int i, ret;
509
510 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
511 __func__, state->demod);
512
513 /* Load the firmware if required */
514 ret = cx24117_firmware_ondemand(fe);
515 if (ret != 0)
516 return ret;
517
518 /* Write the command */
519 cx24117_writecmd(state, cmd);
520
521 /* Start execution and wait for cmd to terminate */
522 cx24117_writereg(state, CX24117_REG_EXECUTE, 0x01);
523 i = 0;
524 while (cx24117_readreg(state, CX24117_REG_EXECUTE)) {
525 msleep(20);
526 if (i++ > 40) {
527 /* Avoid looping forever if the firmware does
528 not respond */
529 dev_warn(&state->priv->i2c->dev,
530 "%s() Firmware not responding\n", __func__);
531 return -EIO;
532 }
533 }
534 return 0;
535 }
536
cx24117_cmd_execute(struct dvb_frontend * fe,struct cx24117_cmd * cmd)537 static int cx24117_cmd_execute(struct dvb_frontend *fe, struct cx24117_cmd *cmd)
538 {
539 struct cx24117_state *state = fe->demodulator_priv;
540 int ret;
541
542 mutex_lock(&state->priv->fe_lock);
543 ret = cx24117_cmd_execute_nolock(fe, cmd);
544 mutex_unlock(&state->priv->fe_lock);
545
546 return ret;
547 }
548
cx24117_load_firmware(struct dvb_frontend * fe,const struct firmware * fw)549 static int cx24117_load_firmware(struct dvb_frontend *fe,
550 const struct firmware *fw)
551 {
552 struct cx24117_state *state = fe->demodulator_priv;
553 struct cx24117_cmd cmd;
554 int i, ret;
555 unsigned char vers[4];
556
557 struct i2c_msg msg;
558 u8 *buf;
559
560 dev_dbg(&state->priv->i2c->dev,
561 "%s() demod%d FW is %zu bytes (%02x %02x .. %02x %02x)\n",
562 __func__, state->demod, fw->size, fw->data[0], fw->data[1],
563 fw->data[fw->size - 2], fw->data[fw->size - 1]);
564
565 cx24117_writereg(state, 0xea, 0x00);
566 cx24117_writereg(state, 0xea, 0x01);
567 cx24117_writereg(state, 0xea, 0x00);
568
569 cx24117_writereg(state, 0xce, 0x92);
570
571 cx24117_writereg(state, 0xfb, 0x00);
572 cx24117_writereg(state, 0xfc, 0x00);
573
574 cx24117_writereg(state, 0xc3, 0x04);
575 cx24117_writereg(state, 0xc4, 0x04);
576
577 cx24117_writereg(state, 0xce, 0x00);
578 cx24117_writereg(state, 0xcf, 0x00);
579
580 cx24117_writereg(state, 0xea, 0x00);
581 cx24117_writereg(state, 0xeb, 0x0c);
582 cx24117_writereg(state, 0xec, 0x06);
583 cx24117_writereg(state, 0xed, 0x05);
584 cx24117_writereg(state, 0xee, 0x03);
585 cx24117_writereg(state, 0xef, 0x05);
586
587 cx24117_writereg(state, 0xf3, 0x03);
588 cx24117_writereg(state, 0xf4, 0x44);
589
590 cx24117_writereg(state, CX24117_REG_RATEDIV0, 0x04);
591 cx24117_writereg(state, CX24117_REG_CLKDIV0, 0x02);
592
593 cx24117_writereg(state, CX24117_REG_RATEDIV1, 0x04);
594 cx24117_writereg(state, CX24117_REG_CLKDIV1, 0x02);
595
596 cx24117_writereg(state, 0xf2, 0x04);
597 cx24117_writereg(state, 0xe8, 0x02);
598 cx24117_writereg(state, 0xea, 0x01);
599 cx24117_writereg(state, 0xc8, 0x00);
600 cx24117_writereg(state, 0xc9, 0x00);
601 cx24117_writereg(state, 0xca, 0x00);
602 cx24117_writereg(state, 0xcb, 0x00);
603 cx24117_writereg(state, 0xcc, 0x00);
604 cx24117_writereg(state, 0xcd, 0x00);
605 cx24117_writereg(state, 0xe4, 0x03);
606 cx24117_writereg(state, 0xeb, 0x0a);
607
608 cx24117_writereg(state, 0xfb, 0x00);
609 cx24117_writereg(state, 0xe0, 0x76);
610 cx24117_writereg(state, 0xf7, 0x81);
611 cx24117_writereg(state, 0xf8, 0x00);
612 cx24117_writereg(state, 0xf9, 0x00);
613
614 buf = kmalloc(fw->size + 1, GFP_KERNEL);
615 if (buf == NULL) {
616 state->priv->skip_fw_load = 0;
617 return -ENOMEM;
618 }
619
620 /* fw upload reg */
621 buf[0] = 0xfa;
622 memcpy(&buf[1], fw->data, fw->size);
623
624 /* prepare i2c message to send */
625 msg.addr = state->priv->demod_address;
626 msg.flags = 0;
627 msg.len = fw->size + 1;
628 msg.buf = buf;
629
630 /* send fw */
631 ret = i2c_transfer(state->priv->i2c, &msg, 1);
632 if (ret < 0)
633 return ret;
634
635 kfree(buf);
636
637 cx24117_writereg(state, 0xf7, 0x0c);
638 cx24117_writereg(state, 0xe0, 0x00);
639
640 /* Init demodulator */
641 cmd.args[0] = CMD_DEMODINIT;
642 cmd.args[1] = 0x00;
643 cmd.args[2] = 0x01;
644 cmd.args[3] = 0x00;
645 cmd.len = 4;
646 ret = cx24117_cmd_execute_nolock(fe, &cmd);
647 if (ret != 0)
648 goto error;
649
650 /* Set VCO frequency */
651 cmd.args[0] = CMD_SET_VCOFREQ;
652 cmd.args[1] = 0x06;
653 cmd.args[2] = 0x2b;
654 cmd.args[3] = 0xd8;
655 cmd.args[4] = 0xa5;
656 cmd.args[5] = 0xee;
657 cmd.args[6] = 0x03;
658 cmd.args[7] = 0x9d;
659 cmd.args[8] = 0xfc;
660 cmd.args[9] = 0x06;
661 cmd.args[10] = 0x02;
662 cmd.args[11] = 0x9d;
663 cmd.args[12] = 0xfc;
664 cmd.len = 13;
665 ret = cx24117_cmd_execute_nolock(fe, &cmd);
666 if (ret != 0)
667 goto error;
668
669 /* Tuner init */
670 cmd.args[0] = CMD_TUNERINIT;
671 cmd.args[1] = 0x00;
672 cmd.args[2] = 0x01;
673 cmd.args[3] = 0x00;
674 cmd.args[4] = 0x00;
675 cmd.args[5] = 0x01;
676 cmd.args[6] = 0x01;
677 cmd.args[7] = 0x01;
678 cmd.args[8] = 0x00;
679 cmd.args[9] = 0x05;
680 cmd.args[10] = 0x02;
681 cmd.args[11] = 0x02;
682 cmd.args[12] = 0x00;
683 cmd.len = 13;
684 ret = cx24117_cmd_execute_nolock(fe, &cmd);
685 if (ret != 0)
686 goto error;
687
688 /* Global MPEG config */
689 cmd.args[0] = CMD_GLOBAL_MPEGCFG;
690 cmd.args[1] = 0x00;
691 cmd.args[2] = 0x00;
692 cmd.args[3] = 0x00;
693 cmd.args[4] = 0x01;
694 cmd.args[5] = 0x00;
695 cmd.len = 6;
696 ret = cx24117_cmd_execute_nolock(fe, &cmd);
697 if (ret != 0)
698 goto error;
699
700 /* MPEG config for each demod */
701 for (i = 0; i < 2; i++) {
702 cmd.args[0] = CMD_MPEGCFG;
703 cmd.args[1] = (u8) i;
704 cmd.args[2] = 0x00;
705 cmd.args[3] = 0x05;
706 cmd.args[4] = 0x00;
707 cmd.args[5] = 0x00;
708 cmd.args[6] = 0x55;
709 cmd.args[7] = 0x00;
710 cmd.len = 8;
711 ret = cx24117_cmd_execute_nolock(fe, &cmd);
712 if (ret != 0)
713 goto error;
714 }
715
716 cx24117_writereg(state, 0xce, 0xc0);
717 cx24117_writereg(state, 0xcf, 0x00);
718 cx24117_writereg(state, 0xe5, 0x04);
719
720 /* Get firmware version */
721 cmd.args[0] = CMD_FWVERSION;
722 cmd.len = 2;
723 for (i = 0; i < 4; i++) {
724 cmd.args[1] = i;
725 ret = cx24117_cmd_execute_nolock(fe, &cmd);
726 if (ret != 0)
727 goto error;
728 vers[i] = cx24117_readreg(state, 0x33);
729 }
730 dev_info(&state->priv->i2c->dev,
731 "%s: FW version %i.%i.%i.%i\n", __func__,
732 vers[0], vers[1], vers[2], vers[3]);
733 return 0;
734 error:
735 state->priv->skip_fw_load = 0;
736 dev_err(&state->priv->i2c->dev, "%s() Error running FW.\n", __func__);
737 return ret;
738 }
739
cx24117_read_status(struct dvb_frontend * fe,fe_status_t * status)740 static int cx24117_read_status(struct dvb_frontend *fe, fe_status_t *status)
741 {
742 struct cx24117_state *state = fe->demodulator_priv;
743 int lock;
744
745 lock = cx24117_readreg(state,
746 (state->demod == 0) ? CX24117_REG_SSTATUS0 :
747 CX24117_REG_SSTATUS1) &
748 CX24117_STATUS_MASK;
749
750 dev_dbg(&state->priv->i2c->dev, "%s() demod%d status = 0x%02x\n",
751 __func__, state->demod, lock);
752
753 *status = 0;
754
755 if (lock & CX24117_HAS_SIGNAL)
756 *status |= FE_HAS_SIGNAL;
757 if (lock & CX24117_HAS_CARRIER)
758 *status |= FE_HAS_CARRIER;
759 if (lock & CX24117_HAS_VITERBI)
760 *status |= FE_HAS_VITERBI;
761 if (lock & CX24117_HAS_SYNCLOCK)
762 *status |= FE_HAS_SYNC | FE_HAS_LOCK;
763
764 return 0;
765 }
766
cx24117_read_ber(struct dvb_frontend * fe,u32 * ber)767 static int cx24117_read_ber(struct dvb_frontend *fe, u32 *ber)
768 {
769 struct cx24117_state *state = fe->demodulator_priv;
770 int ret;
771 u8 buf[4];
772 u8 base_reg = (state->demod == 0) ?
773 CX24117_REG_BER4_0 :
774 CX24117_REG_BER4_1;
775
776 ret = cx24117_readregN(state, base_reg, buf, 4);
777 if (ret != 0)
778 return ret;
779
780 *ber = (buf[0] << 24) | (buf[1] << 16) |
781 (buf[1] << 8) | buf[0];
782
783 dev_dbg(&state->priv->i2c->dev, "%s() demod%d ber=0x%04x\n",
784 __func__, state->demod, *ber);
785
786 return 0;
787 }
788
cx24117_read_signal_strength(struct dvb_frontend * fe,u16 * signal_strength)789 static int cx24117_read_signal_strength(struct dvb_frontend *fe,
790 u16 *signal_strength)
791 {
792 struct cx24117_state *state = fe->demodulator_priv;
793 struct cx24117_cmd cmd;
794 int ret;
795 u16 sig_reading;
796 u8 buf[2];
797 u8 reg = (state->demod == 0) ?
798 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1;
799
800 /* Read AGC accumulator register */
801 cmd.args[0] = CMD_GET_AGCACC;
802 cmd.args[1] = (u8) state->demod;
803 cmd.len = 2;
804 ret = cx24117_cmd_execute(fe, &cmd);
805 if (ret != 0)
806 return ret;
807
808 ret = cx24117_readregN(state, reg, buf, 2);
809 if (ret != 0)
810 return ret;
811 sig_reading = ((buf[0] & CX24117_SIGNAL_MASK) << 2) | buf[1];
812
813 *signal_strength = -100 * sig_reading + 94324;
814
815 dev_dbg(&state->priv->i2c->dev,
816 "%s() demod%d raw / cooked = 0x%04x / 0x%04x\n",
817 __func__, state->demod, sig_reading, *signal_strength);
818
819 return 0;
820 }
821
cx24117_read_snr(struct dvb_frontend * fe,u16 * snr)822 static int cx24117_read_snr(struct dvb_frontend *fe, u16 *snr)
823 {
824 struct cx24117_state *state = fe->demodulator_priv;
825 int ret;
826 u8 buf[2];
827 u8 reg = (state->demod == 0) ?
828 CX24117_REG_QUALITY2_0 : CX24117_REG_QUALITY2_1;
829
830 ret = cx24117_readregN(state, reg, buf, 2);
831 if (ret != 0)
832 return ret;
833
834 *snr = (buf[0] << 8) | buf[1];
835
836 dev_dbg(&state->priv->i2c->dev,
837 "%s() demod%d snr = 0x%04x\n",
838 __func__, state->demod, *snr);
839
840 return ret;
841 }
842
cx24117_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)843 static int cx24117_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
844 {
845 struct cx24117_state *state = fe->demodulator_priv;
846 fe_delivery_system_t delsys = fe->dtv_property_cache.delivery_system;
847 int ret;
848 u8 buf[2];
849 u8 reg = (state->demod == 0) ?
850 CX24117_REG_DVBS_UCB2_0 :
851 CX24117_REG_DVBS_UCB2_1;
852
853 switch (delsys) {
854 case SYS_DVBS:
855 break;
856 case SYS_DVBS2:
857 reg += (CX24117_REG_DVBS2_UCB2_0 - CX24117_REG_DVBS_UCB2_0);
858 break;
859 default:
860 return -EINVAL;
861 }
862
863 ret = cx24117_readregN(state, reg, buf, 2);
864 if (ret != 0)
865 return ret;
866 *ucblocks = (buf[0] << 8) | buf[1];
867
868 dev_dbg(&state->priv->i2c->dev, "%s() demod%d ucb=0x%04x\n",
869 __func__, state->demod, *ucblocks);
870
871 return 0;
872 }
873
874 /* Overwrite the current tuning params, we are about to tune */
cx24117_clone_params(struct dvb_frontend * fe)875 static void cx24117_clone_params(struct dvb_frontend *fe)
876 {
877 struct cx24117_state *state = fe->demodulator_priv;
878 state->dcur = state->dnxt;
879 }
880
881 /* Wait for LNB */
cx24117_wait_for_lnb(struct dvb_frontend * fe)882 static int cx24117_wait_for_lnb(struct dvb_frontend *fe)
883 {
884 struct cx24117_state *state = fe->demodulator_priv;
885 int i;
886 u8 val, reg = (state->demod == 0) ? CX24117_REG_QSTATUS0 :
887 CX24117_REG_QSTATUS1;
888
889 dev_dbg(&state->priv->i2c->dev, "%s() demod%d qstatus = 0x%02x\n",
890 __func__, state->demod, cx24117_readreg(state, reg));
891
892 /* Wait for up to 300 ms */
893 for (i = 0; i < 10; i++) {
894 val = cx24117_readreg(state, reg) & 0x01;
895 if (val != 0)
896 return 0;
897 msleep(30);
898 }
899
900 dev_warn(&state->priv->i2c->dev, "%s: demod%d LNB not ready\n",
901 KBUILD_MODNAME, state->demod);
902
903 return -ETIMEDOUT; /* -EBUSY ? */
904 }
905
cx24117_set_voltage(struct dvb_frontend * fe,fe_sec_voltage_t voltage)906 static int cx24117_set_voltage(struct dvb_frontend *fe,
907 fe_sec_voltage_t voltage)
908 {
909 struct cx24117_state *state = fe->demodulator_priv;
910 struct cx24117_cmd cmd;
911 int ret;
912 u8 reg = (state->demod == 0) ? 0x10 : 0x20;
913
914 dev_dbg(&state->priv->i2c->dev, "%s() demod%d %s\n",
915 __func__, state->demod,
916 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
917 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" :
918 "SEC_VOLTAGE_OFF");
919
920 /* Prepare a set GPIO logic level CMD */
921 cmd.args[0] = CMD_SET_GPIOOUT;
922 cmd.args[2] = reg; /* mask */
923 cmd.len = 3;
924
925 if ((voltage == SEC_VOLTAGE_13) ||
926 (voltage == SEC_VOLTAGE_18)) {
927 /* power on LNB */
928 cmd.args[1] = reg;
929 ret = cx24117_cmd_execute(fe, &cmd);
930 if (ret != 0)
931 return ret;
932
933 ret = cx24117_wait_for_lnb(fe);
934 if (ret != 0)
935 return ret;
936
937 /* Wait for voltage/min repeat delay */
938 msleep(100);
939
940 /* Set 13V/18V select pin */
941 cmd.args[0] = CMD_LNBDCLEVEL;
942 cmd.args[1] = state->demod ? 0 : 1;
943 cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00);
944 cmd.len = 3;
945 ret = cx24117_cmd_execute(fe, &cmd);
946
947 /* Min delay time before DiSEqC send */
948 msleep(20);
949 } else {
950 /* power off LNB */
951 cmd.args[1] = 0x00;
952 ret = cx24117_cmd_execute(fe, &cmd);
953 }
954
955 return ret;
956 }
957
cx24117_set_tone(struct dvb_frontend * fe,fe_sec_tone_mode_t tone)958 static int cx24117_set_tone(struct dvb_frontend *fe,
959 fe_sec_tone_mode_t tone)
960 {
961 struct cx24117_state *state = fe->demodulator_priv;
962 struct cx24117_cmd cmd;
963 int ret;
964
965 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
966 __func__, state->demod, tone);
967 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
968 dev_warn(&state->priv->i2c->dev, "%s: demod%d invalid tone=%d\n",
969 KBUILD_MODNAME, state->demod, tone);
970 return -EINVAL;
971 }
972
973 /* Wait for LNB ready */
974 ret = cx24117_wait_for_lnb(fe);
975 if (ret != 0)
976 return ret;
977
978 /* Min delay time after DiSEqC send */
979 msleep(20);
980
981 /* Set the tone */
982 cmd.args[0] = CMD_LNBPCBCONFIG;
983 cmd.args[1] = (state->demod ? 0 : 1);
984 cmd.args[2] = 0x00;
985 cmd.args[3] = 0x00;
986 cmd.len = 5;
987 switch (tone) {
988 case SEC_TONE_ON:
989 cmd.args[4] = 0x01;
990 break;
991 case SEC_TONE_OFF:
992 cmd.args[4] = 0x00;
993 break;
994 }
995
996 msleep(20);
997
998 return cx24117_cmd_execute(fe, &cmd);
999 }
1000
1001 /* Initialise DiSEqC */
cx24117_diseqc_init(struct dvb_frontend * fe)1002 static int cx24117_diseqc_init(struct dvb_frontend *fe)
1003 {
1004 struct cx24117_state *state = fe->demodulator_priv;
1005
1006 /* Prepare a DiSEqC command */
1007 state->dsec_cmd.args[0] = CMD_LNBSEND;
1008
1009 /* demod */
1010 state->dsec_cmd.args[CX24117_DISEQC_DEMOD] = state->demod ? 0 : 1;
1011
1012 /* DiSEqC burst */
1013 state->dsec_cmd.args[CX24117_DISEQC_BURST] = CX24117_DISEQC_MINI_A;
1014
1015 /* Unknown */
1016 state->dsec_cmd.args[CX24117_DISEQC_ARG3_2] = 0x02;
1017 state->dsec_cmd.args[CX24117_DISEQC_ARG4_0] = 0x00;
1018
1019 /* Continuation flag? */
1020 state->dsec_cmd.args[CX24117_DISEQC_ARG5_0] = 0x00;
1021
1022 /* DiSEqC message length */
1023 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = 0x00;
1024
1025 /* Command length */
1026 state->dsec_cmd.len = 7;
1027
1028 return 0;
1029 }
1030
1031 /* Send DiSEqC message */
cx24117_send_diseqc_msg(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * d)1032 static int cx24117_send_diseqc_msg(struct dvb_frontend *fe,
1033 struct dvb_diseqc_master_cmd *d)
1034 {
1035 struct cx24117_state *state = fe->demodulator_priv;
1036 int i, ret;
1037
1038 /* Dump DiSEqC message */
1039 dev_dbg(&state->priv->i2c->dev, "%s: demod %d (",
1040 __func__, state->demod);
1041 for (i = 0; i < d->msg_len; i++)
1042 dev_dbg(&state->priv->i2c->dev, "0x%02x ", d->msg[i]);
1043 dev_dbg(&state->priv->i2c->dev, ")\n");
1044
1045 /* Validate length */
1046 if (d->msg_len > sizeof(d->msg))
1047 return -EINVAL;
1048
1049 /* DiSEqC message */
1050 for (i = 0; i < d->msg_len; i++)
1051 state->dsec_cmd.args[CX24117_DISEQC_MSGOFS + i] = d->msg[i];
1052
1053 /* DiSEqC message length */
1054 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = d->msg_len;
1055
1056 /* Command length */
1057 state->dsec_cmd.len = CX24117_DISEQC_MSGOFS +
1058 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN];
1059
1060 /*
1061 * Message is sent with derived else cached burst
1062 *
1063 * WRITE PORT GROUP COMMAND 38
1064 *
1065 * 0/A/A: E0 10 38 F0..F3
1066 * 1/B/B: E0 10 38 F4..F7
1067 * 2/C/A: E0 10 38 F8..FB
1068 * 3/D/B: E0 10 38 FC..FF
1069 *
1070 * databyte[3]= 8421:8421
1071 * ABCD:WXYZ
1072 * CLR :SET
1073 *
1074 * WX= PORT SELECT 0..3 (X=TONEBURST)
1075 * Y = VOLTAGE (0=13V, 1=18V)
1076 * Z = BAND (0=LOW, 1=HIGH(22K))
1077 */
1078 if (d->msg_len >= 4 && d->msg[2] == 0x38)
1079 state->dsec_cmd.args[CX24117_DISEQC_BURST] =
1080 ((d->msg[3] & 4) >> 2);
1081
1082 dev_dbg(&state->priv->i2c->dev, "%s() demod%d burst=%d\n",
1083 __func__, state->demod,
1084 state->dsec_cmd.args[CX24117_DISEQC_BURST]);
1085
1086 /* Wait for LNB ready */
1087 ret = cx24117_wait_for_lnb(fe);
1088 if (ret != 0)
1089 return ret;
1090
1091 /* Wait for voltage/min repeat delay */
1092 msleep(100);
1093
1094 /* Command */
1095 ret = cx24117_cmd_execute(fe, &state->dsec_cmd);
1096 if (ret != 0)
1097 return ret;
1098 /*
1099 * Wait for send
1100 *
1101 * Eutelsat spec:
1102 * >15ms delay + (XXX determine if FW does this, see set_tone)
1103 * 13.5ms per byte +
1104 * >15ms delay +
1105 * 12.5ms burst +
1106 * >15ms delay (XXX determine if FW does this, see set_tone)
1107 */
1108 msleep((state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] << 4) + 60);
1109
1110 return 0;
1111 }
1112
1113 /* Send DiSEqC burst */
cx24117_diseqc_send_burst(struct dvb_frontend * fe,fe_sec_mini_cmd_t burst)1114 static int cx24117_diseqc_send_burst(struct dvb_frontend *fe,
1115 fe_sec_mini_cmd_t burst)
1116 {
1117 struct cx24117_state *state = fe->demodulator_priv;
1118
1119 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod=%d\n",
1120 __func__, burst, state->demod);
1121
1122 /* DiSEqC burst */
1123 if (burst == SEC_MINI_A)
1124 state->dsec_cmd.args[CX24117_DISEQC_BURST] =
1125 CX24117_DISEQC_MINI_A;
1126 else if (burst == SEC_MINI_B)
1127 state->dsec_cmd.args[CX24117_DISEQC_BURST] =
1128 CX24117_DISEQC_MINI_B;
1129 else
1130 return -EINVAL;
1131
1132 return 0;
1133 }
1134
cx24117_get_priv(struct cx24117_priv ** priv,struct i2c_adapter * i2c,u8 client_address)1135 static int cx24117_get_priv(struct cx24117_priv **priv,
1136 struct i2c_adapter *i2c, u8 client_address)
1137 {
1138 int ret;
1139
1140 mutex_lock(&cx24117_list_mutex);
1141 ret = hybrid_tuner_request_state(struct cx24117_priv, (*priv),
1142 hybrid_tuner_instance_list, i2c, client_address, "cx24117");
1143 mutex_unlock(&cx24117_list_mutex);
1144
1145 return ret;
1146 }
1147
cx24117_release_priv(struct cx24117_priv * priv)1148 static void cx24117_release_priv(struct cx24117_priv *priv)
1149 {
1150 mutex_lock(&cx24117_list_mutex);
1151 if (priv != NULL)
1152 hybrid_tuner_release_state(priv);
1153 mutex_unlock(&cx24117_list_mutex);
1154 }
1155
cx24117_release(struct dvb_frontend * fe)1156 static void cx24117_release(struct dvb_frontend *fe)
1157 {
1158 struct cx24117_state *state = fe->demodulator_priv;
1159 dev_dbg(&state->priv->i2c->dev, "%s demod%d\n",
1160 __func__, state->demod);
1161 cx24117_release_priv(state->priv);
1162 kfree(state);
1163 }
1164
1165 static struct dvb_frontend_ops cx24117_ops;
1166
cx24117_attach(const struct cx24117_config * config,struct i2c_adapter * i2c)1167 struct dvb_frontend *cx24117_attach(const struct cx24117_config *config,
1168 struct i2c_adapter *i2c)
1169 {
1170 struct cx24117_state *state = NULL;
1171 struct cx24117_priv *priv = NULL;
1172 int demod = 0;
1173
1174 /* get the common data struct for both demods */
1175 demod = cx24117_get_priv(&priv, i2c, config->demod_address);
1176
1177 switch (demod) {
1178 case 0:
1179 dev_err(&i2c->dev,
1180 "%s: Error attaching frontend %d\n",
1181 KBUILD_MODNAME, demod);
1182 goto error1;
1183 break;
1184 case 1:
1185 /* new priv instance */
1186 priv->i2c = i2c;
1187 priv->demod_address = config->demod_address;
1188 mutex_init(&priv->fe_lock);
1189 break;
1190 default:
1191 /* existing priv instance */
1192 break;
1193 }
1194
1195 /* allocate memory for the internal state */
1196 state = kzalloc(sizeof(struct cx24117_state), GFP_KERNEL);
1197 if (state == NULL)
1198 goto error2;
1199
1200 state->demod = demod - 1;
1201 state->priv = priv;
1202
1203 dev_info(&state->priv->i2c->dev,
1204 "%s: Attaching frontend %d\n",
1205 KBUILD_MODNAME, state->demod);
1206
1207 /* create dvb_frontend */
1208 memcpy(&state->frontend.ops, &cx24117_ops,
1209 sizeof(struct dvb_frontend_ops));
1210 state->frontend.demodulator_priv = state;
1211 return &state->frontend;
1212
1213 error2:
1214 cx24117_release_priv(priv);
1215 error1:
1216 return NULL;
1217 }
1218 EXPORT_SYMBOL_GPL(cx24117_attach);
1219
1220 /*
1221 * Initialise or wake up device
1222 *
1223 * Power config will reset and load initial firmware if required
1224 */
cx24117_initfe(struct dvb_frontend * fe)1225 static int cx24117_initfe(struct dvb_frontend *fe)
1226 {
1227 struct cx24117_state *state = fe->demodulator_priv;
1228 struct cx24117_cmd cmd;
1229 int ret;
1230
1231 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1232 __func__, state->demod);
1233
1234 mutex_lock(&state->priv->fe_lock);
1235
1236 /* Set sleep mode off */
1237 cmd.args[0] = CMD_SET_SLEEPMODE;
1238 cmd.args[1] = (state->demod ? 1 : 0);
1239 cmd.args[2] = 0;
1240 cmd.len = 3;
1241 ret = cx24117_cmd_execute_nolock(fe, &cmd);
1242 if (ret != 0)
1243 goto exit;
1244
1245 ret = cx24117_diseqc_init(fe);
1246 if (ret != 0)
1247 goto exit;
1248
1249 /* Set BER control */
1250 cmd.args[0] = CMD_BERCTRL;
1251 cmd.args[1] = (state->demod ? 1 : 0);
1252 cmd.args[2] = 0x10;
1253 cmd.args[3] = 0x10;
1254 cmd.len = 4;
1255 ret = cx24117_cmd_execute_nolock(fe, &cmd);
1256 if (ret != 0)
1257 goto exit;
1258
1259 /* Set RS correction (enable/disable) */
1260 cmd.args[0] = CMD_ENABLERSCORR;
1261 cmd.args[1] = (state->demod ? 1 : 0);
1262 cmd.args[2] = CX24117_OCC;
1263 cmd.len = 3;
1264 ret = cx24117_cmd_execute_nolock(fe, &cmd);
1265 if (ret != 0)
1266 goto exit;
1267
1268 /* Set GPIO direction */
1269 /* Set as output - controls LNB power on/off */
1270 cmd.args[0] = CMD_SET_GPIODIR;
1271 cmd.args[1] = 0x30;
1272 cmd.args[2] = 0x30;
1273 cmd.len = 3;
1274 ret = cx24117_cmd_execute_nolock(fe, &cmd);
1275
1276 exit:
1277 mutex_unlock(&state->priv->fe_lock);
1278
1279 return ret;
1280 }
1281
1282 /*
1283 * Put device to sleep
1284 */
cx24117_sleep(struct dvb_frontend * fe)1285 static int cx24117_sleep(struct dvb_frontend *fe)
1286 {
1287 struct cx24117_state *state = fe->demodulator_priv;
1288 struct cx24117_cmd cmd;
1289
1290 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1291 __func__, state->demod);
1292
1293 /* Set sleep mode on */
1294 cmd.args[0] = CMD_SET_SLEEPMODE;
1295 cmd.args[1] = (state->demod ? 1 : 0);
1296 cmd.args[2] = 1;
1297 cmd.len = 3;
1298 return cx24117_cmd_execute(fe, &cmd);
1299 }
1300
1301 /* dvb-core told us to tune, the tv property cache will be complete,
1302 * it's safe for is to pull values and use them for tuning purposes.
1303 */
cx24117_set_frontend(struct dvb_frontend * fe)1304 static int cx24117_set_frontend(struct dvb_frontend *fe)
1305 {
1306 struct cx24117_state *state = fe->demodulator_priv;
1307 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1308 struct cx24117_cmd cmd;
1309 fe_status_t tunerstat;
1310 int i, status, ret, retune = 1;
1311 u8 reg_clkdiv, reg_ratediv;
1312
1313 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1314 __func__, state->demod);
1315
1316 switch (c->delivery_system) {
1317 case SYS_DVBS:
1318 dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S\n",
1319 __func__, state->demod);
1320
1321 /* Only QPSK is supported for DVB-S */
1322 if (c->modulation != QPSK) {
1323 dev_dbg(&state->priv->i2c->dev,
1324 "%s() demod%d unsupported modulation (%d)\n",
1325 __func__, state->demod, c->modulation);
1326 return -EINVAL;
1327 }
1328
1329 /* Pilot doesn't exist in DVB-S, turn bit off */
1330 state->dnxt.pilot_val = CX24117_PILOT_OFF;
1331
1332 /* DVB-S only supports 0.35 */
1333 state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
1334 break;
1335
1336 case SYS_DVBS2:
1337 dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S2\n",
1338 __func__, state->demod);
1339
1340 /*
1341 * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2,
1342 * but not hardware auto detection
1343 */
1344 if (c->modulation != PSK_8 && c->modulation != QPSK) {
1345 dev_dbg(&state->priv->i2c->dev,
1346 "%s() demod%d unsupported modulation (%d)\n",
1347 __func__, state->demod, c->modulation);
1348 return -EOPNOTSUPP;
1349 }
1350
1351 switch (c->pilot) {
1352 case PILOT_AUTO:
1353 state->dnxt.pilot_val = CX24117_PILOT_AUTO;
1354 break;
1355 case PILOT_OFF:
1356 state->dnxt.pilot_val = CX24117_PILOT_OFF;
1357 break;
1358 case PILOT_ON:
1359 state->dnxt.pilot_val = CX24117_PILOT_ON;
1360 break;
1361 default:
1362 dev_dbg(&state->priv->i2c->dev,
1363 "%s() demod%d unsupported pilot mode (%d)\n",
1364 __func__, state->demod, c->pilot);
1365 return -EOPNOTSUPP;
1366 }
1367
1368 switch (c->rolloff) {
1369 case ROLLOFF_20:
1370 state->dnxt.rolloff_val = CX24117_ROLLOFF_020;
1371 break;
1372 case ROLLOFF_25:
1373 state->dnxt.rolloff_val = CX24117_ROLLOFF_025;
1374 break;
1375 case ROLLOFF_35:
1376 state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
1377 break;
1378 case ROLLOFF_AUTO:
1379 state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
1380 /* soft-auto rolloff */
1381 retune = 3;
1382 break;
1383 default:
1384 dev_warn(&state->priv->i2c->dev,
1385 "%s: demod%d unsupported rolloff (%d)\n",
1386 KBUILD_MODNAME, state->demod, c->rolloff);
1387 return -EOPNOTSUPP;
1388 }
1389 break;
1390
1391 default:
1392 dev_warn(&state->priv->i2c->dev,
1393 "%s: demod %d unsupported delivery system (%d)\n",
1394 KBUILD_MODNAME, state->demod, c->delivery_system);
1395 return -EINVAL;
1396 }
1397
1398 state->dnxt.delsys = c->delivery_system;
1399 state->dnxt.modulation = c->modulation;
1400 state->dnxt.frequency = c->frequency;
1401 state->dnxt.pilot = c->pilot;
1402 state->dnxt.rolloff = c->rolloff;
1403
1404 ret = cx24117_set_inversion(state, c->inversion);
1405 if (ret != 0)
1406 return ret;
1407
1408 ret = cx24117_set_fec(state,
1409 c->delivery_system, c->modulation, c->fec_inner);
1410 if (ret != 0)
1411 return ret;
1412
1413 ret = cx24117_set_symbolrate(state, c->symbol_rate);
1414 if (ret != 0)
1415 return ret;
1416
1417 /* discard the 'current' tuning parameters and prepare to tune */
1418 cx24117_clone_params(fe);
1419
1420 dev_dbg(&state->priv->i2c->dev,
1421 "%s: delsys = %d\n", __func__, state->dcur.delsys);
1422 dev_dbg(&state->priv->i2c->dev,
1423 "%s: modulation = %d\n", __func__, state->dcur.modulation);
1424 dev_dbg(&state->priv->i2c->dev,
1425 "%s: frequency = %d\n", __func__, state->dcur.frequency);
1426 dev_dbg(&state->priv->i2c->dev,
1427 "%s: pilot = %d (val = 0x%02x)\n", __func__,
1428 state->dcur.pilot, state->dcur.pilot_val);
1429 dev_dbg(&state->priv->i2c->dev,
1430 "%s: retune = %d\n", __func__, retune);
1431 dev_dbg(&state->priv->i2c->dev,
1432 "%s: rolloff = %d (val = 0x%02x)\n", __func__,
1433 state->dcur.rolloff, state->dcur.rolloff_val);
1434 dev_dbg(&state->priv->i2c->dev,
1435 "%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate);
1436 dev_dbg(&state->priv->i2c->dev,
1437 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
1438 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1439 dev_dbg(&state->priv->i2c->dev,
1440 "%s: Inversion = %d (val = 0x%02x)\n", __func__,
1441 state->dcur.inversion, state->dcur.inversion_val);
1442
1443 /* Prepare a tune request */
1444 cmd.args[0] = CMD_TUNEREQUEST;
1445
1446 /* demod */
1447 cmd.args[1] = state->demod;
1448
1449 /* Frequency */
1450 cmd.args[2] = (state->dcur.frequency & 0xff0000) >> 16;
1451 cmd.args[3] = (state->dcur.frequency & 0x00ff00) >> 8;
1452 cmd.args[4] = (state->dcur.frequency & 0x0000ff);
1453
1454 /* Symbol Rate */
1455 cmd.args[5] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
1456 cmd.args[6] = ((state->dcur.symbol_rate / 1000) & 0x00ff);
1457
1458 /* Automatic Inversion */
1459 cmd.args[7] = state->dcur.inversion_val;
1460
1461 /* Modulation / FEC / Pilot */
1462 cmd.args[8] = state->dcur.fec_val | state->dcur.pilot_val;
1463
1464 cmd.args[9] = CX24117_SEARCH_RANGE_KHZ >> 8;
1465 cmd.args[10] = CX24117_SEARCH_RANGE_KHZ & 0xff;
1466
1467 cmd.args[11] = state->dcur.rolloff_val;
1468 cmd.args[12] = state->dcur.fec_mask;
1469
1470 if (state->dcur.symbol_rate > 30000000) {
1471 reg_ratediv = 0x04;
1472 reg_clkdiv = 0x02;
1473 } else if (state->dcur.symbol_rate > 10000000) {
1474 reg_ratediv = 0x06;
1475 reg_clkdiv = 0x03;
1476 } else {
1477 reg_ratediv = 0x0a;
1478 reg_clkdiv = 0x05;
1479 }
1480
1481 cmd.args[13] = reg_ratediv;
1482 cmd.args[14] = reg_clkdiv;
1483
1484 cx24117_writereg(state, (state->demod == 0) ?
1485 CX24117_REG_CLKDIV0 : CX24117_REG_CLKDIV1, reg_clkdiv);
1486 cx24117_writereg(state, (state->demod == 0) ?
1487 CX24117_REG_RATEDIV0 : CX24117_REG_RATEDIV1, reg_ratediv);
1488
1489 cmd.args[15] = CX24117_PNE;
1490 cmd.len = 16;
1491
1492 do {
1493 /* Reset status register */
1494 status = cx24117_readreg(state, (state->demod == 0) ?
1495 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1) &
1496 CX24117_SIGNAL_MASK;
1497
1498 dev_dbg(&state->priv->i2c->dev,
1499 "%s() demod%d status_setfe = %02x\n",
1500 __func__, state->demod, status);
1501
1502 cx24117_writereg(state, (state->demod == 0) ?
1503 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1, status);
1504
1505 /* Tune */
1506 ret = cx24117_cmd_execute(fe, &cmd);
1507 if (ret != 0)
1508 break;
1509
1510 /*
1511 * Wait for up to 500 ms before retrying
1512 *
1513 * If we are able to tune then generally it occurs within 100ms.
1514 * If it takes longer, try a different rolloff setting.
1515 */
1516 for (i = 0; i < 50; i++) {
1517 cx24117_read_status(fe, &tunerstat);
1518 status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC);
1519 if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) {
1520 dev_dbg(&state->priv->i2c->dev,
1521 "%s() demod%d tuned\n",
1522 __func__, state->demod);
1523 return 0;
1524 }
1525 msleep(20);
1526 }
1527
1528 dev_dbg(&state->priv->i2c->dev, "%s() demod%d not tuned\n",
1529 __func__, state->demod);
1530
1531 /* try next rolloff value */
1532 if (state->dcur.rolloff == 3)
1533 cmd.args[11]--;
1534
1535 } while (--retune);
1536 return -EINVAL;
1537 }
1538
cx24117_tune(struct dvb_frontend * fe,bool re_tune,unsigned int mode_flags,unsigned int * delay,fe_status_t * status)1539 static int cx24117_tune(struct dvb_frontend *fe, bool re_tune,
1540 unsigned int mode_flags, unsigned int *delay, fe_status_t *status)
1541 {
1542 struct cx24117_state *state = fe->demodulator_priv;
1543
1544 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
1545 __func__, state->demod);
1546
1547 *delay = HZ / 5;
1548 if (re_tune) {
1549 int ret = cx24117_set_frontend(fe);
1550 if (ret)
1551 return ret;
1552 }
1553 return cx24117_read_status(fe, status);
1554 }
1555
cx24117_get_algo(struct dvb_frontend * fe)1556 static int cx24117_get_algo(struct dvb_frontend *fe)
1557 {
1558 return DVBFE_ALGO_HW;
1559 }
1560
cx24117_get_frontend(struct dvb_frontend * fe)1561 static int cx24117_get_frontend(struct dvb_frontend *fe)
1562 {
1563 struct cx24117_state *state = fe->demodulator_priv;
1564 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1565 struct cx24117_cmd cmd;
1566 u8 reg, st, inv;
1567 int ret, idx;
1568 unsigned int freq;
1569 short srate_os, freq_os;
1570
1571 u8 buf[0x1f-4];
1572
1573 /* Read current tune parameters */
1574 cmd.args[0] = CMD_GETCTLACC;
1575 cmd.args[1] = (u8) state->demod;
1576 cmd.len = 2;
1577 ret = cx24117_cmd_execute(fe, &cmd);
1578 if (ret != 0)
1579 return ret;
1580
1581 /* read all required regs at once */
1582 reg = (state->demod == 0) ? CX24117_REG_FREQ3_0 : CX24117_REG_FREQ3_1;
1583 ret = cx24117_readregN(state, reg, buf, 0x1f-4);
1584 if (ret != 0)
1585 return ret;
1586
1587 st = buf[5];
1588
1589 /* get spectral inversion */
1590 inv = (((state->demod == 0) ? ~st : st) >> 6) & 1;
1591 if (inv == 0)
1592 c->inversion = INVERSION_OFF;
1593 else
1594 c->inversion = INVERSION_ON;
1595
1596 /* modulation and fec */
1597 idx = st & 0x3f;
1598 if (c->delivery_system == SYS_DVBS2) {
1599 if (idx > 11)
1600 idx += 9;
1601 else
1602 idx += 7;
1603 }
1604
1605 c->modulation = cx24117_modfec_modes[idx].modulation;
1606 c->fec_inner = cx24117_modfec_modes[idx].fec;
1607
1608 /* frequency */
1609 freq = (buf[0] << 16) | (buf[1] << 8) | buf[2];
1610 freq_os = (buf[8] << 8) | buf[9];
1611 c->frequency = freq + freq_os;
1612
1613 /* symbol rate */
1614 srate_os = (buf[10] << 8) | buf[11];
1615 c->symbol_rate = -1000 * srate_os + state->dcur.symbol_rate;
1616 return 0;
1617 }
1618
1619 static struct dvb_frontend_ops cx24117_ops = {
1620 .delsys = { SYS_DVBS, SYS_DVBS2 },
1621 .info = {
1622 .name = "Conexant CX24117/CX24132",
1623 .frequency_min = 950000,
1624 .frequency_max = 2150000,
1625 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1626 .frequency_tolerance = 5000,
1627 .symbol_rate_min = 1000000,
1628 .symbol_rate_max = 45000000,
1629 .caps = FE_CAN_INVERSION_AUTO |
1630 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1631 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1632 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1633 FE_CAN_2G_MODULATION |
1634 FE_CAN_QPSK | FE_CAN_RECOVER
1635 },
1636
1637 .release = cx24117_release,
1638
1639 .init = cx24117_initfe,
1640 .sleep = cx24117_sleep,
1641 .read_status = cx24117_read_status,
1642 .read_ber = cx24117_read_ber,
1643 .read_signal_strength = cx24117_read_signal_strength,
1644 .read_snr = cx24117_read_snr,
1645 .read_ucblocks = cx24117_read_ucblocks,
1646 .set_tone = cx24117_set_tone,
1647 .set_voltage = cx24117_set_voltage,
1648 .diseqc_send_master_cmd = cx24117_send_diseqc_msg,
1649 .diseqc_send_burst = cx24117_diseqc_send_burst,
1650 .get_frontend_algo = cx24117_get_algo,
1651 .tune = cx24117_tune,
1652
1653 .set_frontend = cx24117_set_frontend,
1654 .get_frontend = cx24117_get_frontend,
1655 };
1656
1657
1658 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24117/cx24132 hardware");
1659 MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)");
1660 MODULE_LICENSE("GPL");
1661 MODULE_VERSION("1.1");
1662 MODULE_FIRMWARE(CX24117_DEFAULT_FIRMWARE);
1663
1664