1 /*
2 * Driver for SiliconFile NOON010PC30 CIF (1/11") Image Sensor with ISP
3 *
4 * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.
5 * Contact: Sylwester Nawrocki, <s.nawrocki@samsung.com>
6 *
7 * Initial register configuration based on a driver authored by
8 * HeungJun Kim <riverful.kim@samsung.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 #include <linux/delay.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/slab.h>
20 #include <linux/regulator/consumer.h>
21 #include <media/noon010pc30.h>
22 #include <linux/videodev2.h>
23 #include <linux/module.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-mediabus.h>
27 #include <media/v4l2-subdev.h>
28
29 static int debug;
30 module_param(debug, int, 0644);
31 MODULE_PARM_DESC(debug, "Enable module debug trace. Set to 1 to enable.");
32
33 #define MODULE_NAME "NOON010PC30"
34
35 /*
36 * Register offsets within a page
37 * b15..b8 - page id, b7..b0 - register address
38 */
39 #define POWER_CTRL_REG 0x0001
40 #define PAGEMODE_REG 0x03
41 #define DEVICE_ID_REG 0x0004
42 #define NOON010PC30_ID 0x86
43 #define VDO_CTL_REG(n) (0x0010 + (n))
44 #define SYNC_CTL_REG 0x0012
45 /* Window size and position */
46 #define WIN_ROWH_REG 0x0013
47 #define WIN_ROWL_REG 0x0014
48 #define WIN_COLH_REG 0x0015
49 #define WIN_COLL_REG 0x0016
50 #define WIN_HEIGHTH_REG 0x0017
51 #define WIN_HEIGHTL_REG 0x0018
52 #define WIN_WIDTHH_REG 0x0019
53 #define WIN_WIDTHL_REG 0x001A
54 #define HBLANKH_REG 0x001B
55 #define HBLANKL_REG 0x001C
56 #define VSYNCH_REG 0x001D
57 #define VSYNCL_REG 0x001E
58 /* VSYNC control */
59 #define VS_CTL_REG(n) (0x00A1 + (n))
60 /* page 1 */
61 #define ISP_CTL_REG(n) (0x0110 + (n))
62 #define YOFS_REG 0x0119
63 #define DARK_YOFS_REG 0x011A
64 #define SAT_CTL_REG 0x0120
65 #define BSAT_REG 0x0121
66 #define RSAT_REG 0x0122
67 /* Color correction */
68 #define CMC_CTL_REG 0x0130
69 #define CMC_OFSGH_REG 0x0133
70 #define CMC_OFSGL_REG 0x0135
71 #define CMC_SIGN_REG 0x0136
72 #define CMC_GOFS_REG 0x0137
73 #define CMC_COEF_REG(n) (0x0138 + (n))
74 #define CMC_OFS_REG(n) (0x0141 + (n))
75 /* Gamma correction */
76 #define GMA_CTL_REG 0x0160
77 #define GMA_COEF_REG(n) (0x0161 + (n))
78 /* Lens Shading */
79 #define LENS_CTRL_REG 0x01D0
80 #define LENS_XCEN_REG 0x01D1
81 #define LENS_YCEN_REG 0x01D2
82 #define LENS_RC_REG 0x01D3
83 #define LENS_GC_REG 0x01D4
84 #define LENS_BC_REG 0x01D5
85 #define L_AGON_REG 0x01D6
86 #define L_AGOFF_REG 0x01D7
87 /* Page 3 - Auto Exposure */
88 #define AE_CTL_REG(n) (0x0310 + (n))
89 #define AE_CTL9_REG 0x032C
90 #define AE_CTL10_REG 0x032D
91 #define AE_YLVL_REG 0x031C
92 #define AE_YTH_REG(n) (0x031D + (n))
93 #define AE_WGT_REG 0x0326
94 #define EXP_TIMEH_REG 0x0333
95 #define EXP_TIMEM_REG 0x0334
96 #define EXP_TIMEL_REG 0x0335
97 #define EXP_MMINH_REG 0x0336
98 #define EXP_MMINL_REG 0x0337
99 #define EXP_MMAXH_REG 0x0338
100 #define EXP_MMAXM_REG 0x0339
101 #define EXP_MMAXL_REG 0x033A
102 /* Page 4 - Auto White Balance */
103 #define AWB_CTL_REG(n) (0x0410 + (n))
104 #define AWB_ENABE 0x80
105 #define AWB_WGHT_REG 0x0419
106 #define BGAIN_PAR_REG(n) (0x044F + (n))
107 /* Manual white balance, when AWB_CTL2[0]=1 */
108 #define MWB_RGAIN_REG 0x0466
109 #define MWB_BGAIN_REG 0x0467
110
111 /* The token to mark an array end */
112 #define REG_TERM 0xFFFF
113
114 struct noon010_format {
115 enum v4l2_mbus_pixelcode code;
116 enum v4l2_colorspace colorspace;
117 u16 ispctl1_reg;
118 };
119
120 struct noon010_frmsize {
121 u16 width;
122 u16 height;
123 int vid_ctl1;
124 };
125
126 static const char * const noon010_supply_name[] = {
127 "vdd_core", "vddio", "vdda"
128 };
129
130 #define NOON010_NUM_SUPPLIES ARRAY_SIZE(noon010_supply_name)
131
132 struct noon010_info {
133 struct v4l2_subdev sd;
134 struct media_pad pad;
135 struct v4l2_ctrl_handler hdl;
136 struct regulator_bulk_data supply[NOON010_NUM_SUPPLIES];
137 u32 gpio_nreset;
138 u32 gpio_nstby;
139
140 /* Protects the struct members below */
141 struct mutex lock;
142
143 const struct noon010_format *curr_fmt;
144 const struct noon010_frmsize *curr_win;
145 unsigned int apply_new_cfg:1;
146 unsigned int streaming:1;
147 unsigned int hflip:1;
148 unsigned int vflip:1;
149 unsigned int power:1;
150 u8 i2c_reg_page;
151 };
152
153 struct i2c_regval {
154 u16 addr;
155 u16 val;
156 };
157
158 /* Supported resolutions. */
159 static const struct noon010_frmsize noon010_sizes[] = {
160 {
161 .width = 352,
162 .height = 288,
163 .vid_ctl1 = 0,
164 }, {
165 .width = 176,
166 .height = 144,
167 .vid_ctl1 = 0x10,
168 }, {
169 .width = 88,
170 .height = 72,
171 .vid_ctl1 = 0x20,
172 },
173 };
174
175 /* Supported pixel formats. */
176 static const struct noon010_format noon010_formats[] = {
177 {
178 .code = V4L2_MBUS_FMT_YUYV8_2X8,
179 .colorspace = V4L2_COLORSPACE_JPEG,
180 .ispctl1_reg = 0x03,
181 }, {
182 .code = V4L2_MBUS_FMT_YVYU8_2X8,
183 .colorspace = V4L2_COLORSPACE_JPEG,
184 .ispctl1_reg = 0x02,
185 }, {
186 .code = V4L2_MBUS_FMT_VYUY8_2X8,
187 .colorspace = V4L2_COLORSPACE_JPEG,
188 .ispctl1_reg = 0,
189 }, {
190 .code = V4L2_MBUS_FMT_UYVY8_2X8,
191 .colorspace = V4L2_COLORSPACE_JPEG,
192 .ispctl1_reg = 0x01,
193 }, {
194 .code = V4L2_MBUS_FMT_RGB565_2X8_BE,
195 .colorspace = V4L2_COLORSPACE_JPEG,
196 .ispctl1_reg = 0x40,
197 },
198 };
199
200 static const struct i2c_regval noon010_base_regs[] = {
201 { WIN_COLL_REG, 0x06 }, { HBLANKL_REG, 0x7C },
202 /* Color corection and saturation */
203 { ISP_CTL_REG(0), 0x30 }, { ISP_CTL_REG(2), 0x30 },
204 { YOFS_REG, 0x80 }, { DARK_YOFS_REG, 0x04 },
205 { SAT_CTL_REG, 0x1F }, { BSAT_REG, 0x90 },
206 { CMC_CTL_REG, 0x0F }, { CMC_OFSGH_REG, 0x3C },
207 { CMC_OFSGL_REG, 0x2C }, { CMC_SIGN_REG, 0x3F },
208 { CMC_COEF_REG(0), 0x79 }, { CMC_OFS_REG(0), 0x00 },
209 { CMC_COEF_REG(1), 0x39 }, { CMC_OFS_REG(1), 0x00 },
210 { CMC_COEF_REG(2), 0x00 }, { CMC_OFS_REG(2), 0x00 },
211 { CMC_COEF_REG(3), 0x11 }, { CMC_OFS_REG(3), 0x8B },
212 { CMC_COEF_REG(4), 0x65 }, { CMC_OFS_REG(4), 0x07 },
213 { CMC_COEF_REG(5), 0x14 }, { CMC_OFS_REG(5), 0x04 },
214 { CMC_COEF_REG(6), 0x01 }, { CMC_OFS_REG(6), 0x9C },
215 { CMC_COEF_REG(7), 0x33 }, { CMC_OFS_REG(7), 0x89 },
216 { CMC_COEF_REG(8), 0x74 }, { CMC_OFS_REG(8), 0x25 },
217 /* Automatic white balance */
218 { AWB_CTL_REG(0), 0x78 }, { AWB_CTL_REG(1), 0x2E },
219 { AWB_CTL_REG(2), 0x20 }, { AWB_CTL_REG(3), 0x85 },
220 /* Auto exposure */
221 { AE_CTL_REG(0), 0xDC }, { AE_CTL_REG(1), 0x81 },
222 { AE_CTL_REG(2), 0x30 }, { AE_CTL_REG(3), 0xA5 },
223 { AE_CTL_REG(4), 0x40 }, { AE_CTL_REG(5), 0x51 },
224 { AE_CTL_REG(6), 0x33 }, { AE_CTL_REG(7), 0x7E },
225 { AE_CTL9_REG, 0x00 }, { AE_CTL10_REG, 0x02 },
226 { AE_YLVL_REG, 0x44 }, { AE_YTH_REG(0), 0x34 },
227 { AE_YTH_REG(1), 0x30 }, { AE_WGT_REG, 0xD5 },
228 /* Lens shading compensation */
229 { LENS_CTRL_REG, 0x01 }, { LENS_XCEN_REG, 0x80 },
230 { LENS_YCEN_REG, 0x70 }, { LENS_RC_REG, 0x53 },
231 { LENS_GC_REG, 0x40 }, { LENS_BC_REG, 0x3E },
232 { REG_TERM, 0 },
233 };
234
to_noon010(struct v4l2_subdev * sd)235 static inline struct noon010_info *to_noon010(struct v4l2_subdev *sd)
236 {
237 return container_of(sd, struct noon010_info, sd);
238 }
239
to_sd(struct v4l2_ctrl * ctrl)240 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
241 {
242 return &container_of(ctrl->handler, struct noon010_info, hdl)->sd;
243 }
244
set_i2c_page(struct noon010_info * info,struct i2c_client * client,unsigned int reg)245 static inline int set_i2c_page(struct noon010_info *info,
246 struct i2c_client *client, unsigned int reg)
247 {
248 u32 page = reg >> 8 & 0xFF;
249 int ret = 0;
250
251 if (info->i2c_reg_page != page && (reg & 0xFF) != 0x03) {
252 ret = i2c_smbus_write_byte_data(client, PAGEMODE_REG, page);
253 if (!ret)
254 info->i2c_reg_page = page;
255 }
256 return ret;
257 }
258
cam_i2c_read(struct v4l2_subdev * sd,u32 reg_addr)259 static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr)
260 {
261 struct i2c_client *client = v4l2_get_subdevdata(sd);
262 struct noon010_info *info = to_noon010(sd);
263 int ret = set_i2c_page(info, client, reg_addr);
264
265 if (ret)
266 return ret;
267 return i2c_smbus_read_byte_data(client, reg_addr & 0xFF);
268 }
269
cam_i2c_write(struct v4l2_subdev * sd,u32 reg_addr,u32 val)270 static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val)
271 {
272 struct i2c_client *client = v4l2_get_subdevdata(sd);
273 struct noon010_info *info = to_noon010(sd);
274 int ret = set_i2c_page(info, client, reg_addr);
275
276 if (ret)
277 return ret;
278 return i2c_smbus_write_byte_data(client, reg_addr & 0xFF, val);
279 }
280
noon010_bulk_write_reg(struct v4l2_subdev * sd,const struct i2c_regval * msg)281 static inline int noon010_bulk_write_reg(struct v4l2_subdev *sd,
282 const struct i2c_regval *msg)
283 {
284 while (msg->addr != REG_TERM) {
285 int ret = cam_i2c_write(sd, msg->addr, msg->val);
286
287 if (ret)
288 return ret;
289 msg++;
290 }
291 return 0;
292 }
293
294 /* Device reset and sleep mode control */
noon010_power_ctrl(struct v4l2_subdev * sd,bool reset,bool sleep)295 static int noon010_power_ctrl(struct v4l2_subdev *sd, bool reset, bool sleep)
296 {
297 struct noon010_info *info = to_noon010(sd);
298 u8 reg = sleep ? 0xF1 : 0xF0;
299 int ret = 0;
300
301 if (reset) {
302 ret = cam_i2c_write(sd, POWER_CTRL_REG, reg | 0x02);
303 udelay(20);
304 }
305 if (!ret) {
306 ret = cam_i2c_write(sd, POWER_CTRL_REG, reg);
307 if (reset && !ret)
308 info->i2c_reg_page = -1;
309 }
310 return ret;
311 }
312
313 /* Automatic white balance control */
noon010_enable_autowhitebalance(struct v4l2_subdev * sd,int on)314 static int noon010_enable_autowhitebalance(struct v4l2_subdev *sd, int on)
315 {
316 int ret;
317
318 ret = cam_i2c_write(sd, AWB_CTL_REG(1), on ? 0x2E : 0x2F);
319 if (!ret)
320 ret = cam_i2c_write(sd, AWB_CTL_REG(0), on ? 0xFB : 0x7B);
321 return ret;
322 }
323
324 /* Called with struct noon010_info.lock mutex held */
noon010_set_flip(struct v4l2_subdev * sd,int hflip,int vflip)325 static int noon010_set_flip(struct v4l2_subdev *sd, int hflip, int vflip)
326 {
327 struct noon010_info *info = to_noon010(sd);
328 int reg, ret;
329
330 reg = cam_i2c_read(sd, VDO_CTL_REG(1));
331 if (reg < 0)
332 return reg;
333
334 reg &= 0x7C;
335 if (hflip)
336 reg |= 0x01;
337 if (vflip)
338 reg |= 0x02;
339
340 ret = cam_i2c_write(sd, VDO_CTL_REG(1), reg | 0x80);
341 if (!ret) {
342 info->hflip = hflip;
343 info->vflip = vflip;
344 }
345 return ret;
346 }
347
348 /* Configure resolution and color format */
noon010_set_params(struct v4l2_subdev * sd)349 static int noon010_set_params(struct v4l2_subdev *sd)
350 {
351 struct noon010_info *info = to_noon010(sd);
352
353 int ret = cam_i2c_write(sd, VDO_CTL_REG(0),
354 info->curr_win->vid_ctl1);
355 if (ret)
356 return ret;
357 return cam_i2c_write(sd, ISP_CTL_REG(0),
358 info->curr_fmt->ispctl1_reg);
359 }
360
361 /* Find nearest matching image pixel size. */
noon010_try_frame_size(struct v4l2_mbus_framefmt * mf,const struct noon010_frmsize ** size)362 static int noon010_try_frame_size(struct v4l2_mbus_framefmt *mf,
363 const struct noon010_frmsize **size)
364 {
365 unsigned int min_err = ~0;
366 int i = ARRAY_SIZE(noon010_sizes);
367 const struct noon010_frmsize *fsize = &noon010_sizes[0],
368 *match = NULL;
369
370 while (i--) {
371 int err = abs(fsize->width - mf->width)
372 + abs(fsize->height - mf->height);
373
374 if (err < min_err) {
375 min_err = err;
376 match = fsize;
377 }
378 fsize++;
379 }
380 if (match) {
381 mf->width = match->width;
382 mf->height = match->height;
383 if (size)
384 *size = match;
385 return 0;
386 }
387 return -EINVAL;
388 }
389
390 /* Called with info.lock mutex held */
power_enable(struct noon010_info * info)391 static int power_enable(struct noon010_info *info)
392 {
393 int ret;
394
395 if (info->power) {
396 v4l2_info(&info->sd, "%s: sensor is already on\n", __func__);
397 return 0;
398 }
399
400 if (gpio_is_valid(info->gpio_nstby))
401 gpio_set_value(info->gpio_nstby, 0);
402
403 if (gpio_is_valid(info->gpio_nreset))
404 gpio_set_value(info->gpio_nreset, 0);
405
406 ret = regulator_bulk_enable(NOON010_NUM_SUPPLIES, info->supply);
407 if (ret)
408 return ret;
409
410 if (gpio_is_valid(info->gpio_nreset)) {
411 msleep(50);
412 gpio_set_value(info->gpio_nreset, 1);
413 }
414 if (gpio_is_valid(info->gpio_nstby)) {
415 udelay(1000);
416 gpio_set_value(info->gpio_nstby, 1);
417 }
418 if (gpio_is_valid(info->gpio_nreset)) {
419 udelay(1000);
420 gpio_set_value(info->gpio_nreset, 0);
421 msleep(100);
422 gpio_set_value(info->gpio_nreset, 1);
423 msleep(20);
424 }
425 info->power = 1;
426
427 v4l2_dbg(1, debug, &info->sd, "%s: sensor is on\n", __func__);
428 return 0;
429 }
430
431 /* Called with info.lock mutex held */
power_disable(struct noon010_info * info)432 static int power_disable(struct noon010_info *info)
433 {
434 int ret;
435
436 if (!info->power) {
437 v4l2_info(&info->sd, "%s: sensor is already off\n", __func__);
438 return 0;
439 }
440
441 ret = regulator_bulk_disable(NOON010_NUM_SUPPLIES, info->supply);
442 if (ret)
443 return ret;
444
445 if (gpio_is_valid(info->gpio_nstby))
446 gpio_set_value(info->gpio_nstby, 0);
447
448 if (gpio_is_valid(info->gpio_nreset))
449 gpio_set_value(info->gpio_nreset, 0);
450
451 info->power = 0;
452
453 v4l2_dbg(1, debug, &info->sd, "%s: sensor is off\n", __func__);
454
455 return 0;
456 }
457
noon010_s_ctrl(struct v4l2_ctrl * ctrl)458 static int noon010_s_ctrl(struct v4l2_ctrl *ctrl)
459 {
460 struct v4l2_subdev *sd = to_sd(ctrl);
461 struct noon010_info *info = to_noon010(sd);
462 int ret = 0;
463
464 v4l2_dbg(1, debug, sd, "%s: ctrl_id: %d, value: %d\n",
465 __func__, ctrl->id, ctrl->val);
466
467 mutex_lock(&info->lock);
468 /*
469 * If the device is not powered up by the host driver do
470 * not apply any controls to H/W at this time. Instead
471 * the controls will be restored right after power-up.
472 */
473 if (!info->power)
474 goto unlock;
475
476 switch (ctrl->id) {
477 case V4L2_CID_AUTO_WHITE_BALANCE:
478 ret = noon010_enable_autowhitebalance(sd, ctrl->val);
479 break;
480 case V4L2_CID_BLUE_BALANCE:
481 ret = cam_i2c_write(sd, MWB_BGAIN_REG, ctrl->val);
482 break;
483 case V4L2_CID_RED_BALANCE:
484 ret = cam_i2c_write(sd, MWB_RGAIN_REG, ctrl->val);
485 break;
486 default:
487 ret = -EINVAL;
488 }
489 unlock:
490 mutex_unlock(&info->lock);
491 return ret;
492 }
493
noon010_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_mbus_code_enum * code)494 static int noon010_enum_mbus_code(struct v4l2_subdev *sd,
495 struct v4l2_subdev_fh *fh,
496 struct v4l2_subdev_mbus_code_enum *code)
497 {
498 if (code->index >= ARRAY_SIZE(noon010_formats))
499 return -EINVAL;
500
501 code->code = noon010_formats[code->index].code;
502 return 0;
503 }
504
noon010_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_format * fmt)505 static int noon010_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
506 struct v4l2_subdev_format *fmt)
507 {
508 struct noon010_info *info = to_noon010(sd);
509 struct v4l2_mbus_framefmt *mf;
510
511 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
512 if (fh) {
513 mf = v4l2_subdev_get_try_format(fh, 0);
514 fmt->format = *mf;
515 }
516 return 0;
517 }
518 mf = &fmt->format;
519
520 mutex_lock(&info->lock);
521 mf->width = info->curr_win->width;
522 mf->height = info->curr_win->height;
523 mf->code = info->curr_fmt->code;
524 mf->colorspace = info->curr_fmt->colorspace;
525 mf->field = V4L2_FIELD_NONE;
526
527 mutex_unlock(&info->lock);
528 return 0;
529 }
530
531 /* Return nearest media bus frame format. */
noon010_try_fmt(struct v4l2_subdev * sd,struct v4l2_mbus_framefmt * mf)532 static const struct noon010_format *noon010_try_fmt(struct v4l2_subdev *sd,
533 struct v4l2_mbus_framefmt *mf)
534 {
535 int i = ARRAY_SIZE(noon010_formats);
536
537 while (--i)
538 if (mf->code == noon010_formats[i].code)
539 break;
540 mf->code = noon010_formats[i].code;
541
542 return &noon010_formats[i];
543 }
544
noon010_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_format * fmt)545 static int noon010_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
546 struct v4l2_subdev_format *fmt)
547 {
548 struct noon010_info *info = to_noon010(sd);
549 const struct noon010_frmsize *size = NULL;
550 const struct noon010_format *nf;
551 struct v4l2_mbus_framefmt *mf;
552 int ret = 0;
553
554 nf = noon010_try_fmt(sd, &fmt->format);
555 noon010_try_frame_size(&fmt->format, &size);
556 fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
557 fmt->format.field = V4L2_FIELD_NONE;
558
559 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
560 if (fh) {
561 mf = v4l2_subdev_get_try_format(fh, 0);
562 *mf = fmt->format;
563 }
564 return 0;
565 }
566 mutex_lock(&info->lock);
567 if (!info->streaming) {
568 info->apply_new_cfg = 1;
569 info->curr_fmt = nf;
570 info->curr_win = size;
571 } else {
572 ret = -EBUSY;
573 }
574 mutex_unlock(&info->lock);
575 return ret;
576 }
577
578 /* Called with struct noon010_info.lock mutex held */
noon010_base_config(struct v4l2_subdev * sd)579 static int noon010_base_config(struct v4l2_subdev *sd)
580 {
581 int ret = noon010_bulk_write_reg(sd, noon010_base_regs);
582 if (!ret)
583 ret = noon010_set_params(sd);
584 if (!ret)
585 ret = noon010_set_flip(sd, 1, 0);
586
587 return ret;
588 }
589
noon010_s_power(struct v4l2_subdev * sd,int on)590 static int noon010_s_power(struct v4l2_subdev *sd, int on)
591 {
592 struct noon010_info *info = to_noon010(sd);
593 int ret;
594
595 mutex_lock(&info->lock);
596 if (on) {
597 ret = power_enable(info);
598 if (!ret)
599 ret = noon010_base_config(sd);
600 } else {
601 noon010_power_ctrl(sd, false, true);
602 ret = power_disable(info);
603 }
604 mutex_unlock(&info->lock);
605
606 /* Restore the controls state */
607 if (!ret && on)
608 ret = v4l2_ctrl_handler_setup(&info->hdl);
609
610 return ret;
611 }
612
noon010_s_stream(struct v4l2_subdev * sd,int on)613 static int noon010_s_stream(struct v4l2_subdev *sd, int on)
614 {
615 struct noon010_info *info = to_noon010(sd);
616 int ret = 0;
617
618 mutex_lock(&info->lock);
619 if (!info->streaming != !on) {
620 ret = noon010_power_ctrl(sd, false, !on);
621 if (!ret)
622 info->streaming = on;
623 }
624 if (!ret && on && info->apply_new_cfg) {
625 ret = noon010_set_params(sd);
626 if (!ret)
627 info->apply_new_cfg = 0;
628 }
629 mutex_unlock(&info->lock);
630 return ret;
631 }
632
noon010_log_status(struct v4l2_subdev * sd)633 static int noon010_log_status(struct v4l2_subdev *sd)
634 {
635 struct noon010_info *info = to_noon010(sd);
636
637 v4l2_ctrl_handler_log_status(&info->hdl, sd->name);
638 return 0;
639 }
640
noon010_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)641 static int noon010_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
642 {
643 struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(fh, 0);
644
645 mf->width = noon010_sizes[0].width;
646 mf->height = noon010_sizes[0].height;
647 mf->code = noon010_formats[0].code;
648 mf->colorspace = V4L2_COLORSPACE_JPEG;
649 mf->field = V4L2_FIELD_NONE;
650 return 0;
651 }
652
653 static const struct v4l2_subdev_internal_ops noon010_subdev_internal_ops = {
654 .open = noon010_open,
655 };
656
657 static const struct v4l2_ctrl_ops noon010_ctrl_ops = {
658 .s_ctrl = noon010_s_ctrl,
659 };
660
661 static const struct v4l2_subdev_core_ops noon010_core_ops = {
662 .s_power = noon010_s_power,
663 .log_status = noon010_log_status,
664 };
665
666 static struct v4l2_subdev_pad_ops noon010_pad_ops = {
667 .enum_mbus_code = noon010_enum_mbus_code,
668 .get_fmt = noon010_get_fmt,
669 .set_fmt = noon010_set_fmt,
670 };
671
672 static struct v4l2_subdev_video_ops noon010_video_ops = {
673 .s_stream = noon010_s_stream,
674 };
675
676 static const struct v4l2_subdev_ops noon010_ops = {
677 .core = &noon010_core_ops,
678 .pad = &noon010_pad_ops,
679 .video = &noon010_video_ops,
680 };
681
682 /* Return 0 if NOON010PC30L sensor type was detected or -ENODEV otherwise. */
noon010_detect(struct i2c_client * client,struct noon010_info * info)683 static int noon010_detect(struct i2c_client *client, struct noon010_info *info)
684 {
685 int ret;
686
687 ret = power_enable(info);
688 if (ret)
689 return ret;
690
691 ret = i2c_smbus_read_byte_data(client, DEVICE_ID_REG);
692 if (ret < 0)
693 dev_err(&client->dev, "I2C read failed: 0x%X\n", ret);
694
695 power_disable(info);
696
697 return ret == NOON010PC30_ID ? 0 : -ENODEV;
698 }
699
noon010_probe(struct i2c_client * client,const struct i2c_device_id * id)700 static int noon010_probe(struct i2c_client *client,
701 const struct i2c_device_id *id)
702 {
703 struct noon010_info *info;
704 struct v4l2_subdev *sd;
705 const struct noon010pc30_platform_data *pdata
706 = client->dev.platform_data;
707 int ret;
708 int i;
709
710 if (!pdata) {
711 dev_err(&client->dev, "No platform data!\n");
712 return -EIO;
713 }
714
715 info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
716 if (!info)
717 return -ENOMEM;
718
719 mutex_init(&info->lock);
720 sd = &info->sd;
721 v4l2_i2c_subdev_init(sd, client, &noon010_ops);
722 strlcpy(sd->name, MODULE_NAME, sizeof(sd->name));
723
724 sd->internal_ops = &noon010_subdev_internal_ops;
725 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
726
727 v4l2_ctrl_handler_init(&info->hdl, 3);
728
729 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
730 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
731 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
732 V4L2_CID_RED_BALANCE, 0, 127, 1, 64);
733 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
734 V4L2_CID_BLUE_BALANCE, 0, 127, 1, 64);
735
736 sd->ctrl_handler = &info->hdl;
737
738 ret = info->hdl.error;
739 if (ret)
740 goto np_err;
741
742 info->i2c_reg_page = -1;
743 info->gpio_nreset = -EINVAL;
744 info->gpio_nstby = -EINVAL;
745 info->curr_fmt = &noon010_formats[0];
746 info->curr_win = &noon010_sizes[0];
747
748 if (gpio_is_valid(pdata->gpio_nreset)) {
749 ret = devm_gpio_request_one(&client->dev, pdata->gpio_nreset,
750 GPIOF_OUT_INIT_LOW,
751 "NOON010PC30 NRST");
752 if (ret) {
753 dev_err(&client->dev, "GPIO request error: %d\n", ret);
754 goto np_err;
755 }
756 info->gpio_nreset = pdata->gpio_nreset;
757 gpio_export(info->gpio_nreset, 0);
758 }
759
760 if (gpio_is_valid(pdata->gpio_nstby)) {
761 ret = devm_gpio_request_one(&client->dev, pdata->gpio_nstby,
762 GPIOF_OUT_INIT_LOW,
763 "NOON010PC30 NSTBY");
764 if (ret) {
765 dev_err(&client->dev, "GPIO request error: %d\n", ret);
766 goto np_err;
767 }
768 info->gpio_nstby = pdata->gpio_nstby;
769 gpio_export(info->gpio_nstby, 0);
770 }
771
772 for (i = 0; i < NOON010_NUM_SUPPLIES; i++)
773 info->supply[i].supply = noon010_supply_name[i];
774
775 ret = devm_regulator_bulk_get(&client->dev, NOON010_NUM_SUPPLIES,
776 info->supply);
777 if (ret)
778 goto np_err;
779
780 info->pad.flags = MEDIA_PAD_FL_SOURCE;
781 sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
782 ret = media_entity_init(&sd->entity, 1, &info->pad, 0);
783 if (ret < 0)
784 goto np_err;
785
786 ret = noon010_detect(client, info);
787 if (!ret)
788 return 0;
789
790 np_err:
791 v4l2_ctrl_handler_free(&info->hdl);
792 v4l2_device_unregister_subdev(sd);
793 return ret;
794 }
795
noon010_remove(struct i2c_client * client)796 static int noon010_remove(struct i2c_client *client)
797 {
798 struct v4l2_subdev *sd = i2c_get_clientdata(client);
799 struct noon010_info *info = to_noon010(sd);
800
801 v4l2_device_unregister_subdev(sd);
802 v4l2_ctrl_handler_free(&info->hdl);
803 media_entity_cleanup(&sd->entity);
804
805 return 0;
806 }
807
808 static const struct i2c_device_id noon010_id[] = {
809 { MODULE_NAME, 0 },
810 { },
811 };
812 MODULE_DEVICE_TABLE(i2c, noon010_id);
813
814
815 static struct i2c_driver noon010_i2c_driver = {
816 .driver = {
817 .name = MODULE_NAME
818 },
819 .probe = noon010_probe,
820 .remove = noon010_remove,
821 .id_table = noon010_id,
822 };
823
824 module_i2c_driver(noon010_i2c_driver);
825
826 MODULE_DESCRIPTION("Siliconfile NOON010PC30 camera driver");
827 MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
828 MODULE_LICENSE("GPL");
829