1 /*
2 * saa7191.c - Philips SAA7191 video decoder driver
3 *
4 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
5 * Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/delay.h>
13 #include <linux/errno.h>
14 #include <linux/fs.h>
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/major.h>
18 #include <linux/module.h>
19 #include <linux/mm.h>
20 #include <linux/slab.h>
21
22 #include <linux/videodev2.h>
23 #include <linux/i2c.h>
24 #include <media/v4l2-device.h>
25
26 #include "saa7191.h"
27
28 #define SAA7191_MODULE_VERSION "0.0.5"
29
30 MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
31 MODULE_VERSION(SAA7191_MODULE_VERSION);
32 MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
33 MODULE_LICENSE("GPL");
34
35
36 // #define SAA7191_DEBUG
37
38 #ifdef SAA7191_DEBUG
39 #define dprintk(x...) printk("SAA7191: " x);
40 #else
41 #define dprintk(x...)
42 #endif
43
44 #define SAA7191_SYNC_COUNT 30
45 #define SAA7191_SYNC_DELAY 100 /* milliseconds */
46
47 struct saa7191 {
48 struct v4l2_subdev sd;
49
50 /* the register values are stored here as the actual
51 * I2C-registers are write-only */
52 u8 reg[25];
53
54 int input;
55 v4l2_std_id norm;
56 };
57
to_saa7191(struct v4l2_subdev * sd)58 static inline struct saa7191 *to_saa7191(struct v4l2_subdev *sd)
59 {
60 return container_of(sd, struct saa7191, sd);
61 }
62
63 static const u8 initseq[] = {
64 0, /* Subaddress */
65
66 0x50, /* (0x50) SAA7191_REG_IDEL */
67
68 /* 50 Hz signal timing */
69 0x30, /* (0x30) SAA7191_REG_HSYB */
70 0x00, /* (0x00) SAA7191_REG_HSYS */
71 0xe8, /* (0xe8) SAA7191_REG_HCLB */
72 0xb6, /* (0xb6) SAA7191_REG_HCLS */
73 0xf4, /* (0xf4) SAA7191_REG_HPHI */
74
75 /* control */
76 SAA7191_LUMA_APER_1, /* (0x01) SAA7191_REG_LUMA - CVBS mode */
77 0x00, /* (0x00) SAA7191_REG_HUEC */
78 0xf8, /* (0xf8) SAA7191_REG_CKTQ */
79 0xf8, /* (0xf8) SAA7191_REG_CKTS */
80 0x90, /* (0x90) SAA7191_REG_PLSE */
81 0x90, /* (0x90) SAA7191_REG_SESE */
82 0x00, /* (0x00) SAA7191_REG_GAIN */
83 SAA7191_STDC_NFEN | SAA7191_STDC_HRMV, /* (0x0c) SAA7191_REG_STDC
84 * - not SECAM,
85 * slow time constant */
86 SAA7191_IOCK_OEDC | SAA7191_IOCK_OEHS | SAA7191_IOCK_OEVS
87 | SAA7191_IOCK_OEDY, /* (0x78) SAA7191_REG_IOCK
88 * - chroma from CVBS, GPSW1 & 2 off */
89 SAA7191_CTL3_AUFD | SAA7191_CTL3_SCEN | SAA7191_CTL3_OFTS
90 | SAA7191_CTL3_YDEL0, /* (0x99) SAA7191_REG_CTL3
91 * - automatic field detection */
92 0x00, /* (0x00) SAA7191_REG_CTL4 */
93 0x2c, /* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
94 0x00, /* unused */
95 0x00, /* unused */
96
97 /* 60 Hz signal timing */
98 0x34, /* (0x34) SAA7191_REG_HS6B */
99 0x0a, /* (0x0a) SAA7191_REG_HS6S */
100 0xf4, /* (0xf4) SAA7191_REG_HC6B */
101 0xce, /* (0xce) SAA7191_REG_HC6S */
102 0xf4, /* (0xf4) SAA7191_REG_HP6I */
103 };
104
105 /* SAA7191 register handling */
106
saa7191_read_reg(struct v4l2_subdev * sd,u8 reg)107 static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
108 {
109 return to_saa7191(sd)->reg[reg];
110 }
111
saa7191_read_status(struct v4l2_subdev * sd,u8 * value)112 static int saa7191_read_status(struct v4l2_subdev *sd, u8 *value)
113 {
114 struct i2c_client *client = v4l2_get_subdevdata(sd);
115 int ret;
116
117 ret = i2c_master_recv(client, value, 1);
118 if (ret < 0) {
119 printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
120 return ret;
121 }
122
123 return 0;
124 }
125
126
saa7191_write_reg(struct v4l2_subdev * sd,u8 reg,u8 value)127 static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
128 {
129 struct i2c_client *client = v4l2_get_subdevdata(sd);
130
131 to_saa7191(sd)->reg[reg] = value;
132 return i2c_smbus_write_byte_data(client, reg, value);
133 }
134
135 /* the first byte of data must be the first subaddress number (register) */
saa7191_write_block(struct v4l2_subdev * sd,u8 length,const u8 * data)136 static int saa7191_write_block(struct v4l2_subdev *sd,
137 u8 length, const u8 *data)
138 {
139 struct i2c_client *client = v4l2_get_subdevdata(sd);
140 struct saa7191 *decoder = to_saa7191(sd);
141 int i;
142 int ret;
143
144 for (i = 0; i < (length - 1); i++) {
145 decoder->reg[data[0] + i] = data[i + 1];
146 }
147
148 ret = i2c_master_send(client, data, length);
149 if (ret < 0) {
150 printk(KERN_ERR "SAA7191: saa7191_write_block(): "
151 "write failed\n");
152 return ret;
153 }
154
155 return 0;
156 }
157
158 /* Helper functions */
159
saa7191_s_routing(struct v4l2_subdev * sd,u32 input,u32 output,u32 config)160 static int saa7191_s_routing(struct v4l2_subdev *sd,
161 u32 input, u32 output, u32 config)
162 {
163 struct saa7191 *decoder = to_saa7191(sd);
164 u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
165 u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
166 int err;
167
168 switch (input) {
169 case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
170 iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
171 | SAA7191_IOCK_GPSW2);
172 /* Chrominance trap active */
173 luma &= ~SAA7191_LUMA_BYPS;
174 break;
175 case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
176 iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
177 /* Chrominance trap bypassed */
178 luma |= SAA7191_LUMA_BYPS;
179 break;
180 default:
181 return -EINVAL;
182 }
183
184 err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
185 if (err)
186 return -EIO;
187 err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
188 if (err)
189 return -EIO;
190
191 decoder->input = input;
192
193 return 0;
194 }
195
saa7191_s_std(struct v4l2_subdev * sd,v4l2_std_id norm)196 static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
197 {
198 struct saa7191 *decoder = to_saa7191(sd);
199 u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
200 u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
201 u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
202 int err;
203
204 if (norm & V4L2_STD_PAL) {
205 stdc &= ~SAA7191_STDC_SECS;
206 ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
207 chcv = SAA7191_CHCV_PAL;
208 } else if (norm & V4L2_STD_NTSC) {
209 stdc &= ~SAA7191_STDC_SECS;
210 ctl3 &= ~SAA7191_CTL3_AUFD;
211 ctl3 |= SAA7191_CTL3_FSEL;
212 chcv = SAA7191_CHCV_NTSC;
213 } else if (norm & V4L2_STD_SECAM) {
214 stdc |= SAA7191_STDC_SECS;
215 ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
216 chcv = SAA7191_CHCV_PAL;
217 } else {
218 return -EINVAL;
219 }
220
221 err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
222 if (err)
223 return -EIO;
224 err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
225 if (err)
226 return -EIO;
227 err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
228 if (err)
229 return -EIO;
230
231 decoder->norm = norm;
232
233 dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
234 stdc, chcv);
235 dprintk("norm: %llx\n", norm);
236
237 return 0;
238 }
239
saa7191_wait_for_signal(struct v4l2_subdev * sd,u8 * status)240 static int saa7191_wait_for_signal(struct v4l2_subdev *sd, u8 *status)
241 {
242 int i = 0;
243
244 dprintk("Checking for signal...\n");
245
246 for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
247 if (saa7191_read_status(sd, status))
248 return -EIO;
249
250 if (((*status) & SAA7191_STATUS_HLCK) == 0) {
251 dprintk("Signal found\n");
252 return 0;
253 }
254
255 msleep(SAA7191_SYNC_DELAY);
256 }
257
258 dprintk("No signal\n");
259
260 return -EBUSY;
261 }
262
saa7191_querystd(struct v4l2_subdev * sd,v4l2_std_id * norm)263 static int saa7191_querystd(struct v4l2_subdev *sd, v4l2_std_id *norm)
264 {
265 struct saa7191 *decoder = to_saa7191(sd);
266 u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
267 u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
268 u8 status;
269 v4l2_std_id old_norm = decoder->norm;
270 int err = 0;
271
272 dprintk("SAA7191 extended signal auto-detection...\n");
273
274 *norm &= V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;
275 stdc &= ~SAA7191_STDC_SECS;
276 ctl3 &= ~(SAA7191_CTL3_FSEL);
277
278 err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
279 if (err) {
280 err = -EIO;
281 goto out;
282 }
283 err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
284 if (err) {
285 err = -EIO;
286 goto out;
287 }
288
289 ctl3 |= SAA7191_CTL3_AUFD;
290 err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
291 if (err) {
292 err = -EIO;
293 goto out;
294 }
295
296 msleep(SAA7191_SYNC_DELAY);
297
298 err = saa7191_wait_for_signal(sd, &status);
299 if (err)
300 goto out;
301
302 if (status & SAA7191_STATUS_FIDT) {
303 /* 60Hz signal -> NTSC */
304 dprintk("60Hz signal: NTSC\n");
305 *norm &= V4L2_STD_NTSC;
306 return 0;
307 }
308
309 /* 50Hz signal */
310 dprintk("50Hz signal: Trying PAL...\n");
311
312 /* try PAL first */
313 err = saa7191_s_std(sd, V4L2_STD_PAL);
314 if (err)
315 goto out;
316
317 msleep(SAA7191_SYNC_DELAY);
318
319 err = saa7191_wait_for_signal(sd, &status);
320 if (err)
321 goto out;
322
323 /* not 50Hz ? */
324 if (status & SAA7191_STATUS_FIDT) {
325 dprintk("No 50Hz signal\n");
326 saa7191_s_std(sd, old_norm);
327 *norm = V4L2_STD_UNKNOWN;
328 return 0;
329 }
330
331 if (status & SAA7191_STATUS_CODE) {
332 dprintk("PAL\n");
333 *norm &= V4L2_STD_PAL;
334 return saa7191_s_std(sd, old_norm);
335 }
336
337 dprintk("No color detected with PAL - Trying SECAM...\n");
338
339 /* no color detected ? -> try SECAM */
340 err = saa7191_s_std(sd, V4L2_STD_SECAM);
341 if (err)
342 goto out;
343
344 msleep(SAA7191_SYNC_DELAY);
345
346 err = saa7191_wait_for_signal(sd, &status);
347 if (err)
348 goto out;
349
350 /* not 50Hz ? */
351 if (status & SAA7191_STATUS_FIDT) {
352 dprintk("No 50Hz signal\n");
353 *norm = V4L2_STD_UNKNOWN;
354 goto out;
355 }
356
357 if (status & SAA7191_STATUS_CODE) {
358 /* Color detected -> SECAM */
359 dprintk("SECAM\n");
360 *norm &= V4L2_STD_SECAM;
361 return saa7191_s_std(sd, old_norm);
362 }
363
364 dprintk("No color detected with SECAM - Going back to PAL.\n");
365 *norm = V4L2_STD_UNKNOWN;
366
367 out:
368 return saa7191_s_std(sd, old_norm);
369 }
370
saa7191_autodetect_norm(struct v4l2_subdev * sd)371 static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
372 {
373 u8 status;
374
375 dprintk("SAA7191 signal auto-detection...\n");
376
377 dprintk("Reading status...\n");
378
379 if (saa7191_read_status(sd, &status))
380 return -EIO;
381
382 dprintk("Checking for signal...\n");
383
384 /* no signal ? */
385 if (status & SAA7191_STATUS_HLCK) {
386 dprintk("No signal\n");
387 return -EBUSY;
388 }
389
390 dprintk("Signal found\n");
391
392 if (status & SAA7191_STATUS_FIDT) {
393 /* 60hz signal -> NTSC */
394 dprintk("NTSC\n");
395 return saa7191_s_std(sd, V4L2_STD_NTSC);
396 } else {
397 /* 50hz signal -> PAL */
398 dprintk("PAL\n");
399 return saa7191_s_std(sd, V4L2_STD_PAL);
400 }
401 }
402
saa7191_g_ctrl(struct v4l2_subdev * sd,struct v4l2_control * ctrl)403 static int saa7191_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
404 {
405 u8 reg;
406 int ret = 0;
407
408 switch (ctrl->id) {
409 case SAA7191_CONTROL_BANDPASS:
410 case SAA7191_CONTROL_BANDPASS_WEIGHT:
411 case SAA7191_CONTROL_CORING:
412 reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
413 switch (ctrl->id) {
414 case SAA7191_CONTROL_BANDPASS:
415 ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
416 >> SAA7191_LUMA_BPSS_SHIFT;
417 break;
418 case SAA7191_CONTROL_BANDPASS_WEIGHT:
419 ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
420 >> SAA7191_LUMA_APER_SHIFT;
421 break;
422 case SAA7191_CONTROL_CORING:
423 ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
424 >> SAA7191_LUMA_CORI_SHIFT;
425 break;
426 }
427 break;
428 case SAA7191_CONTROL_FORCE_COLOUR:
429 case SAA7191_CONTROL_CHROMA_GAIN:
430 reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
431 if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
432 ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
433 else
434 ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
435 >> SAA7191_GAIN_LFIS_SHIFT;
436 break;
437 case V4L2_CID_HUE:
438 reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
439 if (reg < 0x80)
440 reg += 0x80;
441 else
442 reg -= 0x80;
443 ctrl->value = (s32)reg;
444 break;
445 case SAA7191_CONTROL_VTRC:
446 reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
447 ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
448 break;
449 case SAA7191_CONTROL_LUMA_DELAY:
450 reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
451 ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
452 >> SAA7191_CTL3_YDEL_SHIFT;
453 if (ctrl->value >= 4)
454 ctrl->value -= 8;
455 break;
456 case SAA7191_CONTROL_VNR:
457 reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
458 ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
459 >> SAA7191_CTL4_VNOI_SHIFT;
460 break;
461 default:
462 ret = -EINVAL;
463 }
464
465 return ret;
466 }
467
saa7191_s_ctrl(struct v4l2_subdev * sd,struct v4l2_control * ctrl)468 static int saa7191_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
469 {
470 u8 reg;
471 int ret = 0;
472
473 switch (ctrl->id) {
474 case SAA7191_CONTROL_BANDPASS:
475 case SAA7191_CONTROL_BANDPASS_WEIGHT:
476 case SAA7191_CONTROL_CORING:
477 reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
478 switch (ctrl->id) {
479 case SAA7191_CONTROL_BANDPASS:
480 reg &= ~SAA7191_LUMA_BPSS_MASK;
481 reg |= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
482 & SAA7191_LUMA_BPSS_MASK;
483 break;
484 case SAA7191_CONTROL_BANDPASS_WEIGHT:
485 reg &= ~SAA7191_LUMA_APER_MASK;
486 reg |= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
487 & SAA7191_LUMA_APER_MASK;
488 break;
489 case SAA7191_CONTROL_CORING:
490 reg &= ~SAA7191_LUMA_CORI_MASK;
491 reg |= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
492 & SAA7191_LUMA_CORI_MASK;
493 break;
494 }
495 ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
496 break;
497 case SAA7191_CONTROL_FORCE_COLOUR:
498 case SAA7191_CONTROL_CHROMA_GAIN:
499 reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
500 if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
501 if (ctrl->value)
502 reg |= SAA7191_GAIN_COLO;
503 else
504 reg &= ~SAA7191_GAIN_COLO;
505 } else {
506 reg &= ~SAA7191_GAIN_LFIS_MASK;
507 reg |= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
508 & SAA7191_GAIN_LFIS_MASK;
509 }
510 ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
511 break;
512 case V4L2_CID_HUE:
513 reg = ctrl->value & 0xff;
514 if (reg < 0x80)
515 reg += 0x80;
516 else
517 reg -= 0x80;
518 ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
519 break;
520 case SAA7191_CONTROL_VTRC:
521 reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
522 if (ctrl->value)
523 reg |= SAA7191_STDC_VTRC;
524 else
525 reg &= ~SAA7191_STDC_VTRC;
526 ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
527 break;
528 case SAA7191_CONTROL_LUMA_DELAY: {
529 s32 value = ctrl->value;
530 if (value < 0)
531 value += 8;
532 reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
533 reg &= ~SAA7191_CTL3_YDEL_MASK;
534 reg |= (value << SAA7191_CTL3_YDEL_SHIFT)
535 & SAA7191_CTL3_YDEL_MASK;
536 ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
537 break;
538 }
539 case SAA7191_CONTROL_VNR:
540 reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
541 reg &= ~SAA7191_CTL4_VNOI_MASK;
542 reg |= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
543 & SAA7191_CTL4_VNOI_MASK;
544 ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
545 break;
546 default:
547 ret = -EINVAL;
548 }
549
550 return ret;
551 }
552
553 /* I2C-interface */
554
saa7191_g_input_status(struct v4l2_subdev * sd,u32 * status)555 static int saa7191_g_input_status(struct v4l2_subdev *sd, u32 *status)
556 {
557 u8 status_reg;
558 int res = V4L2_IN_ST_NO_SIGNAL;
559
560 if (saa7191_read_status(sd, &status_reg))
561 return -EIO;
562 if ((status_reg & SAA7191_STATUS_HLCK) == 0)
563 res = 0;
564 if (!(status_reg & SAA7191_STATUS_CODE))
565 res |= V4L2_IN_ST_NO_COLOR;
566 *status = res;
567 return 0;
568 }
569
570
571 /* ----------------------------------------------------------------------- */
572
573 static const struct v4l2_subdev_core_ops saa7191_core_ops = {
574 .g_ctrl = saa7191_g_ctrl,
575 .s_ctrl = saa7191_s_ctrl,
576 };
577
578 static const struct v4l2_subdev_video_ops saa7191_video_ops = {
579 .s_std = saa7191_s_std,
580 .s_routing = saa7191_s_routing,
581 .querystd = saa7191_querystd,
582 .g_input_status = saa7191_g_input_status,
583 };
584
585 static const struct v4l2_subdev_ops saa7191_ops = {
586 .core = &saa7191_core_ops,
587 .video = &saa7191_video_ops,
588 };
589
saa7191_probe(struct i2c_client * client,const struct i2c_device_id * id)590 static int saa7191_probe(struct i2c_client *client,
591 const struct i2c_device_id *id)
592 {
593 int err = 0;
594 struct saa7191 *decoder;
595 struct v4l2_subdev *sd;
596
597 v4l_info(client, "chip found @ 0x%x (%s)\n",
598 client->addr << 1, client->adapter->name);
599
600 decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
601 if (!decoder)
602 return -ENOMEM;
603
604 sd = &decoder->sd;
605 v4l2_i2c_subdev_init(sd, client, &saa7191_ops);
606
607 err = saa7191_write_block(sd, sizeof(initseq), initseq);
608 if (err) {
609 printk(KERN_ERR "SAA7191 initialization failed\n");
610 return err;
611 }
612
613 printk(KERN_INFO "SAA7191 initialized\n");
614
615 decoder->input = SAA7191_INPUT_COMPOSITE;
616 decoder->norm = V4L2_STD_PAL;
617
618 err = saa7191_autodetect_norm(sd);
619 if (err && (err != -EBUSY))
620 printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");
621
622 return 0;
623 }
624
saa7191_remove(struct i2c_client * client)625 static int saa7191_remove(struct i2c_client *client)
626 {
627 struct v4l2_subdev *sd = i2c_get_clientdata(client);
628
629 v4l2_device_unregister_subdev(sd);
630 return 0;
631 }
632
633 static const struct i2c_device_id saa7191_id[] = {
634 { "saa7191", 0 },
635 { }
636 };
637 MODULE_DEVICE_TABLE(i2c, saa7191_id);
638
639 static struct i2c_driver saa7191_driver = {
640 .driver = {
641 .owner = THIS_MODULE,
642 .name = "saa7191",
643 },
644 .probe = saa7191_probe,
645 .remove = saa7191_remove,
646 .id_table = saa7191_id,
647 };
648
649 module_i2c_driver(saa7191_driver);
650